Fix ARM JIT branch target PC state

diff --git a/jit/arm/codegen_arm.cpp b/jit/arm/codegen_arm.cpp
index 14944304b3ffec96e1d4418d48ea8413b761751c..a578d6572c15b4abe3311b02f7899a9c5c39fc1b 100644 (file)
--- a/jit/arm/codegen_arm.cpp
+++ b/jit/arm/codegen_arm.cpp
@@ -234,11 +234,26 @@ LOWFUNC(WRITE,READ,1,compemu_raw_cmp_pc,(IMPTR s))
 }
 LENDFUNC(WRITE,READ,1,compemu_raw_cmp_pc,(IMPTR s))
 
-LOWFUNC(NONE,WRITE,1,compemu_raw_set_pc_i,(IMPTR s))
+STATIC_INLINE void compemu_raw_store_pc_state_from_work1(void)
 {
-  LOAD_U32(REG_WORK2, s);
-  uintptr idx = (uintptr) &(regs.pc_p) - (uintptr) &regs;
+  uintptr idx = (uintptr)&regs.pc_p - (uintptr)&regs;
+  STR_rRI(REG_WORK1, R_REGSTRUCT, idx);
+  idx = (uintptr)&regs.pc_oldp - (uintptr)&regs;
+  STR_rRI(REG_WORK1, R_REGSTRUCT, idx);
+
+#ifdef NATMEM_OFFSET
+  SUB_rrr(REG_WORK2, REG_WORK1, R_MEMSTART);
+  idx = (uintptr)&regs.pc - (uintptr)&regs;
+  STR_rRI(REG_WORK2, R_REGSTRUCT, idx);
+  idx = (uintptr)&regs.instruction_pc - (uintptr)&regs;
   STR_rRI(REG_WORK2, R_REGSTRUCT, idx);
+#endif
+}
+
+LOWFUNC(NONE,WRITE,1,compemu_raw_set_pc_i,(IMPTR s))
+{
+  LOAD_U32(REG_WORK1, s);
+  compemu_raw_store_pc_state_from_work1();
 }
 LENDFUNC(NONE,WRITE,1,compemu_raw_set_pc_i,(IMPTR s))
 

diff --git a/jit/arm/codegen_arm64.cpp b/jit/arm/codegen_arm64.cpp
index ead97225253585aea1dac3e2242c6ecb78c5a598..97cc775518a7fc34a0f05614bd1a30dc6928cadd 100644 (file)
--- a/jit/arm/codegen_arm64.cpp
+++ b/jit/arm/codegen_arm64.cpp
@@ -241,11 +241,26 @@ LOWFUNC(WRITE,READ,1,compemu_raw_cmp_pc,(IMPTR s))
 }
 LENDFUNC(WRITE,READ,1,compemu_raw_cmp_pc,(IMPTR s))
 
+STATIC_INLINE void compemu_raw_store_pc_state_from_work1(void)
+{
+       uintptr idx = (uintptr)&regs.pc_p - (uintptr)&regs;
+       STR_xXi(REG_WORK1, R_REGSTRUCT, idx);
+       idx = (uintptr)&regs.pc_oldp - (uintptr)&regs;
+       STR_xXi(REG_WORK1, R_REGSTRUCT, idx);
+
+#ifdef NATMEM_OFFSET
+       SUB_xxx(REG_WORK2, REG_WORK1, R_MEMSTART);
+       idx = (uintptr)&regs.pc - (uintptr)&regs;
+       STR_wXi(REG_WORK2, R_REGSTRUCT, idx);
+       idx = (uintptr)&regs.instruction_pc - (uintptr)&regs;
+       STR_wXi(REG_WORK2, R_REGSTRUCT, idx);
+#endif
+}
+
 LOWFUNC(NONE,WRITE,1,compemu_raw_set_pc_i,(IMPTR s))
 {
        LOAD_U64(REG_WORK1, s);
-       uintptr idx = (uintptr) &(regs.pc_p) - (uintptr) &regs;
-       STR_xXi(REG_WORK1, R_REGSTRUCT, idx);
+       compemu_raw_store_pc_state_from_work1();
 }
 LENDFUNC(NONE,WRITE,1,compemu_raw_set_pc_i,(IMPTR s))
 

diff --git a/jit/arm/compemu_support_arm.cpp b/jit/arm/compemu_support_arm.cpp
index b51aaa64a40982ee38eeca6da1fb42e78be0e5fb..e7f3570f80c0e5ae6fccd86a029f818f683c52dc 100644 (file)
--- a/jit/arm/compemu_support_arm.cpp
+++ b/jit/arm/compemu_support_arm.cpp
@@ -3476,32 +3476,19 @@ STATIC_INLINE void create_popalls(void)
 
     /* now the exit points */
     popall_execute_normal_setpc = get_target();
-    uintptr idx = (uintptr) & (regs.pc_p) - (uintptr)&regs;
-#if defined(CPU_AARCH64)
-    STR_xXi(REG_WORK1, R_REGSTRUCT, idx);
-#else
-    STR_rRI(REG_WORK1, R_REGSTRUCT, idx);
-#endif
+    compemu_raw_store_pc_state_from_work1();
     popall_execute_normal = get_target();
     raw_pop_preserved_regs();
     compemu_raw_jmp((uintptr)execute_normal);
 
     popall_check_checksum_setpc = get_target();
-#if defined(CPU_AARCH64)
-    STR_xXi(REG_WORK1, R_REGSTRUCT, idx);
-#else
-    STR_rRI(REG_WORK1, R_REGSTRUCT, idx);
-#endif
+    compemu_raw_store_pc_state_from_work1();
     popall_check_checksum = get_target();
     raw_pop_preserved_regs();
     compemu_raw_jmp((uintptr)check_checksum);
 
     popall_exec_nostats_setpc = get_target();
-#if defined(CPU_AARCH64)
-    STR_xXi(REG_WORK1, R_REGSTRUCT, idx);
-#else
-    STR_rRI(REG_WORK1, R_REGSTRUCT, idx);
-#endif
+    compemu_raw_store_pc_state_from_work1();
     raw_pop_preserved_regs();
     compemu_raw_jmp((uintptr)exec_nostats);