4990b5

diff --git a/custom.cpp b/custom.cpp
index 2aad24a66bd4e8cc7d42972647a5f837ccb00cf4..6d9a612a4c0f3876b7084cb3691d1a890ae50fce 100644 (file)
--- a/custom.cpp
+++ b/custom.cpp
@@ -9262,8 +9262,6 @@ bool blitter_cant_access(int hpos)
        return false;
 }
 
-#define COPPER_CYCLE_IDLE 0x8f
-
 static bool copper_cant_read(int hpos, uae_u16 alloc)
 {
        if (!dmaen(DMA_COPPER)) {

diff --git a/debug.cpp b/debug.cpp
index 8c7ba5502c620d5c40bc77d6844a17fb3ad6cf0a..684e0da76f0869c4c7d1c366db1ed19ae45dc1ca 100644 (file)
--- a/debug.cpp
+++ b/debug.cpp
@@ -6124,7 +6124,7 @@ static void dma_disasm(int frames, int vp, int hp, int frames_end, int vp_end, i
                        console_out_f(_T("%s %s %s\n"), tmp, l3, l4);
                }
                hp++;
-               if (dr->end) {
+               if (dr->end || hp >= NR_DMA_REC_HPOS) {
                        hp = 0;
                        vp++;
                        if (vp >= maxvpos + 1) {

diff --git a/od-win32/win32.cpp b/od-win32/win32.cpp
index 69a91d49691af608ac49ea54a9df3107d2755800..9d89c8bcbc0ad3acc74e98ef3d394675ef652d1f 100644 (file)
--- a/od-win32/win32.cpp
+++ b/od-win32/win32.cpp
@@ -149,8 +149,10 @@ int d3ddebug = 0;
 int max_uae_width;
 int max_uae_height;
 
+static HINSTANCE hRichEdit;
 HINSTANCE hInst = NULL;
 HMODULE hUIDLL = NULL;
+
 HWND hHiddenWnd, hGUIWnd;
 #if KBHOOK
 static HHOOK hhook;
@@ -3266,6 +3268,8 @@ static int WIN32_CleanupLibraries(void)
 {
        if (hUIDLL)
                FreeLibrary(hUIDLL);
+       if (hRichEdit)
+               FreeLibrary(hRichEdit);
        CoUninitialize();
        return 1;
 }
@@ -3488,6 +3492,8 @@ static int WIN32_InitLibraries (void)
        if (pSetCurrentProcessExplicitAppUserModelID)
                pSetCurrentProcessExplicitAppUserModelID (WINUAEAPPNAME);
 
+       hRichEdit = LoadLibrary(_T("RICHED32.DLL"));
+
        return 1;
 }
 

diff --git a/od-win32/win32.h b/od-win32/win32.h
index 8b03aa65f63b19fbe52bd747cb1eda40b4457869..53add649f2630a597582f2bf0d379a3dd0185faa 100644 (file)
--- a/od-win32/win32.h
+++ b/od-win32/win32.h
@@ -20,12 +20,12 @@
 #define LANG_DLL_FULL_VERSION_MATCH 0
 
 #if WINUAEPUBLICBETA
-#define WINUAEBETA _T("Beta 4")
+#define WINUAEBETA _T("Beta 5")
 #else
 #define WINUAEBETA _T("")
 #endif
 
-#define WINUAEDATE MAKEBD(2022, 10, 30)
+#define WINUAEDATE MAKEBD(2022, 11, 6)
 
 //#define WINUAEEXTRA _T("AmiKit Preview")
 //#define WINUAEEXTRA _T("Amiga Forever Edition")

diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt
index 051d2d916b0e98bba0a5d3cfb779ed1ce91836e2..abd52da25b62ec196bb4b1ed2fe03990f34cb9e4 100644 (file)
--- a/od-win32/winuaechangelog.txt
+++ b/od-win32/winuaechangelog.txt
@@ -1,4 +1,20 @@
 
+Beta 5:
+
+- If copper used last cycle in scanline and last cycle was even cycle (PAL 226) and it wanted next possible copper cycle and it was free: copper will allocate cycle 1 (Copper won't use it, neither can CPU or blitter. Cycle is allocated because it is 2 cycles from 226 but it is unusable because it isn't even cycle) and cycle 2 (copper uses this normally) of next scanline. This was implemented before 4.9 but was lost when custom emulation cycle allocation rewrite was done.
+- Reading from non-existing register always returned FFFF instead of data that previous cycle's possible DMA access transferred. (Equipose / Complex hang)
+- Don't keep "interrupt active" flag set if IPL is >0 but CPU interrupt mask is higher or same as current interrupt level. Only check it if mask gets lowered. Prevents unnecessary status flag checks between each emulated instruction.
+- Fill color palette entries with pseudo-random contents at power up. (Except COLOR0 to not get annoying color flash at startup. Which does randomly happen on real HW.)
+- EHB mode OCS/ECS vs AGA difference emulated. OCS/ECS number of active plane does not affect EHB (only HAM, DPF or KILLEHB disables EHB). For example if plane count changes mid scanline from 6 to 5, EHB stays active and remaining data in plane 6's shifters still appear as EHB plane. But on AGA plane count change causes switch to normal color mode immediately, plane 6's remaining data selects color palette entries 32 to 63. (G.Rowdy / Desire)
+- In some situations if same scan line enabled and disabled EHB, whole scan line was drawn without EHB. (G.Rowdy / Desire)
+- Replaced C-library pseudo-random number generator with simple xorshift algorithm.
+- Ultra extreme overscan mode screenshot was vertically clipped.
+- Remove interlace artifacts option fixed. (b1)
+- Added optional chipset interlace mode filter panel settings. If enabled and at least one entry is different than normal native mode filter panel, filter is selected when current native is interlaced and switched back to normal native filter when mode switches back to non-interlaced.
+- Added semaphore locking to A2065 emulation, previously it was possible to free A2065 resources while some other thread (for example slirp) was currently accessing its on-board RAM.
+- Fixed serial port MIDI emulation hang. (b1)
+
+Beta 4:
 
 - Remaining IPL fixes (LINK, UNLK, MOVE to SR/CCR, AND/EOR/OR SR/CCR, CPU wait state IPL fix).
 - Emulated Paula side-effect that affects IPL timing. IPLx line state changes from low to high (IPL is active low) are about 0.5 CCK later than high to low transitions. This delays CPU IPL change detection by 2 CPU clocks if any IPL line had low to high transition. CPU accepts IPL change only if has been stable for 2 CPU clocks. (for example 3 to 5 has delay, 4 to 5 does not)