return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
int count_cycles = 0;
uaecptr oldpc = m68k_getpc();
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
}
put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
int count_cycles = 0;
uaecptr oldpc = m68k_getpc();
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (26 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (24 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 4,0 B */
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 4,0 B */
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 0,0 B */
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (2 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (12 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_setpc_j(pc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (20 * CYCLE_UNIT / 2 + count_cycles) | (((3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (0 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return (4 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (16 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 0,0 B */
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 4,0 B */
return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 0,0 B */
return (8 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (20 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 6 0,0 B */
return (6 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 0,0 B */
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (22 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return (10 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return (18 * CYCLE_UNIT / 2 + count_cycles) | (((1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4) << 16);
}
/* 2 0,0 B */
}
newsr = sr; newpc = pc;
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
m68k_areg(regs, 7) += 4;
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 12 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 14 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 18 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 14 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 16 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 14 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 18 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
return 6 * CYCLE_UNIT / 2 + count_cycles;
}
m68k_incpci(s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
return 6 * CYCLE_UNIT / 2 + count_cycles;
}
m68k_incpci(s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
return 6 * CYCLE_UNIT / 2 + count_cycles;
}
m68k_incpci(s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
m68k_setpci_j(pc);
opcode |= 0x20000;
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
m68k_areg(regs, 7) += 4;
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 12 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 14 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 18 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 14 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 16 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 14 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return 18 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception3_read_prefetch(opcode, addr);
return 10 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
exception3_read_prefetch(opcode, addr);
return 10 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
exception3_read_prefetch(opcode, addr);
return 10 * CYCLE_UNIT / 2 + count_cycles;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
newsr = sr; newpc = pc;
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
m68k_areg(regs, 7) += 4;
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
return;
}
m68k_incpci(s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
return;
}
m68k_incpci(s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
return;
}
m68k_incpci(s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
m68k_setpci_j(pc);
opcode |= 0x20000;
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
}
m68k_areg(regs, 7) += 4;
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
get_word_ce000_prefetch(2);
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception2_write(opcode, dsta + 2, 0x1, nextpc, 1);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
regs.ir = regs.irc;
opcode = regs.ir;
if(regs.t1) opcode |= 0x10000;
exception3_read_prefetch(opcode, addr);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
exception3_read_prefetch(opcode, addr);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
exception3_read_prefetch(opcode, addr);
return;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
get_word_ce000_prefetch(0);
if(hardware_bus_error) {
int pcoffset = 0;
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
fill_prefetch_020_ntx();
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rtsi();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return;
}
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
fill_prefetch_020_ntx();
return;
}
/* op H:1,T:0,C:8 */
uaecptr oldpc = m68k_getpci();
m68k_do_rts_ce020();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
m68k_do_bsr_ce020(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
m68k_do_bsr_ce020(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return;
}
m68k_do_bsr_ce020(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_020();
return;
}
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
fill_prefetch_030_ntx();
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rtsi();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return;
}
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
fill_prefetch_030_ntx();
return;
}
/* op H:1,T:0,C:8 */
uaecptr oldpc = m68k_getpci();
m68k_do_rts_ce030();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
m68k_do_bsr_ce030(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
m68k_do_bsr_ce030(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
m68k_do_bsr_ce030(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return;
}
/* 2 0,0 B */
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rtsi();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci_j(oldpc);
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 2 0,0 B */
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 4 0,0 B */
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 2 2,0 B */
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 4 0,0 B */
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 6 0,0 B */
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 4 0,0 B */
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 2 2,0 B */
return;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 4 0,0 B */
return;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 2 0,0 B */
return;
}
m68k_do_bsri(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return;
}
/* 6 0,0 B */
return;
}
m68k_setpci_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return;
}
/* 2 0,0 B */
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_setpci(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
/* 2 0,0 B */
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rts_mmu040();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci(oldpc);
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu040(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu040(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu040(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_setpci(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
/* 2 0,0 B */
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rts_mmu030();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci(oldpc);
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu030(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu030(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu030(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_setpci(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
/* 2 0,0 B */
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rts_mmu060();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci(oldpc);
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu060(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu060(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu060(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_setpci(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
fill_prefetch_030_ntx();
return (3 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
int count_cycles = 0;
uaecptr oldpc = m68k_getpci();
m68k_do_rts_mmu030c();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci(oldpc);
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu030c(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu030c(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
m68k_do_bsr_mmu030c(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return (1 * 4 * CYCLE_UNIT / 2 + count_cycles) * 4;
}
return;
}
m68k_setpci(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
fill_prefetch_030_ntx();
return;
}
/* op H:1,T:0,C:8 */
uaecptr oldpc = m68k_getpci();
m68k_do_rts_mmu030c();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpci() & 1) {
uaecptr faultpc = m68k_getpci();
m68k_setpci(oldpc);
return;
}
m68k_do_bsr_mmu030c(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
m68k_do_bsr_mmu030c(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return;
}
m68k_do_bsr_mmu030c(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
fill_prefetch_030();
return;
}
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
{
uaecptr oldpc = m68k_getpc();
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
put_long_jit(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
{
uaecptr oldpc = m68k_getpc();
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_bsr(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(pc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 6 0,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long_jit(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 6 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 6 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 6 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rts();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 6 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
{
uaecptr oldpc = m68k_getpc();
m68k_do_rtsi_jit();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
}
x_put_long(m68k_areg(regs, 7) - 4, nextpc);
m68k_areg(regs, 7) -= 4;
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
{
uaecptr oldpc = m68k_getpc();
m68k_do_rtsi_jit();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
if(regs.t0) check_t0_trace();
return 0;
}
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(newpc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rtsi_jit();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_bsri_jit(nextpc, s);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_setpc_j(pc);
+ #ifdef DEBUGGER
branch_stack_pop_rte(oldpc);
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
m68k_do_rtsi_jit();
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_pop_rts(oldpc);
}
+ #endif
if (m68k_getpc() & 1) {
uaecptr faultpc = m68k_getpc();
m68k_setpc_j(oldpc);
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 6 0,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
return 0;
}
x_put_long(m68k_areg(regs, 7), nextpc);
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 4,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 4 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
exception3_read_prefetch(opcode, addr);
return 0;
}
+ #ifdef DEBUGGER
if (debugmem_trace) {
branch_stack_push(oldpc, nextpc);
}
+ #endif
return 0;
}
/* 2 0,0 B */
}
}
-STATIC_INLINE int ecsshres(void)
+STATIC_INLINE bool ecsshres(void)
{
return bplcon0_res == RES_SUPERHIRES && ecs_denise && !aga_mode;
}
-STATIC_INLINE int nodraw(void)
+STATIC_INLINE bool nodraw(void)
{
struct amigadisplay *ad = &adisplays[0];
- return !currprefs.cpu_memory_cycle_exact && ad->framecnt != 0;
+ bool nd = !currprefs.cpu_memory_cycle_exact && ad->framecnt != 0;
+ return nd;
}
STATIC_INLINE int diw_to_hpos(int diw)
decide_hdiw_check_stop(start_diw_hpos, end_diw_hpos);
}
// check also hblank if there is chance it has been moved to visible area
- static bool xcv = true;
- if (xcv && 1) {
- if (hstrobe_conflict || vhposw_modified) {
- decide_hdiw_blank_check_start(hpos, start_diw_hpos, end_diw_hpos);
- }
- if (hdiwstate_blank == diw_states::DIW_waiting_stop) {
- decide_hdiw_blank_check_stop(hpos, start_diw_hpos, end_diw_hpos);
- }
+ if (hstrobe_conflict || vhposw_modified) {
+ decide_hdiw_blank_check_start(hpos, start_diw_hpos, end_diw_hpos);
+ }
+ if (hdiwstate_blank == diw_states::DIW_waiting_stop) {
+ decide_hdiw_blank_check_stop(hpos, start_diw_hpos, end_diw_hpos);
}
hdiw_denisecounter_abs += end_diw_hpos - start_diw_hpos;
}
hdiw_counter += maxhpos * 2;
if (!hstrobe_conflict) {
+ // OCS Denise freerunning horizontal counter
if (!ecs_denise && vpos == get_equ_vblank_endline() - 1) {
hdiw_counter++;
}
bool hardwired = true;
if (ecs_agnus) {
hardwired = (new_beamcon0 & BEAMCON0_VARVBEN) == 0;
- // ECS Denise with exhblank: always use thisline_decision.vb blanking method
+ // ECS Denise with exthblank: always use thisline_decision.vb blanking method
if (ecs_denise && !aga_mode && exthblank) {
hardwired = false;
}
#define LANG_DLL_FULL_VERSION_MATCH 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("Beta 6")
+#define WINUAEBETA _T("Beta 7")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2023, 10, 21)
+#define WINUAEDATE MAKEBD(2023, 11, 4)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
+Beta 7:
+
+- Fixed on screen keyboard transparency in D3D9/11 modes. It previously only worked in D3D11 HDR mode.
+- Ignore "Main window always on top" misc setting in D3D11 mode. D3D10+ windowed mode is not possible if always on top window flag is set. Previously this caused fallback to D3D9 mode. This does not make sense in my opinion and it does not seem to be mentioned in documentation but CreateSwapChainForHwnd() fails if it is set. Debug D3D11 DLLs also report that it failed due to unsupported window flag.
+- Do not do unnecessary graphics setup reset if RTG mode changed but only parameter that changed was color depth and mode is not fullscreen with match depth if possible enabled. (b1)
+- If D3D11 screen init decided that new requested mode has same parameters as old mode, skip also other unnecessary graphics reinitializations.
+- Do not enable temporary frameskip in warp mode if debug overscan mode is enabled, it can cause random glitches. Warp mode normally enables frameskip in non-ce modes.
+- Ignore backwards or same line vertical VPOSW writes if it was CPU write and CPU emulation is not in accurate mode. This basically reverts VPOSW updates to pre-5.0 behavior when CPU is not at least in memory cycle exact mode, supporting only usual "fake NTSC" modes. At least AR3 does stupid things with VPOSW that can't work if CPU is not slow enough.
+- Added generic support for emulation of IDE controllers that have in-circuit programmable flash/EEPROM chip.
+- Flash/EEPROM emulation updates (support write protection enable/disable commands, parallel EEPROM partial writes supported)
+
Beta 6:
- On screen Amiga keyboard.