{
- for (long j = 0; j < pow(3, totalLength); j++)
+ for (long j = 0; j < pow((double)3, totalLength); j++)
{
FixedBits output(resultLength, signature.resultType == BOOL_TYPE);
int transferC =0;
int max =0;
- int count = 100;
+ int count = 1000;
long st = getCurrentTime();
+ const int width =32;
- for (int width = 7; width <= 256; width++)
+ for (int i = 0; i < count; i++)
{
children.clear();
FixedBits a = FixedBits::createRandom(width, prob, mtrand);
Detail d;
bool imprecise = false;
- if (kind == BVDIV)
+ if (kind == BVDIV || kind == BVMULT || kind == BVMOD || kind == SBVDIV || kind == SBVREM)
imprecise = true;
checkEqual(children, output, transfer, kind, imprecise,d);
if (d.conflict)
}
cerr.setf(ios::fixed);
- cerr << "% Count" << count << " prob" << prob << endl;
+ cerr << "% Count" << count << " prob" << prob << " bits" << width << endl;
cerr << setprecision(2) << (getCurrentTime() - st)/1000.0 << "s&" << conflicts << "&" << initial << "&" << transferC << "&" << max << endl;
return;
lengths.push_back(resultLength);
totalLength += resultLength;
- for (long j = 0; j < pow(3, totalLength); j++)
+ for (long j = 0; j < pow((double)3, totalLength); j++)
{
int current = j;
return bvUnsignedDivisionBothWays(children, output, simplifier::constantBitP::beev);
}
+
Result
signedDivide(vector<FixedBits*>& children, FixedBits& output)
{
const int numberOfInputParams = 2;
assert(numberOfInputParams >0);
- const int mask = pow(2, bitwidth) - 1;
+ const int mask = pow((double)2, bitwidth) - 1;
// Create all the possible inputs, and apply the function.
- for (int i = 0; i < pow(2, bitwidth * numberOfInputParams); i++)
+ for (int i = 0; i < pow((double)2, bitwidth * numberOfInputParams); i++)
{
D d;
d.a = i & mask;
FixedBits empty(bitwidth, false);
FixedBits c_a(bitwidth, false), c_b(bitwidth, false), c_o(bitwidth, false);
- const int to_iterate = pow(3, totalLength);
+ const int to_iterate = pow((double)3, totalLength);
for (long j = 0; j < to_iterate; j++)
{
int current = j;
output << "bit-vector or&" << endl;
go(&bvOrBothWays, BVOR);
- output << "unsigned division&" << endl;
- go(&unsignedDivide, BVDIV);
-
output << "bit-vector xor&" << endl;
go(&bvXorBothWays, BVXOR);
output << "left shift&" << endl;
go(&bvLeftShiftBothWays, BVLEFTSHIFT);
- output << "arith shift&" << endl;
+ output << "arithmetic shift&" << endl;
go(&bvArithmeticRightShiftBothWays, BVSRSHIFT);
output << "addition&" << endl;
go(&bvAddBothWays, BVPLUS);
+ output << "multiplication&" << endl;
+ go(&multiply, BVMULT);
+
+ output << "unsigned division&" << endl;
+ go(&unsignedDivide, BVDIV);
+
+ output << "unsigned remainder&" << endl;
+ go(&unsignedModulus, BVMOD);
+
+ output << "signed division&" << endl;
+ go(&signedDivide, SBVDIV);
+
+ output << "signed remainder&" << endl;
+ go(&signedRemainder, SBVREM);
+
exit(1);
}
void stop2()
{
clock_t total = clock() - start;
- cerr << (float(total) / CLOCKS_PER_SEC) << "s";
+ cerr.setf(ios::fixed);
+ cerr << setprecision(2) << (float(total) / CLOCKS_PER_SEC) << "s";
}
private:
return bvSignedModulusBothWays(children, output,beev);
}
-simplifier::constantBitP::Result unsignedDivision(vector<FixedBits*>& children,
+simplifier::constantBitP::Result signedRemainder(vector<FixedBits*>& children,
FixedBits& output)
{
- return bvUnsignedDivisionBothWays(children, output,beev);
+ return bvSignedRemainderBothWays(children, output,beev);
}
-simplifier::constantBitP::Result divide(vector<FixedBits*>& children,
+simplifier::constantBitP::Result unsignedDivision(vector<FixedBits*>& children,
FixedBits& output)
{
return bvUnsignedDivisionBothWays(children, output,beev);
}
+simplifier::constantBitP::Result signedDivision(vector<FixedBits*>& children,
+ FixedBits& output)
+{
+ return bvSignedDivisionBothWays(children, output,beev);
+}
+
simplifier::constantBitP::Result multiply(vector<FixedBits*>& children,
FixedBits& output)
output << "no_op&" << endl;
run_with_various_prob(no_op, output);
+ output << "bit-vector xor&" << endl;
+ run_with_various_prob(bvXorBothWays, output);
+
+ output << "bit-vector or&" << endl;
+ run_with_various_prob(bvOrBothWays, output);
+
+ output << "bit-vector and&" << endl;
+ run_with_various_prob(bvAndBothWays, output);
+
output << "right shift&" << endl;
run_with_various_prob(bvRightShiftBothWays, output);
+ output << "left shift&" << endl;
+ run_with_various_prob(bvLeftShiftBothWays, output);
+
output << "arithmetic shift&" << endl;
run_with_various_prob(bvArithmeticRightShiftBothWays, output);
+ output << "addition&" << endl;
+ run_with_various_prob(bvAddBothWays, output);
+
output << "multiplication&" << endl;
run_with_various_prob(multiply, output);
output << "unsigned division&" << endl;
run_with_various_prob(unsignedDivision, output);
- output << "bit-vector xor&" << endl;
- run_with_various_prob(bvXorBothWays, output);
+ output << "unsigned remainder&" << endl;
+ run_with_various_prob(signedRemainder, output);
- output << "addition&" << endl;
- run_with_various_prob(bvAddBothWays, output);
+ output << "signed division&" << endl;
+ run_with_various_prob(signedDivision, output);
+
+ output << "signed remainder&" << endl;
+ run_with_various_prob(signedRemainder, output);
output << "%" << "iterations" << iterations;
output << "%" << "bit-width" << iterations;