JIT: Fix fldcw_m_indexed for x86-64

diff --git a/jit/codegen_x86.cpp b/jit/codegen_x86.cpp
index 3506cc3a9cf93459fa1b0a4b07ed8eb55f63bf72..c5d32ded1c8b7d838af2df5b1127a867d6cf052f 100644 (file)
--- a/jit/codegen_x86.cpp
+++ b/jit/codegen_x86.cpp
@@ -4218,6 +4218,9 @@ LENDFUNC(NONE,NONE,2,raw_fmov_rr,(FW d, FR s))
 
 LOWFUNC(NONE,READ,2,raw_fldcw_m_indexed,(R4 index, IMM base))
 {
+       /* FLDCW cannot be used with x86-64-only registers */
+       assert(index <= EDI_INDEX);
+       ADDR32
        emit_byte(0xd9);
        emit_byte(0xa8+index);
        emit_long(base);

diff --git a/jit/compemu_midfunc_x86.cpp b/jit/compemu_midfunc_x86.cpp
index 9774a94e5d151e6945b45b9954c35a13ec07113e..8263a524f6a61572d70d76c3d4c2502906397efa 100644 (file)
--- a/jit/compemu_midfunc_x86.cpp
+++ b/jit/compemu_midfunc_x86.cpp
@@ -2536,9 +2536,8 @@ MENDFUNC(2,fmov_rr,(FW d, FR s))
 
 MIDFUNC(2,fldcw_m_indexed,(RR4 index, IMM base))
 {
-       index=readreg(index,4);
-
-       raw_fldcw_m_indexed(index,base);
+       index = readreg_x86(index, 4);
+       raw_fldcw_m_indexed(index, base);
        unlock2(index);
 }
 MENDFUNC(2,fldcw_m_indexed,(RR4 index, IMM base))

diff --git a/jit/compemu_support.cpp b/jit/compemu_support.cpp
index 18d58e72242f67ab7e7c17d1f79e4d5121366ae3..66a7b07dc3723c48d4c34ac797ae9811a2311d56 100644 (file)
--- a/jit/compemu_support.cpp
+++ b/jit/compemu_support.cpp
@@ -2009,6 +2009,27 @@ static int readreg_offset(int r, int size)
        return readreg_general(r,size,-1,1);
 }
 
+#ifdef UAE
+/* Allocate midlevel register to physical x86(-64) register, but make sure
+ * it is one of the (32-bit) x86 general purpose registers. */
+static int readreg_x86(int r, int size)
+{
+       /* First, try to use the normal register allocation routine. */
+       int s = readreg(r, size);
+#ifdef CPU_x86_64
+       if (s > EDI_INDEX) {
+               /* We got a x86-64-specific register */
+               jit_log("Got register %d in readreg_x86, must re-assign", s);
+               unlock2(s);
+               /* It would be better to loop through live.nat and find a
+                * suitable register which does not need saving to memory. */
+               s = readreg_specific(r, size, EDI_INDEX);
+       }
+#endif
+       return s;
+}
+#endif
+
 /* writereg_general(r, size, spec)
  *
  * INPUT