va_end(parms);
out(outbuf);
}
+ insn_n_cycles += 2 * 4;
return;
}
switch (size) {
case sz_byte:
set_last_access();
- out("x_put_byte(%sa, %s);\n", to, from);
+ out("%s(%sa, %s);\n", dstbx, to, from);
count_writew++;
check_bus_error(to, 0, 1, 0, from, 1);
break;
if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
term();
set_last_access();
- out("x_put_word(%sa, %s);\n", to, from);
+ out("%s(%sa, %s);\n", dstwx, to, from);
count_writew++;
check_bus_error(to, 0, 1, 1, from, 1);
break;
}
out("uaecptr oldpc = %s;\n", getpc);
addcycles000(2);
- addcycles000_nonce(2);
if (using_exception_3 && cpu_level >= 4) {
out("if (offs & 1) {\n");
out("exception3_read_prefetch(opcode, oldpc + (uae_s32)offs + 2);\n");
}
fill_prefetch_full_020();
- returncycles (10);
+ returncycles(10);
out("}\n");
if (cpu_level == 1 && using_prefetch) {
out("if (!src) {\n");
out("}\n");
}
add_head_cycs (10);
- addcycles000_nonce(2 + 2);
if (cpu_level == 0 || (cpu_level == 1 && !using_prefetch)) {
out("} else {\n");
addcycles000_onlyce(2);
}
out("}\n");
pop_ins_cnt();
+ insn_n_cycles += 2;
+ count_cycles += 2;
setpc ("oldpc + %d", m68k_pc_offset);
clear_m68k_offset();
get_prefetch_020_continue();
fill_prefetch_full_000_special("if (!cctrue(%d)) {\nm68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff);\n}\n", curi->cc);
- insn_n_cycles = 8;
branch_inst = 1;
if (!next_level_040_to_030())
next_level_020_to_010();
addcycles000(4);
out("if (extra & 0x800) {\n");
{
- int srcdone = 0;
int old_m68k_pc_offset = m68k_pc_offset;
int old_m68k_pc_total = m68k_pc_total;
push_ins_cnt();