static int feature_full_extension_format = 0;
static int feature_test_rounds = 2;
static int feature_flag_mode = 0;
+static int feature_odd_usp = 0;
static TCHAR *feature_instruction_size = NULL;
static uae_u32 feature_addressing_modes[2];
static int ad8r[2], pc8r[2];
static uae_u32 safe_memory_end;
static int safe_memory_mode;
static uae_u32 user_stack_memory, super_stack_memory;
+static uae_u32 user_stack_memory_use;
static uae_u8 *low_memory, *high_memory, *test_memory;
static uae_u8 *low_memory_temp, *high_memory_temp, *test_memory_temp;
test_exception_3_fc = fc;
test_exception_3_size = size;
test_exception_3_di = 1;
+ regs.read_buffer = 0;
if (currprefs.cpu_model == 68000) {
if (generates_group1_exception(regs.ir)) {
test_exception_3_fc = fc;
test_exception_3_size = size;
test_exception_3_di = 1;
+ regs.read_buffer = 0;
if (currprefs.cpu_model == 68000) {
if (generates_group1_exception(regs.ir)) {
fwrite(data, 1, 4, f);
pl(data, safe_memory_end);
fwrite(data, 1, 4, f);
- pl(data, user_stack_memory);
+ pl(data, user_stack_memory_use);
fwrite(data, 1, 4, f);
pl(data, super_stack_memory);
fwrite(data, 1, 4, f);
for (;;) {
+ // if supervisor stack is odd: exit
+ if (regs.s && (regs.isp & 1)) {
+ test_exception = -1;
+ break;
+ }
+
if (cnt <= 0) {
wprintf(_T(" Loop mode didn't end!?\n"));
abort();
int count = 0;
registers[8 + 6] = opcode_memory_start - 0x100;
- registers[8 + 7] = user_stack_memory;
+ registers[8 + 7] = user_stack_memory_use;
uae_u32 target_address = 0xffffffff;
target_ea[0] = 0xffffffff;
}
feature_flag_mode = 0;
ini_getval(ini, INISECTION, _T("feature_flags_mode"), &feature_flag_mode);
+ feature_odd_usp = 0;
+ ini_getval(ini, INISECTION, _T("feature_odd_usp"), &feature_odd_usp);
feature_full_extension_format = 0;
if (currprefs.cpu_model >= 68020) {
super_stack_memory = test_memory_start + (2 * RESERVED_SUPERSTACK + RESERVED_USERSTACK_EXTRA);
user_stack_memory = test_memory_start + RESERVED_SUPERSTACK;
}
+ user_stack_memory_use = user_stack_memory;
+ if (feature_odd_usp) {
+ user_stack_memory_use |= 1;
+ }
low_memory_size = test_low_memory_end;
if (low_memory_size < 0x8000)
static bool genastore_done;
static char rmw_varname[100];
static struct instr *g_instr;
+static char g_srcname[100];
#define GENA_GETV_NO_FETCH 0
#define GENA_GETV_FETCH 1
fc = 2;
}
+ if (g_instr->mnemo == i_LINK) {
+ // a7 -> a0 copy done before A7 address error check
+ printf("\tm68k_areg(regs, srcreg) = olda;\n");
+ }
+
if (cpu_level == 1 && g_instr->mnemo == i_MVSR2 && !write) {
printf("\t\topcode |= 0x20000;\n"); // upper byte of SSW is zero -flag.
}
int pc_68000_offset = m68k_pc_offset;
int pc_68000_offset_fetch = 0;
int pc_68000_offset_store = 0;
+ bool addr = false;
sprintf (namea, "%sa", name);
if ((flags & GF_RMW) && using_mmu == 68060) {
}
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case Areg:
if (movem)
}
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case Aind: // (An)
switch (fetchmode)
printf ("\tuaecptr %sa;\n", name);
add_mmu040_movem (movem);
printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg);
+ addr = true;
break;
case Aipi: // (An)+
switch (fetchmode)
printf ("\tuaecptr %sa;\n", name);
add_mmu040_movem (movem);
printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg);
+ addr = true;
break;
case Apdi: // -(An)
switch (fetchmode)
if (size == sz_long)
pc_68000_offset_fetch -= 2;
}
+ addr = true;
break;
case Ad16: // (d16,An)
printf ("\tuaecptr %sa;\n", name);
add_mmu040_movem (movem);
printf ("\t%sa = m68k_areg (regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword (flags));
count_read_ea++;
+ addr = true;
break;
case PC16: // (d16,PC)
printf ("\tuaecptr %sa;\n", name);
add_mmu040_movem (movem);
printf ("\t%sa = %s + %d;\n", name, getpc, m68k_pc_offset);
printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags));
+ addr = true;
break;
case Ad8r: // (d8,An,Xn)
switch (fetchmode)
}
count_read_ea++;
}
+ addr = true;
break;
case PC8r: // (d8,PC,Xn)
switch (fetchmode)
printf ("\t%sa = %s (tmppc, %s);\n", name, disp000, gen_nextiword (flags));
}
}
-
+ addr = true;
break;
case absw:
printf ("\tuaecptr %sa;\n", name);
add_mmu040_movem (movem);
printf ("\t%sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags));
pc_68000_offset_fetch += 2;
+ addr = true;
break;
case absl:
gen_nextilong2 ("uaecptr", namea, flags, movem);
count_read_ea += 2;
pc_68000_offset_fetch += 4;
pc_68000_offset_store += 2;
+ addr = true;
break;
case imm:
// fetch immediate address
do_instruction_buserror();
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case imm0:
if (getv != 1)
count_read_ea++;
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case imm1:
if (getv != 1)
count_read_ea++;
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case imm2:
if (getv != 1)
count_read_ea += 2;
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case immi:
if (getv != 1)
printf ("\tuae_u32 %s = %s;\n", name, reg);
maybeaddop_ce020 (flags);
syncmovepc (getv, flags);
+ strcpy(g_srcname, name);
return;
case am_unknown:
// reg = internal variable
printf("\tuae_u32 %sa = %s;\n", name, reg);
+ addr = true;
break;
default:
term ();
}
+ if (g_srcname[0] == 0) {
+ if (addr)
+ strcpy(g_srcname, namea);
+ else
+ strcpy(g_srcname, name);
+ }
+
do_instruction_buserror();
syncmovepc (getv, flags);
if (g_instr->size == sz_word) {
printf("\t\tm68k_areg (regs, %s) = %sa;\n", reg, name);
}
- } else if (mode == Apdi) {
+ } else if (mode == Apdi && g_instr->mnemo != i_LINK) {
// 68000 decrements register first, then checks for address error
// 68010 does not
if (cpu_level == 0)
setapdiback = 1;
}
+
if (exception_pc_offset)
incpc("%d", exception_pc_offset);
if (cpu_level == 1) {
printf("\t\topcode |= 0x20000;\n"); // upper byte of SSW is zero -flag.
}
+ } else if (g_instr->mnemo == i_LINK) {
+ // a7 -> a0 copy done before A7 address error check
+ printf("\tm68k_areg(regs, srcreg) = olda;\n");
+ setapdiback = 0;
}
if (setapdiback) {
printf("\t\t%sa += %d;\n", name, flags & GF_REVERSE2 ? -2 : 2);
if (exp3rw) {
- printf("\t\texception3_write(opcode, %sa, %d, %s, %d);\n",
- name, size, "0",
+ char *shift = size == sz_long ? " >> 16" : "";
+ printf("\t\texception3_write(opcode, %sa, %d, %s%s, %d);\n",
+ name, size, g_srcname, shift,
// PC-relative: FC=2
(getv == 1 && (g_instr->smode == PC16 || g_instr->smode == PC8r) ? 2 : 1) | fcmodeflags);
m68k_pc_offset = 2;
g_instr = curi;
+ g_srcname[0] = 0;
// do not unnecessarily create useless mmuop030
// functions when CPU is not 68030