#define CIASTARTCYCLESHI 3
#define CIASTARTCYCLESCRA 2
-static unsigned int ciaaicr, ciaaimask, ciabicr, ciabimask;
-static unsigned int ciaacra, ciaacrb, ciabcra, ciabcrb;
-static unsigned int ciaastarta, ciaastartb, ciabstarta, ciabstartb;
+static uae_u32 ciaaicr, ciaaimask, ciabicr, ciabimask;
+static uae_u32 ciaacra, ciaacrb, ciabcra, ciabcrb;
+static uae_u32 ciaastarta, ciaastartb, ciabstarta, ciabstartb;
/* Values of the CIA timers. */
-static unsigned long ciaata, ciaatb, ciabta, ciabtb;
+static uae_u32 ciaata, ciaatb, ciabta, ciabtb;
/* Computed by compute_passed_time. */
-static unsigned long ciaata_passed, ciaatb_passed, ciabta_passed, ciabtb_passed;
+static uae_u32 ciaata_passed, ciaatb_passed, ciabta_passed, ciabtb_passed;
-static unsigned long ciaatod, ciabtod, ciaatol, ciabtol, ciaaalarm, ciabalarm;
+static uae_u32 ciaatod, ciabtod, ciaatol, ciabtol, ciaaalarm, ciabalarm;
static int ciaatlatch, ciabtlatch;
static bool oldovl;
static bool led;
static int led_old_brightness;
-static unsigned long led_cycles_on, led_cycles_off, led_cycle;
+static uae_u32 led_cycles_on, led_cycles_off, led_cycle;
-unsigned int ciabpra;
+uae_u32 ciabpra;
-static unsigned long ciaala, ciaalb, ciabla, ciablb;
+static uae_u32 ciaala, ciaalb, ciabla, ciablb;
static int ciaatodon, ciabtodon;
-static unsigned int ciaapra, ciaaprb, ciaadra, ciaadrb, ciaasdr, ciaasdr_buf, ciaasdr_load, ciaasdr_cnt;
-static unsigned int ciabprb, ciabdra, ciabdrb, ciabsdr, ciabsdr_buf, ciabsdr_load, ciabsdr_cnt;
+static uae_u32 ciaapra, ciaaprb, ciaadra, ciaadrb, ciaasdr, ciaasdr_buf, ciaasdr_load, ciaasdr_cnt;
+static uae_u32 ciabprb, ciabdra, ciabdrb, ciabsdr, ciabsdr_buf, ciabsdr_load, ciabsdr_cnt;
static int div10;
static int kbstate, kblostsynccnt;
-static unsigned long kbhandshakestart;
+static uae_u32 kbhandshakestart;
static uae_u8 kbcode;
static uae_u8 serbits;
static struct rtc_msm_data rtc_msm;
static struct rtc_ricoh_data rtc_ricoh;
-static void setclr (unsigned int *p, unsigned int val)
+static void setclr (uae_u32 *p, uae_u32 val)
{
if (val & 0x80) {
*p |= val & 0x7F;
static void compute_passed_time (void)
{
- unsigned long int ccount = (get_cycles () - eventtab[ev_cia].oldcycles + div10);
- unsigned long int ciaclocks = ccount / DIV10;
+ uae_u32 ccount = (get_cycles () - eventtab[ev_cia].oldcycles + div10);
+ uae_u32 ciaclocks = ccount / DIV10;
ciaata_passed = ciaatb_passed = ciabta_passed = ciabtb_passed = 0;
/* CIA A timers */
if ((ciaacra & 0x21) == 0x01) {
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (cc > ciaastarta)
cc -= ciaastarta;
else
ciaata_passed = cc;
}
if ((ciaacrb & 0x61) == 0x01) {
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (cc > ciaastartb)
cc -= ciaastartb;
else
/* CIA B timers */
if ((ciabcra & 0x21) == 0x01) {
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (cc > ciabstarta)
cc -= ciabstarta;
else
ciabta_passed = cc;
}
if ((ciabcrb & 0x61) == 0x01) {
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (cc > ciabstartb)
cc -= ciabstartb;
else
static int CIA_update_check (void)
{
- unsigned long int ccount = (get_cycles () - eventtab[ev_cia].oldcycles + div10);
- unsigned long int ciaclocks = ccount / DIV10;
+ uae_u32 ccount = (get_cycles () - eventtab[ev_cia].oldcycles + div10);
+ uae_u32 ciaclocks = ccount / DIV10;
int aovfla = 0, aovflb = 0, asp = 0, bovfla = 0, bovflb = 0, bsp = 0;
int icr = 0;
// A INMODE=0
if ((ciaacra & 0x21) == 0x01) {
bool check = true;
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (ciaastarta > 0) {
if (cc > ciaastarta) {
cc -= ciaastarta;
// A INMODE=00
if ((ciaacrb & 0x61) == 0x01) {
bool check = true;
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (ciaastartb > 0) {
if (cc > ciaastartb) {
cc -= ciaastartb;
// A INMODE=0
if ((ciabcra & 0x21) == 0x01) {
bool check = true;
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (ciabstarta > 0) {
if (cc > ciabstarta) {
cc -= ciabstarta;
// B INMODE=00
if ((ciabcrb & 0x61) == 0x01) {
bool check = true;
- unsigned long int cc = ciaclocks;
+ uae_u32 cc = ciaclocks;
if (ciabstartb > 0) {
if (cc > ciabstartb) {
cc -= ciabstartb;
static void CIA_calctimers (void)
{
- long int ciaatimea = -1, ciaatimeb = -1, ciabtimea = -1, ciabtimeb = -1;
+ uae_s32 ciaatimea = -1, ciaatimeb = -1, ciabtimea = -1, ciabtimeb = -1;
int div10diff = DIV10 - div10;
eventtab[ev_cia].oldcycles = get_cycles ();
eventtab[ev_cia].active = (ciaatimea != -1 || ciaatimeb != -1
|| ciabtimea != -1 || ciabtimeb != -1);
if (eventtab[ev_cia].active) {
- unsigned long int ciatime = ~0L;
+ uae_u32 ciatime = ~0L;
if (ciaatimea != -1)
ciatime = ciaatimea;
if (ciaatimeb != -1 && ciaatimeb < ciatime)
RethinkICRA ();
}
-static bool checkalarm (unsigned long tod, unsigned long alarm, bool inc, int ab)
+static bool checkalarm (uae_u32 tod, uae_u32 alarm, bool inc, int ab)
{
if (tod == alarm)
return true;
static void calc_led (int old_led)
{
- unsigned long c = get_cycles ();
- unsigned long t = (c - led_cycle) / CYCLE_UNIT;
+ uae_u32 c = get_cycles ();
+ uae_u32 t = (c - led_cycle) / CYCLE_UNIT;
if (old_led)
led_cycles_on += t;
else
}
return bcdtod;
}
-static void setciatod(unsigned long *tod, uae_u32 v)
+static void setciatod(uae_u32 *tod, uae_u32 v)
{
if (!currprefs.cs_cia6526) {
*tod = v;
*tod = bintod;
}
-static uae_u8 ReadCIAA (unsigned int addr, uae_u32 *flags)
+static uae_u8 ReadCIAA (uae_u32 addr, uae_u32 *flags)
{
- unsigned int tmp;
+ uae_u32 tmp;
int reg = addr & 15;
compute_passed_time ();
return 0;
}
-static uae_u8 ReadCIAB (unsigned int addr, uae_u32 *flags)
+static uae_u8 ReadCIAB (uae_u32 addr, uae_u32 *flags)
{
- unsigned int tmp;
+ uae_u32 tmp;
int reg = addr & 15;
#if CIAB_DEBUG_R > 0
}
#ifndef CUSTOM_SIMPLE
- int div = (get_cycles() - eventtab[ev_cia].oldcycles) % DIV10;
+ uae_u32 diff = get_cycles() - eventtab[ev_cia].oldcycles;
+ int div = diff % DIV10;
int cycles = DIV10 - div;
if (cycles) {
if (currprefs.cpu_memory_cycle_exact)
nomore = 1;
}
-static unsigned int total_skipped = 0;
+static uae_u32 total_skipped = 0;
extern int cpu_last_stop_vpos, cpu_stopped_lines;
static int cpu_sleepmode, cpu_sleepmode_cnt;
/* Events */
-unsigned long int vsync_cycles;
+uae_u32 vsync_cycles;
static int extra_cycle;
static int rpt_did_reset;
}
-void do_cycles_ce(unsigned long cycles)
+void do_cycles_ce(uae_u32 cycles)
{
cycles += extra_cycle;
while (cycles >= CYCLE_UNIT) {
extra_cycle = cycles;
}
-void do_cycles_ce020(unsigned long cycles)
+void do_cycles_ce020(uae_u32 cycles)
{
unsigned long c;
int extra;
static const int pissoff_nojit_value = 256 * CYCLE_UNIT;
-unsigned long int event_cycles, nextevent, currcycle;
+uae_u32 event_cycles, nextevent, currcycle;
int is_syncline, is_syncline_end;
-long cycles_to_next_event;
-long max_cycles_to_next_event;
-long cycles_to_hsync_event;
-unsigned long start_cycles;
+int cycles_to_next_event;
+int max_cycles_to_next_event;
+int cycles_to_hsync_event;
+uae_u32 start_cycles;
bool event_wait;
frame_time_t vsyncmintime, vsyncmintimepre;
{
int i;
- unsigned long int mintime = ~0L;
+ uae_u32 mintime = ~0L;
for (i = 0; i < ev_max; i++) {
if (eventtab[i].active) {
- unsigned long int eventtime = eventtab[i].evtime - currcycle;
+ uae_u32 eventtime = eventtab[i].evtime - currcycle;
if (eventtime < mintime)
mintime = eventtime;
}
return false;
}
-void do_cycles_slow (unsigned long cycles_to_add)
+void do_cycles_slow (uae_u32 cycles_to_add)
{
#ifdef WITH_X86
#if 0
extern frame_time_t vsyncmaxtime, vsyncwaittime;
extern int vsynctimebase, syncbase;
extern void reset_frame_rate_hack (void);
-extern unsigned long int vsync_cycles;
-extern unsigned long start_cycles;
+extern uae_u32 vsync_cycles;
+extern uae_u32 start_cycles;
extern int event2_count;
extern bool event_wait;
extern void compute_vsynctime (void);
extern void init_eventtab (void);
-extern void do_cycles_ce (unsigned long cycles);
-extern void do_cycles_ce020 (unsigned long cycles);
+extern void do_cycles_ce (uae_u32 cycles);
+extern void do_cycles_ce020 (uae_u32 cycles);
extern void events_schedule (void);
-extern void do_cycles_slow (unsigned long cycles_to_add);
+extern void do_cycles_slow (uae_u32 cycles_to_add);
extern void events_reset_syncline(void);
extern bool is_cycle_ce(uaecptr);
-extern unsigned long currcycle, nextevent;
+extern uae_u32 currcycle, nextevent;
extern int is_syncline, is_syncline_end;
typedef void (*evfunc)(void);
typedef void (*evfunc2)(uae_u32);
-typedef unsigned long int evt;
+typedef unsigned int evt;
struct ev
{
}
}
-STATIC_INLINE void do_extra_cycles (unsigned long cycles_to_add)
+STATIC_INLINE void do_extra_cycles (uae_u32 cycles_to_add)
{
pissoff -= cycles_to_add;
}
-STATIC_INLINE unsigned long int get_cycles (void)
+STATIC_INLINE uae_u32 get_cycles (void)
{
return currcycle;
}
-STATIC_INLINE void set_cycles (unsigned long int x)
+STATIC_INLINE void set_cycles (uae_u32 x)
{
currcycle = x;
eventtab[ev_hsync].oldcycles = x;
extern int current_hpos(void);
-STATIC_INLINE bool cycles_in_range (unsigned long endcycles)
+STATIC_INLINE bool cycles_in_range (uae_u32 endcycles)
{
- signed long c = get_cycles ();
- return (signed long)endcycles - c > 0;
+ uae_s32 c = get_cycles ();
+ return (uae_s32)endcycles - c > 0;
}
extern void MISC_handler (void);
extern void dfc_nommu_put_word(uaecptr, uae_u32);
extern void dfc_nommu_put_long(uaecptr, uae_u32);
-extern void (*x_do_cycles)(unsigned long);
-extern void (*x_do_cycles_pre)(unsigned long);
-extern void (*x_do_cycles_post)(unsigned long, uae_u32);
+extern void (*x_do_cycles)(uae_u32);
+extern void (*x_do_cycles_pre)(uae_u32);
+extern void (*x_do_cycles_post)(uae_u32, uae_u32);
extern uae_u32 REGPARAM3 x_get_disp_ea_020 (uae_u32 base, int idx) REGPARAM;
extern uae_u32 REGPARAM3 x_get_disp_ea_ce020 (uae_u32 base, int idx) REGPARAM;
static void (*x2_put_long)(uaecptr,uae_u32);
static void (*x2_put_word)(uaecptr,uae_u32);
static void (*x2_put_byte)(uaecptr,uae_u32);
-static void (*x2_do_cycles)(unsigned long);
-static void (*x2_do_cycles_pre)(unsigned long);
-static void (*x2_do_cycles_post)(unsigned long, uae_u32);
+static void (*x2_do_cycles)(uae_u32);
+static void (*x2_do_cycles_pre)(uae_u32);
+static void (*x2_do_cycles_post)(uae_u32, uae_u32);
uae_u32 (*x_prefetch)(int);
uae_u32 (*x_next_iword)(void);
void (*x_cp_put_byte)(uaecptr,uae_u32);
uae_u32 (REGPARAM3 *x_cp_get_disp_ea_020)(uae_u32 base, int idx) REGPARAM;
-void (*x_do_cycles)(unsigned long);
-void (*x_do_cycles_pre)(unsigned long);
-void (*x_do_cycles_post)(unsigned long, uae_u32);
+void (*x_do_cycles)(uae_u32);
+void (*x_do_cycles_pre)(uae_u32);
+void (*x_do_cycles_post)(uae_u32, uae_u32);
uae_u32(*x_phys_get_iword)(uaecptr);
uae_u32(*x_phys_get_ilong)(uaecptr);
write_log (_T("cputracefunc2_x_put_byte %d <> %d\n"), v, val);
}
-static void cputracefunc_x_do_cycles (unsigned long cycles)
+static void cputracefunc_x_do_cycles (uae_u32 cycles)
{
while (cycles >= CYCLE_UNIT) {
cputrace.cyclecounter += CYCLE_UNIT;
}
}
-static void cputracefunc2_x_do_cycles (unsigned long cycles)
+static void cputracefunc2_x_do_cycles (uae_u32 cycles)
{
if (cputrace.cyclecounter > cycles) {
cputrace.cyclecounter -= cycles;
x_do_cycles (cycles);
}
-static void cputracefunc_x_do_cycles_pre (unsigned long cycles)
+static void cputracefunc_x_do_cycles_pre (uae_u32 cycles)
{
cputrace.cyclecounter_post = 0;
cputrace.cyclecounter_pre = 0;
}
// cyclecounter_pre = how many cycles we need to SWALLOW
// -1 = rerun whole access
-static void cputracefunc2_x_do_cycles_pre (unsigned long cycles)
+static void cputracefunc2_x_do_cycles_pre (uae_u32 cycles)
{
if (cputrace.cyclecounter_pre == -1) {
cputrace.cyclecounter_pre = 0;
x_do_cycles (cycles);
}
-static void cputracefunc_x_do_cycles_post (unsigned long cycles, uae_u32 v)
+static void cputracefunc_x_do_cycles_post (uae_u32 cycles, uae_u32 v)
{
if (cputrace.memoryoffset < 1) {
#if CPUTRACE_DEBUG
cputrace.cyclecounter_post = 0;
}
// cyclecounter_post = how many cycles we need to WAIT
-static void cputracefunc2_x_do_cycles_post (unsigned long cycles, uae_u32 v)
+static void cputracefunc2_x_do_cycles_post (uae_u32 cycles, uae_u32 v)
{
uae_u32 c;
if (cputrace.cyclecounter_post) {
x_do_cycles (c);
}
-static void do_cycles_post (unsigned long cycles, uae_u32 v)
+static void do_cycles_post (uae_u32 cycles, uae_u32 v)
{
do_cycles (cycles);
}
-static void do_cycles_ce_post (unsigned long cycles, uae_u32 v)
+static void do_cycles_ce_post (uae_u32 cycles, uae_u32 v)
{
do_cycles_ce (cycles);
}
-static void do_cycles_ce020_post (unsigned long cycles, uae_u32 v)
+static void do_cycles_ce020_post (uae_u32 cycles, uae_u32 v)
{
do_cycles_ce020 (cycles);
}
flush_cpu_caches(flush);
}
-STATIC_INLINE void count_instr (unsigned int opcode)
+STATIC_INLINE void count_instr (uae_u32 opcode)
{
}
static void build_cpufunctbl (void)
{
int i, opcnt;
- unsigned long opcode;
+ uae_u32 opcode;
const struct cputbl *tbl = NULL;
int lvl, mode, jit;
}
#define CYCLES_DIV 8192
-static unsigned long cycles_mult;
+static uae_u32 cycles_mult;
static void update_68k_cycles (void)
{
} else {
if (currprefs.m68k_speed >= 0 && !currprefs.cpu_cycle_exact && !currprefs.cpu_compatible) {
if (currprefs.m68k_speed_throttle < 0) {
- cycles_mult = (unsigned long)(CYCLES_DIV * 1000 / (1000 + currprefs.m68k_speed_throttle));
+ cycles_mult = (uae_u32)(CYCLES_DIV * 1000 / (1000 + currprefs.m68k_speed_throttle));
} else if (currprefs.m68k_speed_throttle > 0) {
- cycles_mult = (unsigned long)(CYCLES_DIV * 1000 / (1000 + currprefs.m68k_speed_throttle));
+ cycles_mult = (uae_u32)(CYCLES_DIV * 1000 / (1000 + currprefs.m68k_speed_throttle));
}
}
}