VHPOSW tricks more accurately emulated, most of hacks removed (Smooth Copper / Upfront)

diff --git a/custom.cpp b/custom.cpp
index 511b0cac284ef981724eaaf63908f291a395c1fc..363bef8ddb7427d04eb7d35c25f0d312008f916e 100644 (file)
--- a/custom.cpp
+++ b/custom.cpp
@@ -307,6 +307,7 @@ int maxhpos_short = MAXHPOS_PAL;
 int maxvpos = MAXVPOS_PAL;
 int maxvpos_nom = MAXVPOS_PAL; // nominal value (same as maxvpos but "faked" maxvpos in fake 60hz modes)
 int maxvpos_display = MAXVPOS_PAL; // value used for display size
+static int maxhpos_temp; // line being >maxhpos due to VHPOSW tricks
 static int maxhpos_display = AMIGA_WIDTH_MAX;
 int maxvpos_display_vsync; // extra lines from top visible in bottom
 static int vblank_extraline;
@@ -416,8 +417,8 @@ static int sprite_width, sprres;
 static int sprite_sprctlmask;
 int sprite_buffer_res;
 
-uae_u8 cycle_line_slot[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST];
-uae_u16 cycle_line_pipe[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST];
+uae_u8 cycle_line_slot[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST + MAX_CHIPSETSLOTS_EXTRA];
+uae_u16 cycle_line_pipe[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST + MAX_CHIPSETSLOTS_EXTRA];
 static uae_u8 cycle_line_slot_last;
 
 static uae_s16 bpl1mod, bpl2mod, bpl1mod_prev, bpl2mod_prev;
@@ -632,7 +633,7 @@ static int toscr_delay_adjusted[2], toscr_delay_sh[2];
 static bool shdelay_disabled;
 static int delay_cycles, delay_cycles2;
 static int delay_lastcycle[2], delay_hsynccycle;
-static int hack_delay_shift;
+static int vhposr_delay_offset, vhposr_sprite_offset;
 static bool bplcon1_written;
 static bool bplcon0_planes_changed;
 static bool sprites_enabled_this_line;
@@ -1862,9 +1863,9 @@ static void clear_bitplane_pipeline(int type)
 #define ESTIMATED_FETCH_MODE 1
 #define OPTIMIZED_ESTIMATE 1
 
-static uae_s8 estimated_cycles_buf0[256];
-static uae_s8 estimated_cycles_buf1[256];
-static uae_s8 estimated_cycles_empty[256];
+static uae_s8 estimated_cycles_buf0[MAX_CHIPSETSLOTS + MAX_CHIPSETSLOTS_EXTRA];
+static uae_s8 estimated_cycles_buf1[MAX_CHIPSETSLOTS + MAX_CHIPSETSLOTS_EXTRA];
+static uae_s8 estimated_cycles_empty[MAX_CHIPSETSLOTS + MAX_CHIPSETSLOTS_EXTRA];
 static int estimate_cycles_empty_index = -1;
 static uae_u16 estimated_bplcon0, estimated_fm, estimated_plfstrt, estimated_plfstop;
 static uae_s8 *estimated_cycles = estimated_cycles_empty;
@@ -5121,7 +5122,7 @@ static void record_color_change(int hpos, int regno, uae_u32 value)
                remember_ctable();
        }
 
-       hpos += hack_delay_shift;
+       hpos += vhposr_delay_offset;
 
        record_color_change2(hpos, regno, value);
 }
@@ -5713,7 +5714,7 @@ static void decide_sprites(int hpos, bool usepointx, bool quick)
        count = 0;
        for (int i = 0; i < MAX_SPRITES; i++) {
                struct sprite *s = &spr[i];
-               int xpos = (spr[i].xpos + hdiw_counter_sconflict) & hdiw_counter_sconflict_mask;
+               int xpos = (spr[i].xpos + hdiw_counter_sconflict + vhposr_sprite_offset) & hdiw_counter_sconflict_mask;
                int sprxp = (fmode & 0x8000) ? (xpos & ~sscanmask) : xpos;
                int hw_xp = sprxp >> sprite_buffer_res;
                int pointx = usepointx && (s->ctl & sprite_sprctlmask) ? 0 : 1;
@@ -6029,7 +6030,6 @@ static void reset_decisions_scanline_start(void)
        last_diw_hpos = 0;
        last_diw_hpos2 = 0;
        blt_info.finishhpos = -1;
-       hack_delay_shift = 0;
 
        /* Default to no bitplane DMA overriding sprite DMA */
        plfstrt_sprite = 0x100;
@@ -6120,6 +6120,9 @@ static void reset_decisions_hsync_start(void)
        last_recorded_diw_hpos = 0;
        collision_hpos = 0;
 
+       vhposr_delay_offset = 0;
+       vhposr_sprite_offset = 0;
+
        compute_toscr_delay(bplcon1);
 
        last_diwlastword = -1;
@@ -7668,15 +7671,22 @@ static void vhpos_adj(uae_u16 *hpp, uae_u16 *vpp)
 
 static uae_u16 VPOSR(void)
 {
-       unsigned int csbit = 0;
+       uae_u16 csbit = 0;
        uae_u16 vp = GETVPOS();
        uae_u16 hp = GETHPOS();
-       int lof = lof_store;
+       int lofr = lof_store;
+       int lolr = lol;
 
-       if (vp + 1 == maxvpos + lof_store && (hp == maxhpos - 1 || hp == maxhpos - 2)) {
-               // lof toggles 2 cycles before maxhpos, so do fake toggle here.
-               if ((bplcon0 & 4) && CPU_ACCURATE) {
-                       lof = lof ? 0 : 1;
+       if (hp == 0) {
+               // LOF and LOL toggles when HPOS=1
+               // Return pre-toggled value if VPOSR is read when HPOS=0
+               if (vp == 0) {
+                       if ((bplcon0 & 4) && CPU_ACCURATE) {
+                               lofr = lofr ? 0 : 1;
+                       }
+               }
+               if (islinetoggle()) {
+                       lolr = lolr ? 0 : 1;
                }
        }
        vhpos_adj(&hp, &vp);
@@ -7701,11 +7711,10 @@ static uae_u16 VPOSR(void)
 
        if (!ecs_agnus) {
                vp &= 1;
+       } else {
+               vp |= lolr ? 0x80 : 0;
        }
-       vp |= (lof ? 0x8000 : 0) | csbit;
-       if (ecs_agnus) {
-               vp |= lol ? 0x80 : 0;
-       }
+       vp |= (lofr ? 0x8000 : 0) | csbit;
        hsyncdelay();
 #if 0
        if (1 || (M68K_GETPC < 0x00f00000 || M68K_GETPC >= 0x10000000))
@@ -7749,7 +7758,7 @@ static void VPOSW(uae_u16 v)
        vb_check();
 }
 
-static void VHPOSW(uae_u16 v)
+static void VHPOSW_delayed(uae_u32 v)
 {
        int oldvpos = vpos;
        int newvpos = vpos;
@@ -7758,24 +7767,79 @@ static void VHPOSW(uae_u16 v)
                write_log (_T("VHPOSW %04X PC=%08x\n"), v, M68K_GETPC);
 #endif
 
-       if (currprefs.cpu_memory_cycle_exact && currprefs.cpu_model == 68000) {
-               /* Special hack for Smooth Copper in CoolFridge / Upfront demo */
-               int chp = current_hpos_safe() - 4;
-               int hp = v & 0xff;
-               if (chp >= 0x21 && chp <= 0x29 && hp == 0x2d) {
-                       hack_delay_shift = 4;
-                       record_color_change(chp, 0, COLOR_CHANGE_HSYNC_HACK | 6);
-                       thisline_changed = 1;
-               }
+       int hpos_org = current_hpos();
+       int hpos = hpos_org;
+       int hnew = (v & 0xff);
+       int hnew_org = hnew;
+       bool newinc = false;
+       if (hpos == 0 || hpos == 1) {
+               hpos += maxhpos;
+       }
+       if (hnew == 0 || hnew == 1) {
+               hnew += maxhpos;
+               newinc = true;
        }
-
-       int hpos = current_hpos();
-       int hnew = v & 0xff;
        int hdiff = hnew - hpos;
+       //write_log("%02x %02x %d\n", hpos_org, hnew_org, hdiff);
        if (copper_access && (hdiff & 1)) {
                write_log("VHPOSW write %04X. New horizontal value is odd. Copper confusion possible.\n", v);
        }
-       modify_eventcounter(-(hdiff - 2));
+
+       int hpos2 = 0;
+
+       delay_cycles += ((-hdiff * 8 - 2) & 7) << LORES_TO_SHRES_SHIFT;
+       if (hdiff & 1) {
+               vhposr_delay_offset = 1;
+       }
+       vhposr_sprite_offset += (hdiff * 4 - 2) << sprite_buffer_res;
+
+       if (newinc && hnew == maxhpos + 1) {
+               // 0000 -> 0001 (0 and 1 are part of previous line, vpos increases when hpos=1). No need to do anything
+       } else if (hnew >= maxhpos) {
+               // maxhpos check skip: counter counts until it wraps around 0xFF->0x00
+               int hdiff2 = (0x100 - hnew) - (maxhpos - hpos);
+               hdiff2 *= CYCLE_UNIT;
+               hdiff *= CYCLE_UNIT;
+               eventtab[ev_hsync].evtime += hdiff2;
+               eventtab[ev_hsync].oldcycles = get_cycles() - hnew * CYCLE_UNIT;
+               eventtab[ev_hsynch].evtime += hdiff2;
+               eventtab[ev_hsynch].oldcycles += hdiff2;
+               maxhpos_temp = 0x100;
+               hpos2 = current_hpos_safe();
+       } else {
+               hdiff = -hdiff;
+               hdiff *= CYCLE_UNIT;
+               for (;;) {
+                       eventtab[ev_hsync].evtime += hdiff;
+                       eventtab[ev_hsync].oldcycles += hdiff;
+                       eventtab[ev_hsynch].evtime += hdiff;
+                       eventtab[ev_hsynch].oldcycles += hdiff;
+                       hpos2 = current_hpos_safe();
+                       if (hpos2 >= 0 && hpos < 256) {
+                               // don't allow line crossing, restore original value
+                               break;
+                       }
+                       hdiff -= hdiff;
+               }
+               events_schedule();
+       }
+
+#ifdef DEBUGGER
+       if (newvpos == oldvpos && hdiff) {
+               record_dma_reoffset(vpos, hpos, hnew);
+       }
+#endif
+
+       if (hdiff) {
+               int hold = hpos;
+               memset(cycle_line_slot + MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST, 0, sizeof(uae_u8) * MAX_CHIPSETSLOTS_EXTRA);
+               memset(cycle_line_pipe + MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST, 0, sizeof(uae_u16) * MAX_CHIPSETSLOTS_EXTRA);
+               int total = (MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST + MAX_CHIPSETSLOTS_EXTRA) - (hnew > hold ? hnew : hold);
+               if (total > 0) {
+                       memmove(cycle_line_slot + hnew, cycle_line_slot + hold, total * sizeof(uae_u8));
+                       memmove(cycle_line_pipe + hnew, cycle_line_pipe + hold, total * sizeof(uae_u16));
+               }
+       }
 
        v >>= 8;
        newvpos &= 0xff00;
@@ -7784,7 +7848,7 @@ static void VHPOSW(uae_u16 v)
                cia_adjust_eclock_phase((newvpos - oldvpos) * maxhpos);
                vposw_change++;
 #ifdef DEBUGGER
-               record_dma_hsync(hpos + 2);
+               record_dma_hsync(hpos_org);
                if (debug_dma) {
                        int vp = vpos;
                        vpos = newvpos;
@@ -7800,10 +7864,16 @@ static void VHPOSW(uae_u16 v)
        }
        vpos = newvpos;
        vb_check();
+
 #if 0
        if (vpos < oldvpos)
                vposback (oldvpos);
 #endif
+} 
+
+static void VHPOSW(uae_u16 v)
+{
+       event2_newevent_xx(-1, 2 * CYCLE_UNIT, v, VHPOSW_delayed);
 }
 
 static uae_u16 VHPOSR(void)
@@ -8768,7 +8838,7 @@ static void bplcon0_denise_reschange(int res, int oldres)
                if (oldres == RES_HIRES && res == RES_LORES) {
                        toscr_special_skip_ptr = toscr_spc_ecs_hires_to_lores;
                }
-       } else if (0) {
+       } else if (1) {
                if (oldres == RES_LORES && res == RES_HIRES) {
                        toscr_special_skip_ptr = toscr_spc_ocs_lores_to_hires;
                }
@@ -12561,7 +12631,7 @@ static void hsync_handlerh(bool onvsync)
        events_schedule();
 }
 
-static void set_hpos(void)
+static void set_hpos()
 {
        line_start_cycles = (get_cycles() + CYCLE_UNIT - 1) & ~(CYCLE_UNIT - 1);
        maxhposeven_prev = maxhposeven;
@@ -12570,11 +12640,6 @@ static void set_hpos(void)
        maxhposeven = (maxhpos & 1) == 0;
        eventtab[ev_hsync].evtime = line_start_cycles + HSYNCTIME;
        eventtab[ev_hsync].oldcycles = line_start_cycles;
-#ifdef DEBUGGER
-       if (debug_dma) {
-               record_dma_hsync(maxhpos);
-       }
-#endif
 }
 
 // this finishes current line
@@ -12630,6 +12695,20 @@ static void hsync_handler_pre(bool onvsync)
 
        hsync_counter++;
 
+       int currentmaxhp = current_hpos();
+#ifdef DEBUGGER
+       if (debug_dma) {
+               record_dma_hsync(currentmaxhp);
+       }
+#endif
+       // just to be sure
+       if (currentmaxhp > 0) {
+               cycle_line_slot_last = cycle_line_slot[currentmaxhp - 1];
+       } else {
+               cycle_line_slot_last = 0;
+       }
+       set_hpos();
+
        vpos_prev = vpos;
        vpos++;
        vpos_count++;
@@ -12655,9 +12734,6 @@ static void hsync_handler_pre(bool onvsync)
        else
                lol = 0;
 
-       cycle_line_slot_last = cycle_line_slot[maxhpos - 1];
-       set_hpos();
-
        // to record decisions correctly between end of scanline and start of hsync
        if (!eventtab[ev_hsynch].active) {
                eventtab[ev_hsynch].evtime = get_cycles() + hsyncstartpos_start_cycles * CYCLE_UNIT;
@@ -13381,7 +13457,8 @@ static void delayed_framestart(uae_u32 v)
 // this prepares for new line
 static void hsync_handler_post(bool onvsync)
 {
-       memset(cycle_line_slot, 0, maxhpos + 1);
+       memset(cycle_line_slot, 0, maxhpos_temp > maxhpos ? maxhpos_temp + 1 : maxhpos + 1);
+       maxhpos_temp = 0;
 
        // genlock active:
        // vertical: interlaced = toggles every other field, non-interlaced = both fields (normal)
@@ -13882,7 +13959,7 @@ static void audio_evhandler2(void)
        audio_evhandler();
 }
 
-void init_eventtab (void)
+void init_eventtab(void)
 {
        if (!savestate_state) {
                clear_events();
@@ -13900,13 +13977,13 @@ void init_eventtab (void)
 
        eventtab2[ev2_blitter].handler = blitter_handler;
 
-       events_schedule ();
+       events_schedule();
 }
 
-void custom_prepare (void)
+void custom_prepare(void)
 {
-       set_hpos ();
-       hsync_handler_post (true);
+       set_hpos();
+       hsync_handler_post(true);
 }
 
 void custom_cpuchange(void)

diff --git a/debug.cpp b/debug.cpp
index ec55eccc78dd240aef5c03c5a844bea3b341383c..0924e5f7f7aad464f30da4a90e4d2011815dbb9e 100644 (file)
--- a/debug.cpp
+++ b/debug.cpp
@@ -1317,7 +1317,7 @@ struct cop_rec
 static struct cop_rec *cop_record[2];
 static int nr_cop_records[2], curr_cop_set, selected_cop_set;
 
-#define NR_DMA_REC_HPOS 256
+#define NR_DMA_REC_HPOS 288
 #define NR_DMA_REC_VPOS 1000
 static struct dma_rec *dma_record[2];
 static int dma_record_toggle, dma_record_frame[2];
@@ -1330,6 +1330,7 @@ static void record_dma_clear(int r)
                        struct dma_rec *dr2 = &dr[v * NR_DMA_REC_HPOS + h];
                        memset(dr2, 0, sizeof(struct dma_rec));
                        dr2->reg = 0xffff;
+                       dr2->hpos = -1;
                        dr2->cf_reg = 0xffff;
                        dr2->addr = 0xffffffff;
                }
@@ -1339,8 +1340,14 @@ static void record_dma_clear(int r)
 static void dma_record_init(void)
 {
        if (!dma_record[0]) {
-               dma_record[0] = xmalloc(struct dma_rec, NR_DMA_REC_HPOS * NR_DMA_REC_VPOS);
-               dma_record[1] = xmalloc(struct dma_rec, NR_DMA_REC_HPOS * NR_DMA_REC_VPOS);
+               dma_record[0] = xcalloc(struct dma_rec, NR_DMA_REC_HPOS * NR_DMA_REC_VPOS + 2);
+               dma_record[1] = xcalloc(struct dma_rec, NR_DMA_REC_HPOS * NR_DMA_REC_VPOS + 2);
+               dma_record[0]->vpos = -1;
+               dma_record[1]->vpos = -1;
+               dma_record[0]->end = 1;
+               dma_record[1]->end = 1;
+               dma_record[0]++;
+               dma_record[1]++;
                record_dma_reset(0);
                dma_record_toggle = 0;
                dma_record_frame[0] = -1;
@@ -1477,6 +1484,7 @@ static void set_debug_colors(void)
 
 static int cycles_toggle;
 static int record_dma_maxhpos, record_dma_maxvpos;
+static int dma_record_hoffset;
 
 static void debug_draw_cycles(uae_u8 *buf, int bpp, int line, int width, int height, uae_u32 *xredcolors, uae_u32 *xgreencolors, uae_u32 *xbluescolors)
 {
@@ -1936,21 +1944,46 @@ void record_dma_vsync(int vp)
        dr->end = true;
 
        record_dma_maxvpos = vp;
-
+       dma_record_hoffset = 0;
        cycles_toggle = cycles_toggle ? 0 : 1;
 }
 
+void record_dma_reoffset(int vp, int oldhpos, int newhpos)
+{
+       if (!dma_record[0])
+               return;
+
+       int hp = newhpos + dma_record_hoffset;
+       struct dma_rec *dr = &dma_record[dma_record_toggle][vp * NR_DMA_REC_HPOS + hp];
+       dma_record_hoffset -= newhpos - oldhpos;
+#if 0
+       dr->vpos = vp;
+       dr->hpos = oldhpos;
+#endif
+       if (dma_record_hoffset >= NR_DMA_REC_HPOS) {
+               dma_record_hoffset = NR_DMA_REC_HPOS - 1;
+       }
+       if (dma_record_hoffset <= -NR_DMA_REC_HPOS) {
+               dma_record_hoffset = -NR_DMA_REC_HPOS + 1;
+       }
+}
+
 void record_dma_hsync(int lasthpos)
 {
        struct dma_rec *dr;
 
        if (!dma_record[0])
                return;
-       if (lasthpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
-               return;
 
+       lasthpos += dma_record_hoffset;
+       if (lasthpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS) {
+               dma_record_hoffset = 0;
+               return;
+       }
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + lasthpos];
        dr->end = true;
+       lasthpos -= dma_record_hoffset;
+       dma_record_hoffset = 0;
 
        if (vpos == 0) {
                record_dma_maxhpos = lasthpos;
@@ -1975,12 +2008,16 @@ void record_dma_hsync(int lasthpos)
 void record_dma_ipl(int hpos, int vpos)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        if (!dma_record[0])
                return;
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->intlev = regs.intmask;
        dr->ipl = regs.ipl_pin;
        dr->evt2 |= DMA_EVENT2_IPL;
@@ -1989,12 +2026,16 @@ void record_dma_ipl(int hpos, int vpos)
 void record_dma_ipl_sample(int hpos, int vpos)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        if (!dma_record[0])
                return;
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->intlev = regs.intmask;
        dr->ipl2 = regs.ipl_pin;
        dr->evt2 |= DMA_EVENT2_IPLSAMPLE;
@@ -2003,12 +2044,16 @@ void record_dma_ipl_sample(int hpos, int vpos)
 void record_dma_event(uae_u32 evt, int hpos, int vpos)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        if (!dma_record[0])
                return;
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->evt |= evt;
        dr->ipl = regs.ipl_pin;
 }
@@ -2016,12 +2061,16 @@ void record_dma_event(uae_u32 evt, int hpos, int vpos)
 void record_dma_event2(uae_u32 evt2, int hpos, int vpos)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        if (!dma_record[0])
                return;
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->evt2 |= evt2;
        dr->ipl = regs.ipl_pin;
 }
@@ -2029,12 +2078,16 @@ void record_dma_event2(uae_u32 evt2, int hpos, int vpos)
 void record_dma_event_data(uae_u32 evt, int hpos, int vpos, uae_u32 data)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        if (!dma_record[0])
                return;
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->evt |= evt;
        dr->evtdata = data;
        dr->evtdataset = true;
@@ -2046,6 +2099,7 @@ void record_dma_replace(int hpos, int vpos, int type, int extra)
        struct dma_rec *dr;
        if (!dma_record[0])
                return;
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
        dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
@@ -2068,11 +2122,13 @@ static void dma_conflict(int vpos, int hpos, struct dma_rec *dr, int reg, bool w
 void record_dma_write(uae_u16 reg, uae_u32 dat, uae_u32 addr, int hpos, int vpos, int type, int extra)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        if (!dma_record[0]) {
                dma_record_init();
        }
 
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
 
@@ -2085,6 +2141,8 @@ void record_dma_write(uae_u16 reg, uae_u32 dat, uae_u32 addr, int hpos, int vpos
                dma_conflict(vpos, hpos, dr, reg, false);
                return;
        }
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->reg = reg;
        dr->dat = dat;
        dr->addr = addr;
@@ -2100,6 +2158,7 @@ void record_dma_write(uae_u16 reg, uae_u32 dat, uae_u32 addr, int hpos, int vpos
 struct dma_rec *last_dma_rec;
 void record_dma_read_value_pos(uae_u32 v, int hpos, int vpos)
 {
+       hpos += dma_record_hoffset;
        struct dma_rec *dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
        last_dma_rec = dr;
        record_dma_read_value(v);
@@ -2132,6 +2191,7 @@ bool record_dma_check(int hpos, int vpos)
        if (!dma_record[0]) {
                return false;
        }
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS) {
                return false;
        }
@@ -2143,6 +2203,7 @@ void record_dma_clear(int hpos, int vpos)
        if (!dma_record[0]) {
                return;
        }
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS) {
                return;
        }
@@ -2154,9 +2215,11 @@ void record_dma_clear(int hpos, int vpos)
 void record_cia_access(int r, int mask, uae_u16 value, bool rw, int hpos, int vpos, int phase)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        dma_record_init();
 
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
 
@@ -2166,6 +2229,8 @@ void record_cia_access(int r, int mask, uae_u16 value, bool rw, int hpos, int vp
        if (dr->ciaphase < 0) {
                return;
        }
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->ciamask = mask;
        dr->ciareg = r;
        dr->ciavalue = value;
@@ -2176,9 +2241,11 @@ void record_cia_access(int r, int mask, uae_u16 value, bool rw, int hpos, int vp
 void record_dma_read(uae_u16 reg, uae_u32 addr, int hpos, int vpos, int type, int extra)
 {
        struct dma_rec *dr;
+       int hp = hpos;
 
        dma_record_init();
 
+       hpos += dma_record_hoffset;
        if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
                return;
 
@@ -2192,6 +2259,8 @@ void record_dma_read(uae_u16 reg, uae_u32 addr, int hpos, int vpos, int type, in
                }
                return;
        }
+       dr->hpos = hp;
+       dr->vpos = vpos;
        dr->reg = reg;
        dr->dat = 0;
        dr->addr = addr;
@@ -2205,7 +2274,7 @@ void record_dma_read(uae_u16 reg, uae_u32 addr, int hpos, int vpos, int type, in
        debug_mark_refreshed(dr->addr);
 }
 
-static bool get_record_dma_info(struct dma_rec *dr, int hpos, int vpos, TCHAR *l1, TCHAR *l2, TCHAR *l3, TCHAR *l4, TCHAR *l5, TCHAR *l6, uae_u32 *split, int *iplp)
+static bool get_record_dma_info(struct dma_rec *drs, struct dma_rec *dr, TCHAR *l1, TCHAR *l2, TCHAR *l3, TCHAR *l4, TCHAR *l5, TCHAR *l6, uae_u32 *split, int *iplp)
 {
        int longsize = dr->size;
        bool got = false;
@@ -2232,6 +2301,27 @@ static bool get_record_dma_info(struct dma_rec *dr, int hpos, int vpos, TCHAR *l
        if (l6)
                l6[0] = 0;
 
+       int hpos = dr->hpos;
+       if (hpos < 0) {
+               struct dma_rec *dr2 = dr;
+               int cnt = 0;
+               while (!dr2->end) {
+                       if (dr2 == drs) {
+                               hpos = dr - drs;
+                               break;
+                       }
+                       if (dr2->hpos >= 0) {
+                               hpos = dr2->hpos + cnt;
+                               break;
+                       }
+                       cnt++;
+                       dr2--;
+               }
+       }
+       if (hpos < 0) {
+               hpos = 0;
+       }
+
        if (split) {
                if ((dr->evt & DMA_EVENT_CPUINS) && dr->evtdataset) {
                        *split = dr->evtdata;
@@ -2568,7 +2658,7 @@ static void decode_dma_record(int hpos, int vpos, int toggle, bool logfile)
                        TCHAR l1l[16], l2l[16], l3l[16], l4l[16], l5l[16], l6l[16];
                        uae_u32 split = 0xffffffff;
 
-                       get_record_dma_info(dr, h, vpos, l1l, l2l, l3l, l4l, l5l, l6l, &split, &ipl);
+                       get_record_dma_info(dr_start, dr, l1l, l2l, l3l, l4l, l5l, l6l, &split, &ipl);
 
                        TCHAR *p = l1 + _tcslen(l1);
                        _stprintf(p, _T("%11s  "), l1l);
@@ -4660,8 +4750,8 @@ static void writeintomem (TCHAR **c)
                } else {
                        for (;;) {
                                bool err;
-                               ignore_ws (c);
-                               if (!more_params (c))
+                               ignore_ws(c);
+                               if (!more_params(c))
                                        break;
                                val = readhex(c, &len, &err);
                                if (err) {
@@ -6239,17 +6329,20 @@ static void dma_disasm(int frames, int vp, int hp, int frames_end, int vp_end, i
        if (!dma_record[0] || frames < 0 || vp < 0 || hp < 0)
                return;
        for (;;) {
-               struct dma_rec *dr = NULL;
-               if (dma_record_frame[0] == frames)
+               struct dma_rec *dr = NULL, *drs = NULL;
+               if (dma_record_frame[0] == frames) {
+                       drs = &dma_record[0][vp * NR_DMA_REC_HPOS];
                        dr = &dma_record[0][vp * NR_DMA_REC_HPOS + hp];
-               else if (dma_record_frame[1] == frames)
+               } else if (dma_record_frame[1] == frames) {
+                       drs = &dma_record[1][vp * NR_DMA_REC_HPOS];
                        dr = &dma_record[1][vp * NR_DMA_REC_HPOS + hp];
+               }
                if (!dr)
                        return;
                TCHAR l1[16], l2[16], l3[16], l4[16];
-               if (get_record_dma_info(dr, hp, vp, l1, l2, l3, l4, NULL, NULL, NULL, NULL)) {
+               if (get_record_dma_info(drs, dr, l1, l2, l3, l4, NULL, NULL, NULL, NULL)) {
                        TCHAR tmp[256];
-                       _stprintf(tmp, _T(" - %02d %02X %s"), dr->ipl, hp, l2);
+                       _stprintf(tmp, _T(" - %02d %02X %s"), dr->ipl, dr->hpos, l2);
                        while (_tcslen(tmp) < 18) {
                                _tcscat(tmp, _T(" "));
                        }

diff --git a/drawing.cpp b/drawing.cpp
index 8be23d615795f63fe52bbe8ed4551794818025df..973cb0ba2d307e93fb32fae62550d4b6703e0df0 100644 (file)
--- a/drawing.cpp
+++ b/drawing.cpp
@@ -3703,8 +3703,6 @@ static void do_color_changes(line_draw_func worker_border, line_draw_func worker
                                        colors_for_drawing.extra &= ~(1 << (CE_SHRES_DELAY_SHIFT + 1));
                                        colors_for_drawing.extra |= (value & 3) << CE_SHRES_DELAY_SHIFT;
                                        pfield_expand_dp_bplcon();
-                               } else if (value & COLOR_CHANGE_HSYNC_HACK) {
-                                       hsync_shift_hack = (uae_s8)value;
                                }
                        }
                }

diff --git a/events.cpp b/events.cpp
index 3f1f1d2179602577558f0558963838d9e8d0ecfe..6503c55c0c22fc2ce0e4a216d47a6a8e6cf94a2b 100644 (file)
--- a/events.cpp
+++ b/events.cpp
@@ -464,52 +464,6 @@ int current_hpos(void)
        return hp;
 }
 
-// emulate VPOSHW writes changing cycle counter
-void modify_eventcounter(int diff)
-{
-       if (diff == 0) {
-               return;
-       }
-
-       int hpos = current_hpos();
-
-       // fake >HTOTAL change delays
-       if (hpos + diff >= maxhpos) {
-               int dd = maxhpos - (hpos + diff);
-               diff += dd;
-       } else if (hpos + diff < 0) {
-               diff = (maxhpos - (0x100 - hpos + diff));
-       }
-
-       int cdiff = diff * CYCLE_UNIT;
-       if (cdiff < 0) {
-               if (currcycle >= cdiff) {
-                       currcycle -= cdiff;
-               } else {
-                       cdiff = -(int)currcycle;
-                       currcycle = 0;
-               }
-       } else {
-               currcycle += cdiff;
-       }
-
-       cia_adjust_eclock_phase(diff);
-
-       // adjust all existing timers
-       for (int i = 0; i < ev_max; i++) {
-               if (i != ev_hsync && i != ev_hsynch) {
-                       eventtab[i].evtime += cdiff;
-                       eventtab[i].oldcycles += cdiff;
-               }
-       }
-
-       for (int i = 0; i < ev2_max; i++) {
-               eventtab2[i].evtime += cdiff;
-       }
-
-       events_schedule();
-}
-
 void clear_events(void)
 {
        nextevent = EVT_MAX;

diff --git a/include/custom.h b/include/custom.h
index 845471c908caf7d65b423aa79f0ee8709d23ddd5..d906221495f74102c5b8aeecb76c5f0eab02809c 100644 (file)
--- a/include/custom.h
+++ b/include/custom.h
@@ -271,8 +271,9 @@ bool get_ras_cas(uaecptr, int*, int*);
 
 #define RGA_PIPELINE_ADJUST 4
 #define MAX_CHIPSETSLOTS 256
-extern uae_u8 cycle_line_slot[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST];
-extern uae_u16 cycle_line_pipe[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST];
+#define MAX_CHIPSETSLOTS_EXTRA 12
+extern uae_u8 cycle_line_slot[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST + MAX_CHIPSETSLOTS_EXTRA];
+extern uae_u16 cycle_line_pipe[MAX_CHIPSETSLOTS + RGA_PIPELINE_ADJUST + MAX_CHIPSETSLOTS_EXTRA];
 
 #define CYCLE_PIPE_CPUSTEAL 0x8000
 #define CYCLE_PIPE_NONE 0x4000

diff --git a/include/debug.h b/include/debug.h
index e5ce9e17caf7e5543f7504849ed1d88f60113b68..50b4d3208bdaebd2384466d5d170865f715db2d4 100644 (file)
--- a/include/debug.h
+++ b/include/debug.h
@@ -223,6 +223,7 @@ extern struct peekdma peekdma_data;
 
 struct dma_rec
 {
+       int hpos, vpos;
     uae_u16 reg;
     uae_u64 dat;
        uae_u16 size;
@@ -305,6 +306,7 @@ extern void record_dma_clear(int hpos, int vpos);
 extern bool record_dma_check(int hpos, int vpos);
 extern void record_dma_hsync(int);
 extern void record_dma_vsync(int);
+extern void record_dma_reoffset(int, int, int);
 extern void record_cia_access(int r, int mask, uae_u16 value, bool rw, int hpos, int vpos, int phase);
 extern void record_dma_ipl(int hpos, int vpos);
 extern void record_dma_ipl_sample(int hpos, int vpos);

diff --git a/include/drawing.h b/include/drawing.h
index 9738be8f4c4e22c7863661bf18239d63b3750306..c1417f6a705433af06d375b6d8c209407dc3fa90 100644 (file)
--- a/include/drawing.h
+++ b/include/drawing.h
@@ -241,8 +241,7 @@ STATIC_INLINE void color_reg_cpy (struct color_entry *dst, struct color_entry *s
 
 #define COLOR_CHANGE_BRDBLANK 0x80000000
 #define COLOR_CHANGE_SHRES_DELAY 0x40000000
-#define COLOR_CHANGE_HSYNC_HACK 0x20000000
-#define COLOR_CHANGE_BLANK 0x10000000
+#define COLOR_CHANGE_BLANK 0x20000000
 #define COLOR_CHANGE_ACTBORDER (COLOR_CHANGE_BLANK | COLOR_CHANGE_BRDBLANK)
 #define COLOR_CHANGE_MASK 0xf0000000
 struct color_change {

diff --git a/include/events.h b/include/events.h
index d0f81522dac2f22ecc114b4e32676f069841a65e..e237efa7b40ffb1e7d4b9f2c8e93e788e1dd4816 100644 (file)
--- a/include/events.h
+++ b/include/events.h
@@ -36,7 +36,6 @@ extern void do_cycles_ce020(int cycles);
 extern void events_schedule(void);
 extern void do_cycles_slow(int cycles_to_add);
 extern void events_reset_syncline(void);
-extern void modify_eventcounter(int diff);
 extern void clear_events(void);
 
 extern bool is_cycle_ce(uaecptr);