{
#ifdef JIT
if (currprefs.cachesize && (!currprefs.comptrustbyte || !currprefs.comptrustword || !currprefs.comptrustlong)) {
- flush_icache (0, 3);
+ flush_icache (3);
}
#endif
}
extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
#ifdef JIT
-extern void flush_icache(uaecptr, int);
-extern void flush_icache_hard(uaecptr, int);
+extern void flush_icache(int);
+extern void flush_icache_hard(int);
extern void compemu_reset(void);
#else
-#define flush_icache(uaecptr, int) do {} while (0)
-#define flush_icache_hard(uaecptr, int) do {} while (0)
+#define flush_icache(int) do {} while (0)
+#define flush_icache(int) do {} while (0)
#endif
bool check_prefs_changed_comp (bool);
extern void flush_dcache (uaecptr, int);
extern int get_cache_state(void);
extern uae_u32 get_jitted_size(void);
#ifdef JIT
-extern void flush_icache(uaecptr ptr, int n);
-extern void flush_icache_hard(uaecptr ptr, int n);
-static inline void flush_icache(int n)
-{
- flush_icache(0, n);
-}
-static inline void flush_icache_hard(int n)
-{
- flush_icache(0, n);
-}
+extern void flush_icache(int n);
+extern void flush_icache_hard(int n);
#endif
extern void alloc_cache(void);
extern int check_for_cache_miss(void);
void set_cache_state(int enabled)
{
if (enabled!=letit)
- flush_icache_hard(0, 3);
+ flush_icache_hard(3);
letit=enabled;
}
void alloc_cache(void)
{
if (compiled_code) {
- flush_icache_hard(0, 3);
+ flush_icache_hard(3);
vm_release(compiled_code, cache_size * 1024);
compiled_code = 0;
}
/* Nothing to do. */
}
-void flush_icache_hard(uaecptr ptr, int n)
+void flush_icache_hard(int n)
{
blockinfo* bi, *dbi;
we simply mark everything as "needs to be checked".
*/
-void flush_icache(uaecptr ptr, int n)
+void flush_icache(int n)
{
blockinfo* bi;
blockinfo* bi2;
if (currprefs.comp_hardflush) {
- flush_icache_hard(ptr, n);
+ flush_icache_hard(n);
return;
}
soft_flush_count++;
redo_current_block=0;
if (current_compile_p >= MAX_COMPILE_PTR)
- flush_icache_hard(0, 3);
+ flush_icache_hard(3);
alloc_blockinfos();
/* We will flush soon, anyway, so let's do it now */
if (current_compile_p >= MAX_COMPILE_PTR)
- flush_icache_hard(0, 3);
+ flush_icache_hard(3);
bi->status=BI_ACTIVE;
if (redo_current_block)
if (quick <= 0)
old = debug_bankchange (-1);
- flush_icache_hard (0, 3); /* Sure don't want to keep any old mappings around! */
+ flush_icache_hard (3); /* Sure don't want to keep any old mappings around! */
#ifdef NATMEM_OFFSET
if (!quick)
delete_shmmaps (start << 16, size << 16);
if (currprefs.cpu_model < 68040) {
set_cache_state (regs.cacr & 1);
if (regs.cacr & 0x08) {
- flush_icache (0, 3);
+ flush_icache (3);
}
} else {
set_cache_state ((regs.cacr & 0x8000) ? 1 : 0);
if (((opcr ^ regs.pcr) & 2) == 2) {
write_log (_T("68060 FPU state: %s\n"), regs.pcr & 2 ? _T("disabled") : _T("enabled"));
/* flush possible already translated FPU instructions */
- flush_icache (0, 3);
+ flush_icache (3);
}
}
break;