cfgfile_write_str (f, _T("gfx_filtermask_post"), p->gfx_filtermask[i + MAX_FILTERSHADERS]);
}
cfgfile_dwrite_str (f, _T("gfx_filter_mask"), p->gfx_filtermask[2 * MAX_FILTERSHADERS - 1]);
- if (p->gfx_filtershader[0][0] && p->gfx_api) {
- cfgfile_dwrite (f, _T("gfx_filter"), _T("D3D:%s"), p->gfx_filtershader[0]);
- } else if (p->gfx_filter > 0) {
- int i = 0;
- struct uae_filter *uf;
- while (uaefilters[i].name) {
- uf = &uaefilters[i];
- if (uf->type == p->gfx_filter) {
- cfgfile_dwrite_str (f, _T("gfx_filter"), uf->cfgname);
+ {
+ bool d3dfound = false;
+ for (int i = 0; i < 2 * MAX_FILTERSHADERS; i++) {
+ if (p->gfx_filtershader[i][0] && p->gfx_api) {
+ cfgfile_dwrite (f, _T("gfx_filter"), _T("D3D:%s"), p->gfx_filtershader[i]);
+ d3dfound = true;
+ break;
+ }
+ }
+ if (!d3dfound) {
+ if (p->gfx_filter > 0) {
+ int i = 0;
+ struct uae_filter *uf;
+ while (uaefilters[i].name) {
+ uf = &uaefilters[i];
+ if (uf->type == p->gfx_filter) {
+ cfgfile_dwrite_str (f, _T("gfx_filter"), uf->cfgname);
+ }
+ i++;
+ }
+ } else {
+ cfgfile_dwrite (f, _T("gfx_filter"), _T("no"));
}
- i++;
}
- } else {
- cfgfile_dwrite (f, _T("gfx_filter"), _T("no"));
}
cfgfile_dwrite_str (f, _T("gfx_filter_mode"), filtermode2[p->gfx_filter_filtermode]);
cfgfile_dwrite (f, _T("gfx_filter_vert_zoomf"), _T("%f"), p->gfx_filter_vert_zoom);
}
if (_tcscmp (option, _T("gfx_filter")) == 0) {
- int i = 0;
TCHAR *s = _tcschr (value, ':');
- p->gfx_filtershader[0][0] = 0;
p->gfx_filter = 0;
if (s) {
*s++ = 0;
if (!_tcscmp (value, _T("D3D"))) {
+ int i;
p->gfx_api = 1;
- _tcscpy (p->gfx_filtershader[0], s);
+ for (i = 0; i < 2 * MAX_FILTERSHADERS; i++) {
+ if (p->gfx_filtershader[i][0])
+ break;
+ }
+ if (i >= 2 * MAX_FILTERSHADERS)
+ _tcscpy (p->gfx_filtershader[0], s);
}
}
if (!_tcscmp (value, _T("direct3d"))) {
p->gfx_api = 1; // forwards compatibiity
} else {
+ int i = 0;
while(uaefilters[i].name) {
if (!_tcscmp (uaefilters[i].cfgname, value)) {
p->gfx_filter = uaefilters[i].type;
struct chipset_refresh *cr = get_chipset_refresh ();
while (cr) {
double v = -1;
- if (!picasso_on) {
+ if (!picasso_on && !picasso_requested_on) {
if (isvsync_chipset ()) {
if (cr->index == CHIPSET_REFRESH_PAL || cr->index == CHIPSET_REFRESH_NTSC) {
if ((fabs (vblank_hz - 50) < 1 || fabs (vblank_hz - 60) < 1 || fabs (vblank_hz - 100) < 1 || fabs (vblank_hz - 120) < 1) && currprefs.gfx_apmode[0].gfx_vsync == 2 && currprefs.gfx_apmode[0].gfx_fullscreen > 0) {
}
stored_chipset_refresh = cr;
interlace_changed = 0;
+ lof_togglecnt_lace = 0;
+ lof_togglecnt_nlace = 0;
+ nlace_cnt = NLACE_CNT_NEEDED;
+ lof_changing = 0;
gfxvidinfo.drawbuffer.inxoffset = -1;
gfxvidinfo.drawbuffer.inyoffset = -1;
compute_vsynctime ();
- write_log (_T("%s mode%s%s V=%.4fHz H=%0.4fHz (%dx%d+%d) IDX=%d (%s) D=%d RTG=%d\n"),
+ write_log (_T("%s mode%s%s V=%.4fHz H=%0.4fHz (%dx%d+%d) IDX=%d (%s) D=%d RTG=%d/%d\n"),
isntsc ? _T("NTSC") : _T("PAL"),
islace ? _T(" lace") : _T(""),
doublescan > 0 ? _T(" dblscan") : _T(""),
maxhpos, maxvpos, lof_store ? 1 : 0,
cr ? cr->index : -1,
cr != NULL && cr->label != NULL ? cr->label : _T("<?>"),
- currprefs.gfx_apmode[picasso_on ? 1 : 0].gfx_display, picasso_on
+ currprefs.gfx_apmode[picasso_on ? 1 : 0].gfx_display, picasso_on, picasso_requested_on
);
config_changed = 1;
if (fault_if_no_fpu_u (opcode, extra, pc + disp, pc - 4))
return;
regs.fpiar = pc - 4;
+ regs.fpu_state = 1;
cc = fpp_cond (extra & 0x3f);
if (cc == -1) {
fpu_op_illg (opcode, regs.fpiar);
return;
regs.fpiar = pc;
+ regs.fpu_state = 1;
cc = fpp_cond (extra & 0x3f);
if (cc == -1) {
fpu_op_illg (opcode, regs.fpiar);
return;
regs.fpiar = oldpc;
+ regs.fpu_state = 1;
cc = fpp_cond (extra & 0x3f);
if (cc == -1) {
fpu_op_illg (opcode, oldpc);
return;
regs.fpiar = oldpc - 2;
+ regs.fpu_state = 1;
cc = fpp_cond (opcode & 0x3f);
if (cc == -1) {
fpu_op_illg (opcode, oldpc - 2);
Exception_build_stack_frame (oldpc, currpc, regs.mmu_ssw, nr, 0x1);
} else if (nr ==5 || nr == 6 || nr == 7 || nr == 9 || nr == 56) {
Exception_build_stack_frame (oldpc, currpc, regs.mmu_ssw, nr, 0x2);
- } else if (nr == 2 || nr == 3) {
+ } else if (nr == 2) {
Exception_build_stack_frame (oldpc, currpc, regs.mmu_ssw, nr, 0xB);
+ } else if (nr == 3) {
+ regs.mmu_fault_addr = last_fault_for_exception_3;
+ mmu030_state[0] = mmu030_state[1] = 0;
+ mmu030_data_buffer = 0;
+ Exception_build_stack_frame (last_fault_for_exception_3, currpc, MMU030_SSW_RW | MMU030_SSW_SIZE_W | (regs.s ? 6 : 2), nr, 0xA);
} else {
Exception_build_stack_frame (oldpc, currpc, regs.mmu_ssw, nr, 0x0);
}
else
Exception_build_stack_frame(oldpc, currpc, regs.mmu_fslw, nr, 0x4);
} else if (nr == 3) { // address error
- uae_u16 ssw = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1);
- ssw |= last_writeaccess_for_exception_3 ? 0 : 0x40;
- ssw |= 0x20;
- Exception_build_stack_frame(oldpc, currpc, ssw, nr, 0xB);
- write_log (_T("Exception %d (%x) at %x -> %x! %s at %d\n"), nr, oldpc, currpc, get_long (regs.vbr + 4*nr),__FILE__,__LINE__);
- } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
+ Exception_build_stack_frame(last_fault_for_exception_3, currpc, 0, nr, 0x2);
+ write_log (_T("Exception %d (%x) at %x -> %x! %s at %d\n"), nr, last_fault_for_exception_3, currpc, get_long (regs.vbr + 4 * nr), __FILE__, __LINE__);
+ } else if (nr == 5 || nr == 6 || nr == 7 || nr == 9) {
Exception_build_stack_frame(oldpc, currpc, regs.mmu_ssw, nr, 0x2);
} else if (regs.m && nr >= 24 && nr < 32) { /* M + Interrupt */
Exception_build_stack_frame(oldpc, currpc, regs.mmu_ssw, nr, 0x1);
write_log (_T("%s: Failed to lock box of volume texture: %s\n"), D3DHEAD, D3D_ErrorString (hr));
return 0;
}
+ write_log (_T("HQ2X texture (%dx%d) (%dx%d)\n"), w2, h2, w, h);
BuildHq2xLookupTexture (w2, h2, w, h, (unsigned char*)lockedBox.pBits);
shaders[i].lpHq2xLookupTexture->UnlockBox (0);
}
d3dswapchain->Release ();
d3dswapchain = NULL;
}
- m_Hq2xLookupTextureHandle = NULL;
locked = 0;
maskshift.x = maskshift.y = maskshift.z = maskshift.w = 0;
maskmult.x = maskmult.y = maskmult.z = maskmult.w = 0;
for (int i = 0; i < MAX_SHADERS; i++) {
struct shaderdata *s = &shaders[i];
if (s->type == SHADERTYPE_BEFORE) {
- settransform (s);
+ settransform2 (s);
srctex = processshader (srctex, s, true);
if (!srctex)
return;
extern int log_a2065, a2065_promiscuous;
extern int rawinput_enabled_hid, rawinput_log;
extern int log_filesys;
+extern int forcedframelatency;
int log_scsi;
int log_net;
int log_vsync, debug_vsync_min_delay, debug_vsync_forced_delay;
int uaelib_debug;
int pissoff_value = 15000 * CYCLE_UNIT;
unsigned int fpucontrol;
-int extraframewait = 0;
+int extraframewait;
extern FILE *debugfile;
extern int console_logging;
cfgfile_target_dwrite_str (f, _T("gui_page"), p->win32_guipage);
cfgfile_target_dwrite_str (f, _T("gui_active_page"), p->win32_guiactivepage);
cfgfile_target_dwrite_bool (f, _T("filesystem_mangle_reserved_names"), p->win32_filesystem_mangle_reserved_names);
+
+ cfgfile_target_dwrite (f, _T("extraframewait"), _T("%d"), extraframewait);
+ cfgfile_target_dwrite (f, _T("framelatency"), _T("%d"), forcedframelatency);
}
void target_restart (void)
return 1;
}
+ if (cfgfile_intval (option, value, _T("extraframewait"), &v, 1)) {
+ extraframewait = fetchpri (v, 1);
+ return 1;
+ }
+ if (cfgfile_intval (option, value, _T("framelatency"), &v, 1)) {
+ forcedframelatency = fetchpri (v, 1);
+ return 1;
+ }
i = 0;
while (obsolete[i]) {
extern int log_bsd;
extern int inputdevice_logging;
extern int vsync_modechangetimeout;
-extern int forcedframelatency;
extern int tablet_log;
extern int log_blitter;
#define LANG_DLL 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("2")
+#define WINUAEBETA _T("3")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2013, 6, 12)
+#define WINUAEDATE MAKEBD(2013, 6, 15)
#define WINUAEEXTRA _T("")
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
- restore only single input target to default.
+Beta 3:
+
+- Direct3D hq2x shader filter should work correctly again. (2.6.0)
+- 68040/060 MMU mode address error stack frame fixed. (Possibly only debuggers need this)
+- 68030 MMU mode address error stack frame has correct format but it is not yet
+ recoverable. (I don't think address error recovery is used by any OS)
+- FScc, FTRAP and FBcc didn't get FPU out of NULL state. (No one cares fix)
+- extraframewait and framelatency command line parameters are also available via
+ config file too (uses win32. prefix)
+
Beta 2:
- Moved >2M Chip RAM merge earlier in boot process. Previous was too late and it broke