return ret;
}
+static void rethink_a2065(void)
+{
+ if (!configured)
+ return;
+ csr[0] &= ~CSR0_INTR;
+ uae_u16 mask = csr[0];
+ if (AM79C960)
+ mask &= (~csr[3]) & (0x4000 | 0x1000 | 0x800 | 0x400 | 0x200 | 0x100);
+ if (mask & (CSR0_BABL | CSR0_MISS | CSR0_MERR | CSR0_RINT | CSR0_TINT | CSR0_IDON))
+ csr[0] |= CSR0_INTR;
+ if ((csr[0] & (CSR0_INTR | CSR0_INEA)) == (CSR0_INTR | CSR0_INEA)) {
+ safe_interrupt_set(IRQ_SOURCE_A2065, 0, false);
+ if (log_a2065 > 2)
+ write_log(_T("7990 +IRQ\n"));
+ }
+ if (log_a2065) {
+ write_log(_T("7990 -IRQ\n"));
+ }
+}
+
static int mcfilter (const uae_u8 *data)
{
if (am_ladrf == 0) // multicast filter completely disabled?
do_transmit ();
}
-void a2065_hsync_handler (void)
+static void a2065_hsync_handler(void)
{
static int cnt;
}
}
-void rethink_a2065 (void)
-{
- if (!configured)
- return;
- csr[0] &= ~CSR0_INTR;
- uae_u16 mask = csr[0];
- if (AM79C960)
- mask &= (~csr[3]) & (0x4000 | 0x1000 | 0x800 | 0x400 | 0x200 | 0x100);
- if (mask & (CSR0_BABL | CSR0_MISS | CSR0_MERR | CSR0_RINT | CSR0_TINT | CSR0_IDON))
- csr[0] |= CSR0_INTR;
- if ((csr[0] & (CSR0_INTR | CSR0_INEA)) == (CSR0_INTR | CSR0_INEA)) {
- safe_interrupt_set(IRQ_SOURCE_A2065, 0, false);
- if (log_a2065 > 2)
- write_log(_T("7990 +IRQ\n"));
- }
- if (log_a2065) {
- write_log(_T("7990 -IRQ\n"));
- }
-}
-
static void chip_init_mask(void)
{
am_rdr_rdra &= RAM_MASK;
return v;
}
+static void a2065_reset(int hardreset)
+{
+ am_initialized = 0;
+ for (int i = 0; i < RAP_SIZE; i++)
+ csr[i] = 0;
+ csr[0] = CSR0_STOP;
+ csr[1] = csr[2] = csr[3] = 0;
+ csr[4] = 0x0115;
+ dbyteswap = 0;
+ rap = 0;
+
+ free_expansion_bank(&a2065_bank);
+ boardram = NULL;
+ ethernet_close(td, sysdata);
+ xfree(sysdata);
+ sysdata = NULL;
+ td = NULL;
+}
+
+static void a2065_free(void)
+{
+ a2065_reset(1);
+}
+
static bool a2065_config (struct autoconfig_info *aci)
{
uae_u8 maco[3];
if (!aci)
return false;
+ device_add_reset(a2065_reset);
+
if (aci->postinit) {
configured = expamem_board_pointer >> 16;
return true;
alloc_expansion_bank(&a2065_bank, aci);
boardram = a2065_bank.baseaddr + RAM_OFFSET;
+
+ device_add_hsync(a2065_hsync_handler);
+ device_add_rethink(rethink_a2065);
+ device_add_exit(a2065_free);
+
return true;
}
return a2065_config(aci);
}
-void a2065_free(void)
-{
- a2065_reset();
-}
-
-void a2065_reset(void)
-{
- am_initialized = 0;
- for (int i = 0; i < RAP_SIZE; i++)
- csr[i] = 0;
- csr[0] = CSR0_STOP;
- csr[1] = csr[2] = csr[3] = 0;
- csr[4] = 0x0115;
- dbyteswap = 0;
- rap = 0;
-
- free_expansion_bank(&a2065_bank);
- boardram = NULL;
- ethernet_close(td, sysdata);
- xfree(sysdata);
- sysdata = NULL;
- td = NULL;
-}
-
#endif /* A2065 */
#define GVP_GFORCE_040_SCSI 0x30
#define GVP_A1291 0x46
#define GVP_A1291_SCSI 0x47
-#define GVP_GFORCE_030 0xa0
-#define GVP_GFORCE_030_SCSI 0xb0
#define GVP_COMBO_R4 0x60
#define GVP_COMBO_R4_SCSI 0x70
+#define GVP_IO_EXTENDER 0x98
+#define GVP_GFORCE_030 0xa0
+#define GVP_GFORCE_030_SCSI 0xb0
+#define GVP_A530 0xc0
+#define GVP_A530_SCSI 0xd0
#define GVP_COMBO_R3 0xe0
#define GVP_COMBO_R3_SCSI 0xf0
#define GVP_SERIESII 0xf8
-#define GVP_A530 0xc0
-#define GVP_A530_SCSI 0xd0
/* wd register names */
#define WD_OWN_ID 0x00
static struct wd_state *scsi_units[MAX_SCSI_UNITS + 1];
+static void wd_init(void);
+static void wd_addreset(void);
+
static void freencrunit(struct wd_state *wd)
{
if (!wd)
return false;
}
-void rethink_a2091 (void)
+static void rethink_a2091(void)
{
if (!configured)
return;
wd_check_interrupt(wds, false);
}
-void scsi_hsync (void)
+static void scsi_hsync(void)
{
for (int i = 0; i < MAX_DUPLICATE_EXPANSION_BOARDS; i++) {
scsi_hsync2_a2091(wd_a2091[i]);
v = wd->gdmac.cntr;
break;
case 0x68:
- v = wd->gdmac.bank;
+ v = (wd->gdmac.bank << 6) | (wd->gdmac.maprom & 0x3f);
break;
case 0x70:
v = wd->gdmac.addr >> 16;
case 0x68: // bank
wd->gdmac.bank_ptr = &wd->gdmac.bank;
wd->gdmac.bank = b >> 6;
+ wd->gdmac.maprom = b & 0x3f;
+ cpuboard_gvpmaprom((b >> 1) & 7);
break;
case 0x70: // ACR
wd->gdmac.addr &= 0x0000ffff;
init_comm_pipe (&wd->requests, 100, 1);
uae_start_thread (_T("scsi"), scsi_thread, wd, NULL);
}
+ wd_init();
}
void a3000_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
aci->start = 0xdd0000;
aci->size = 0x10000;
aci->hardwired = true;
+ wd_addreset();
if (!aci->doinit) {
return true;
}
map_banks(&mbdmac_a3000_bank, wd->baseaddress >> 16, 1, 0);
wd_cmd_reset (&wd->wc, false, false);
reset_dmac(wd);
+ wd_init();
return true;
}
-void a3000scsi_free (void)
+static void a3000scsi_free (void)
{
struct wd_state *wd = wd_a3000;
if (!wd)
freencrunit(wd);
}
-void a2091_free (void)
+static void a2091_free(void)
{
for (int i = 0; i < MAX_DUPLICATE_EXPANSION_BOARDS; i++) {
a2091_free_device(wd_a2091[i]);
reset_dmac(wd);
}
-void a2091_reset (void)
+static void a2091_reset(int hardreset)
{
for (int i = 0; i < MAX_DUPLICATE_EXPANSION_BOARDS; i++) {
a2091_reset_device(wd_a2091[i]);
ew (aci->autoconfig_raw, 0x20, 0x00); /* ser.no. Byte 2 */
ew (aci->autoconfig_raw, 0x24, 0x00); /* ser.no. Byte 3 */
+ wd_addreset();
aci->label = _T("A2091");
if (!aci->doinit)
return true;
}
}
aci->addrbank = &wd->bank;
+ wd_init();
return true;
}
ew(aci->autoconfig_raw, 0x20, 0x00); /* ser.no. Byte 2 */
ew(aci->autoconfig_raw, 0x24, 0x00); /* ser.no. Byte 3 */
+ wd_addreset();
aci->label = _T("A2090");
if (!aci->doinit) {
return true;
}
}
+ wd_init();
+
return true;
}
freencrunit(wd);
}
-void gvp_free (void)
+static void gvp_free(void)
{
for (int i = 0; i < MAX_DUPLICATE_EXPANSION_BOARDS; i++) {
gvp_free_device(wd_gvps1[i]);
reset_dmac(wd);
}
-void gvp_reset (void)
+static void gvp_reset(int hardreset)
{
for (int i = 0; i < MAX_DUPLICATE_EXPANSION_BOARDS; i++) {
gvp_reset_device(wd_gvps1[i]);
aci->label = series2 ? _T("GVP SCSI S2") : _T("GVP SCSI S1");
} else {
romtype = ROMTYPE_CPUBOARD;
- aci->label = _T("GVP Acclerator SCSI");
+ aci->label = _T("GVP Accelerator SCSI");
gvp_accelerator_bank = 0;
autoboot_disabled = currprefs.cpuboard_settings & 1;
}
+ wd_addreset();
if (!aci->doinit) {
aci->autoconfigp = ac;
return true;
ew(wd->dmacmemory, i * 4, b);
}
gvp_reset_device(wd);
+ wd_init();
return true;
}
{
comspec_ac(aci);
aci->label = _T("COMSPEC");
+ wd_addreset();
if (!aci->doinit)
return true;
if (!wd)
return false;
+ wd_init();
return true;
}
add_scsi_device(&wd->scsis[ch], ch, ci, rc);
}
+static void wd_addreset(void)
+{
+ device_add_reset(a2091_reset);
+ device_add_reset(gvp_reset);
+}
+
+static void wd_init(void)
+{
+ device_add_hsync(scsi_hsync);
+ device_add_rethink(rethink_a2091);
+ device_add_exit(a2091_free);
+ device_add_exit(gvp_free);
+ device_add_exit(a3000scsi_free);
+}
#if 0
uae_u8 *save_scsi_dmac (int wdtype, int *len, uae_u8 *dstptr)
cdrom_led ^= LED_CD_ACTIVE2;
}
-void rethink_akiko (void)
+static void rethink_akiko(void)
{
checkint ();
}
}
}
-void AKIKO_hsync_handler (void)
+static void AKIKO_hsync_handler (void)
{
bool framesync = false;
sector_buffer_info_2 = 0;
}
-void akiko_reset (void)
+void akiko_reset(int hardreset)
{
cdaudiostop_do ();
nvram_read ();
akiko_inited = false;
}
-void akiko_free (void)
+static void akiko_free(void)
{
- akiko_reset ();
- akiko_cdrom_free ();
+ akiko_reset(1);
+ akiko_cdrom_free();
}
int akiko_init (void)
{
if (!currprefs.cs_cd32cd)
return 0;
+ device_add_reset_imm(akiko_reset);
akiko_free ();
akiko_precalculate ();
unitnum = -1;
}
gui_flicker_led (LED_HD, 0, -1);
akiko_inited = true;
+
+ device_add_hsync(AKIKO_hsync_handler);
+ device_add_exit(akiko_free);
+ device_add_rethink(rethink_akiko);
+
return 1;
}
#include "statusline.h"
#include "rommgr.h"
#include "flashrom.h"
+#include "devices.h"
#define CUBO_DEBUG 1
zfile_fclose (f);
}
+static void alg_vsync(void);
+static void cubo_vsync(void);
+static void arcadia_vsync(void)
+{
+ if (alg_flag)
+ alg_vsync();
+ if (cubo_enabled)
+ cubo_vsync();
+
+ if (arcadia_bios) {
+ static int cnt;
+ cnt--;
+ if (cnt > 0)
+ return;
+ cnt = 50;
+ if (!nvwrite)
+ return;
+ nvram_write();
+ nvwrite = 0;
+ }
+}
+
void arcadia_unmap (void)
{
xfree (arbmemory);
nvram_read ();
multigame (0);
map_banks (&arcadia_boot_bank, 0xf0, 8, 0);
+ device_add_vsync_pre(arcadia_vsync);
return 1;
}
-void alg_vsync(void);
-void cubo_vsync(void);
-void arcadia_vsync (void)
-{
- if (alg_flag)
- alg_vsync();
- if (cubo_enabled)
- cubo_vsync();
-
- if (arcadia_bios) {
- static int cnt;
- cnt--;
- if (cnt > 0)
- return;
- cnt = 50;
- if (!nvwrite)
- return;
- nvram_write ();
- nvwrite = 0;
- }
-}
-
uae_u8 arcadia_parport (int port, uae_u8 pra, uae_u8 dra)
{
uae_u8 v;
ld_wait_ack = 0;
ld_direction = 0;
ser_buf_offset = 0;
+ device_add_vsync_pre(arcadia_vsync);
}
static TCHAR cubo_pic_settings[ROMCONFIG_CONFIGTEXT_LEN];
dip_delay[c] = 5;
}
-void cubo_vsync(void)
+static void cubo_vsync(void)
{
for (int i = 0; i < 16; i++) {
if (dip_delay[i] >= 3) {
NULL, 0x3fffff, 0x600000, 0x600000
};
-bool cubo_init(struct autoconfig_info *aci)
-{
- aci->start = 0x00600000;
- aci->size = 0x00400000;
- if (!aci->doinit)
- return true;
- map_banks(&cubo_bank, aci->start >> 16, aci->size >> 16, 0);
- aci->addrbank = &cubo_bank;
- return true;
-}
-
-void arcadia_reset(void)
+static void arcadia_reset(int hardreset)
{
cubo_enabled = is_board_enabled(&currprefs, ROMTYPE_CUBO, 0);
i2c_free(cubo_rtc);
cubo_pic_settings[0] = 0;
}
-void check_arcadia_prefs_changed(void)
+static void check_arcadia_prefs_changed(void)
{
if (!config_changed)
return;
cubo_settings = brc->roms[0].device_settings;
_tcscpy(cubo_pic_settings, brc->roms[0].configtext);
}
+
+bool cubo_init(struct autoconfig_info *aci)
+{
+ aci->start = 0x00600000;
+ aci->size = 0x00400000;
+ device_add_reset(arcadia_reset);
+ if (!aci->doinit)
+ return true;
+ map_banks(&cubo_bank, aci->start >> 16, aci->size >> 16, 0);
+ aci->addrbank = &cubo_bank;
+ device_add_check_config(check_arcadia_prefs_changed);
+ device_add_vsync_pre(arcadia_vsync);
+ return true;
+}
+
#include "native2amiga.h"
#include "inputdevice.h"
#include "uae/ppc.h"
+#include "devices.h"
/* Commonly used autoconfig strings */
return false;
}
-bool rethink_traps(void)
+static bool rethink_traps2(void)
{
if (currprefs.uaeboard < 2)
return false;
}
}
+static void rethink_traps(void)
+{
+ rethink_traps2();
+}
+
+
#define RTAREA_WRITEOFFSET 0xfff0
static bool rtarea_trap_data(uaecptr addr)
} else if (addr == RTAREA_INTREQ + 1) {
rtarea_bank.baseaddr[addr] = hwtrap_waiting != 0;
} else if (addr == RTAREA_INTREQ + 2) {
- if (rethink_traps()) {
+ if (rethink_traps2()) {
rtarea_bank.baseaddr[addr] = 1;
} else {
rtarea_bank.baseaddr[addr] = 0;
org (RTAREA_TRAPS | rtarea_base);
init_extended_traps ();
+
+ if (currprefs.uaeboard >= 2) {
+ device_add_rethink(rethink_traps);
+ }
}
volatile uae_atomic uae_int_requested = 0;
MEMORY_FUNCTIONS(fmv_rom);
MEMORY_FUNCTIONS(fmv_ram);
-void rethink_cd32fmv(void)
+static void rethink_cd32fmv(void)
{
if (!fmv_ram_bank.baseaddr)
return;
l64111_regs[A_CB_STATUS] -= PCM_SECTORS;
}
-void cd32_fmv_hsync_handler(void)
+static void cd32_fmv_hsync_handler(void)
{
if (!fmv_ram_bank.baseaddr)
return;
}
-void cd32_fmv_reset(void)
+static void cd32_fmv_reset(int hardreset)
{
if (fmv_ram_bank.baseaddr)
memset(fmv_ram_bank.baseaddr, 0, fmv_ram_bank.allocated_size);
cd32_fmv_state(0);
}
-void cd32_fmv_free(void)
+static void cd32_fmv_free(void)
{
mapped_free(&fmv_rom_bank);
mapped_free(&fmv_ram_bank);
addrbank *cd32_fmv_init (struct autoconfig_info *aci)
{
+ device_add_reset_imm(cd32_fmv_reset);
cd32_fmv_free();
write_log (_T("CD32 FMV mapped @$%x\n"), expamem_board_pointer);
if (expamem_board_pointer != fmv_start) {
map_banks(&fmv_ram_bank, (fmv_start + RAM_BASE) >> 16, fmv_ram_size >> 16, 0);
map_banks(&fmv_bank, (fmv_start + IO_BASE) >> 16, (RAM_BASE - IO_BASE) >> 16, 0);
uae_sem_init(&play_sem, 0, 1);
- cd32_fmv_reset();
+ cd32_fmv_reset(1);
+
+ device_add_hsync(cd32_fmv_hsync_handler);
+ device_add_vsync_pre(cd32_fmv_vsync_handler);
+ device_add_exit(cd32_fmv_free);
+ device_add_rethink(rethink_cd32fmv);
+
return &fmv_rom_bank;
}
dmac_istr &= ~ISTR_INTS;
}
-void rethink_cdtv (void)
+static void rethink_cdtv (void)
{
checkint ();
tp_check_interrupts ();
}
-void CDTV_hsync_handler (void)
+static void CDTV_hsync_handler (void)
{
static int subqcnt;
ABFLAG_RAM, 0, 0
};
-void cdtv_free (void)
+static void cdtv_free (void)
{
if (thread_alive > 0) {
dmac_dma = 0;
cdtv_battram_reset ();
open_unit ();
gui_flicker_led (LED_CD, 0, -1);
+
+ device_add_hsync(CDTV_hsync_handler);
+ device_add_rethink(rethink_cdtv);
+ device_add_exit(cdtv_free);
+
return true;
}
get_toc();
}
-void rethink_cdtvcr(void)
+static void rethink_cdtvcr(void)
{
if ((cdtvcr_4510_ram[CDTVCR_INTREQ] & cdtvcr_4510_ram[CDTVCR_INTENA]) && !cdtvcr_4510_ram[CDTVCR_INTDISABLE]) {
safe_interrupt_set(IRQ_SOURCE_CD32CDTV, 0, false);
}
}
-void CDTVCR_hsync_handler (void)
+static void CDTVCR_hsync_handler (void)
{
static int subqcnt, readcnt;
unitnum = -1;
}
-bool cdtvcr_init(struct autoconfig_info *aci)
-{
- aci->start = 0xb80000;
- aci->size = 0x10000;
- aci->zorro = 0;
- if (!aci->doinit)
- return true;
- map_banks(&cdtvcr_bank, 0xB8, 1, 0);
- return true;
-}
-
-void cdtvcr_reset(void)
+static void cdtvcr_reset(int hardreset)
{
if (!currprefs.cs_cdtvcr)
return;
#endif
}
-void cdtvcr_free(void)
+static void cdtvcr_free(void)
{
if (thread_alive > 0) {
write_comm_pipe_u32 (&requests, 0xffff, 1);
close_unit ();
}
+bool cdtvcr_init(struct autoconfig_info *aci)
+{
+ aci->start = 0xb80000;
+ aci->size = 0x10000;
+ aci->zorro = 0;
+ device_add_reset(cdtvcr_reset);
+ if (!aci->doinit)
+ return true;
+ map_banks(&cdtvcr_bank, 0xB8, 1, 0);
+
+ device_add_hsync(CDTVCR_hsync_handler);
+ device_add_rethink(rethink_cdtvcr);
+ device_add_exit(cdtvcr_free);
+
+ return true;
+}
+
#if CDTVCR_4510_EMULATION
// VICE 65C02 emulator, waiting for future full CDTV-CR 4510 emulation.
}
}
#ifdef CD32
- if (!isrestore ()) {
- akiko_reset ();
- if (!akiko_init ())
+ if (!isrestore()) {
+ akiko_reset(1);
+ if (!akiko_init())
currprefs.cs_cd32cd = changed_prefs.cs_cd32cd = 0;
}
#endif
}
}
+static const uae_u32 gvp_a530_maprom[7] =
+{
+ 0, 0, 0,
+ 0x280000,
+ 0x580000,
+ 0x380000,
+ 0x980000
+};
+
+void cpuboard_gvpmaprom(int b)
+{
+ if (!ISCPUBOARDP(&currprefs, BOARD_GVP, BOARD_GVP_SUB_A530) &&
+ !ISCPUBOARDP(&currprefs, BOARD_GVP, BOARD_GVP_SUB_GFORCE030))
+ return;
+
+ write_log(_T("GVP MAPROM=%d\n"), b);
+ if (b < 0 || b > 7)
+ return;
+ if (!b) {
+ if (maprom_state)
+ reload_roms();
+ maprom_state = 0;
+ } else {
+ const uae_u32* addrp = 0;
+ maprom_state = b;
+ if (ISCPUBOARDP(&currprefs, BOARD_GVP, BOARD_GVP_SUB_A530)) {
+ addrp = gvp_a530_maprom;
+ }
+ if (addrp) {
+ uae_u32 addr = addrp[b];
+ if (addr) {
+ uae_u8 *src = get_real_address(addr);
+ uae_u8 *dst = kickmem_bank.baseaddr;
+ protect_roms(false);
+ memcpy(dst, src, 524288);
+ protect_roms(true);
+ set_roms_modified();
+ }
+ }
+ }
+}
+
bool cpuboard_is_ppcboard_irq(void)
{
if (is_csmk3(&currprefs) || is_blizzardppc(&currprefs)) {
}
}
-void cpuboard_hsync(void)
+static void cpuboard_hsync(void)
{
// we should call check_ppc_int_lvl() immediately
// after PPC CPU's interrupt flag is cleared but this
}
}
-void cpuboard_vsync(void)
+static void cpuboard_vsync(void)
{
if (delayed_rom_protect <= 0)
return;
}
}
-void cpuboard_reset(void)
+void cpuboard_reset(int hardreset)
{
- bool hardreset = is_hardreset();
#if 0
if (is_blizzard() || is_blizzardppc())
canbang = 0;
if (brc)
romname = brc->roms[idx].romfile;
+ device_add_reset(cpuboard_reset);
+
cpuboard_non_byte_ea = false;
int boardid = cpuboards[p->cpuboard_type].id;
switch (boardid)
map_banks(&blizzardf0_bank, 0xf00000 >> 16, (f0rom_size > 262144 ? 262144 : f0rom_size) >> 16, 0);
}
}
+
+ device_add_vsync_pre(cpuboard_vsync);
+ device_add_hsync(cpuboard_hsync);
+
return true;
}
board_prefs_changed(-1, -1);
target_reset ();
- reset_all_systems ();
+ devices_reset(hardreset);
write_log (_T("Reset at %08X. Chipset mask = %08X\n"), M68K_GETPC, currprefs.chipset_mask);
memory_map_dump ();
init_sprites ();
}
- devices_reset(hardreset);
specialmonitor_reset();
unset_special (~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE));
setup_fmodes (0);
shdelay_disabled = false;
- // must be after audio reset
- // this inits first autoconfig board
-#ifdef AUTOCONFIG
- expamem_reset();
-#endif
-
#ifdef ACTION_REPLAY
/* Doing this here ensures we can use the 'reset' command from within AR */
action_replay_reset (hardreset, keyboardreset);
if (hardreset)
rtc_hardreset();
-#ifdef PICASSO96
- picasso_reset(0);
+ // must be last
+#ifdef AUTOCONFIG
+ expamem_reset(hardreset);
#endif
+
}
void dumpcustom (void)
#include "options.h"
#include "threaddep/thread.h"
-#include "traps.h"
#include "memory.h"
#include "audio.h"
-#include "a2091.h"
-#include "a2065.h"
#include "gfxboard.h"
-#include "ncr_scsi.h"
-#include "ncr9x_scsi.h"
#include "scsi.h"
#include "scsidev.h"
#include "sana2.h"
#include "statusline.h"
#include "uae/ppc.h"
#include "cd32_fmv.h"
-#include "cdtv.h"
-#include "cdtvcr.h"
#include "akiko.h"
-#include "gayle.h"
-#include "idecontrollers.h"
#include "disk.h"
#include "cia.h"
#include "inputdevice.h"
-#include "picasso96.h"
#include "blkdev.h"
#include "parallel.h"
-#include "picasso96.h"
#include "autoconf.h"
#include "sampler.h"
#include "newcpu.h"
#include "tabletlibrary.h"
#include "luascript.h"
#include "driveclick.h"
-#include "pci.h"
-#include "pci_hw.h"
#include "x86.h"
#include "ethernet.h"
#include "drawing.h"
#include "videograb.h"
-#include "arcadia.h"
#include "rommgr.h"
#include "newcpu.h"
#ifdef RETROPLATFORM
#include "rp.h"
#endif
+#define MAX_DEVICE_ITEMS 64
+
+static void add_device_item(DEVICE_VOID *pp, int *cnt, DEVICE_VOID p)
+{
+ for (int i = 0; i < *cnt; i++) {
+ if (pp[i] == p)
+ return;
+ }
+ if (*cnt >= MAX_DEVICE_ITEMS) {
+ return;
+ }
+ pp[(*cnt)++] = p;
+}
+static void execute_device_items(DEVICE_VOID *pp, int cnt)
+{
+ for (int i = 0; i < cnt; i++) {
+ pp[i]();
+ }
+}
+
+static int device_configs_cnt;
+static DEVICE_VOID device_configs[MAX_DEVICE_ITEMS];
+static int device_vsync_pre_cnt;
+static DEVICE_VOID device_vsyncs_pre[MAX_DEVICE_ITEMS];
+static int device_vsync_post_cnt;
+static DEVICE_VOID device_vsyncs_post[MAX_DEVICE_ITEMS];
+static int device_hsync_cnt;
+static DEVICE_VOID device_hsyncs[MAX_DEVICE_ITEMS];
+static int device_rethink_cnt;
+static DEVICE_VOID device_rethinks[MAX_DEVICE_ITEMS];
+static int device_leave_cnt;
+static DEVICE_VOID device_leaves[MAX_DEVICE_ITEMS];
+static int device_resets_cnt;
+static DEVICE_INT device_resets[MAX_DEVICE_ITEMS];
+static bool device_reset_done[MAX_DEVICE_ITEMS];
+
+static void reset_device_items(void)
+{
+ device_configs_cnt = 0;
+ device_vsync_pre_cnt = 0;
+ device_vsync_post_cnt = 0;
+ device_hsync_cnt = 0;
+ device_rethink_cnt = 0;
+ device_resets_cnt = 0;
+ device_leave_cnt = 0;
+ memset(device_reset_done, 0, sizeof(device_reset_done));
+}
+
+void device_add_vsync_pre(DEVICE_VOID p)
+{
+ add_device_item(device_vsyncs_pre, &device_vsync_pre_cnt, p);
+}
+void device_add_vsync_post(DEVICE_VOID p)
+{
+ add_device_item(device_vsyncs_post, &device_vsync_post_cnt, p);
+}
+void device_add_hsync(DEVICE_VOID p)
+{
+ add_device_item(device_hsyncs, &device_hsync_cnt, p);
+}
+void device_add_rethink(DEVICE_VOID p)
+{
+ add_device_item(device_rethinks, &device_rethink_cnt, p);
+}
+void device_add_check_config(DEVICE_VOID p)
+{
+ add_device_item(device_configs, &device_configs_cnt, p);
+}
+void device_add_exit(DEVICE_VOID p)
+{
+ add_device_item(device_leaves, &device_leave_cnt, p);
+}
+void device_add_reset(DEVICE_INT p)
+{
+ for (int i = 0; i < device_resets_cnt; i++) {
+ if (device_resets[i] == p)
+ return;
+ }
+ device_resets[device_resets_cnt++] = p;
+}
+void device_add_reset_imm(DEVICE_INT p)
+{
+ for (int i = 0; i < device_resets_cnt; i++) {
+ if (device_resets[i] == p)
+ return;
+ }
+ device_reset_done[device_resets_cnt] = true;
+ device_resets[device_resets_cnt++] = p;
+ p(1);
+}
+
void device_check_config(void)
{
+ execute_device_items(device_configs, device_configs_cnt);
+
check_prefs_changed_cd();
check_prefs_changed_audio();
check_prefs_changed_custom();
check_prefs_changed_cpu();
check_prefs_picasso();
- check_prefs_changed_gayle();
- check_arcadia_prefs_changed();
+}
+
+void devices_reset_ext(int hardreset)
+{
+ for (int i = 0; i < device_resets_cnt; i++) {
+ if (!device_reset_done[i]) {
+ device_resets[i](hardreset);
+ device_reset_done[i] = true;
+ }
+ }
}
void devices_reset(int hardreset)
{
- gayle_reset (hardreset);
- idecontroller_reset();
- a1000_reset ();
- DISK_reset ();
- CIA_reset ();
- gayle_reset (0);
- soft_scsi_reset();
-#ifdef A2091
- a2091_reset ();
- gvp_reset ();
+ memset(device_reset_done, 0, sizeof(device_reset_done));
+ // must be first
+ init_eventtab();
+ init_shm();
+ memory_reset();
+ DISK_reset();
+ CIA_reset();
+ a1000_reset();
+#ifdef JIT
+ compemu_reset();
+#endif
+#ifdef WITH_PPC
+ uae_ppc_reset(is_hardreset());
+#endif
+ native2amiga_reset();
+#ifdef SCSIEMU
+ scsi_reset();
+ scsidev_reset();
+ scsidev_start_threads();
#endif
#ifdef GFXBOARD
gfxboard_reset ();
#endif
-#ifdef WITH_TOCCATA
- sndboard_reset();
- uaesndboard_reset();
+#ifdef DRIVESOUND
+ driveclick_reset();
#endif
-#ifdef NCR
- ncr_reset();
+ ethernet_reset();
+#ifdef FILESYS
+ filesys_prepare_reset();
+ filesys_reset();
#endif
-#ifdef NCR9X
- ncr9x_reset();
+#if defined (BSDSOCKET)
+ bsdlib_reset();
#endif
-#ifdef WITH_PCI
- pci_reset();
+#ifdef FILESYS
+ filesys_start_threads();
+ hardfile_reset();
#endif
-#ifdef WITH_X86
- x86_bridge_reset();
+#ifdef UAESERIAL
+ uaeserialdev_reset();
+ uaeserialdev_start_threads();
#endif
-#ifdef JIT
- compemu_reset ();
+#if defined (PARALLEL_PORT)
+ initparallel();
#endif
+ dongle_reset();
+ sampler_init();
+ device_func_reset();
#ifdef AUTOCONFIG
rtarea_reset();
#endif
-#ifdef DRIVESOUND
- driveclick_reset();
-#endif
- ethernet_reset();
uae_int_requested = 0;
-#ifdef ARCADIA
- arcadia_reset();
-#endif
}
-
void devices_vsync_pre(void)
{
audio_vsync ();
filesys_vsync ();
sampler_vsync ();
clipboard_vsync ();
- uaenet_vsync();
-#ifdef RETROPLATFORM
- rp_vsync ();
-#endif
-#ifdef CD32
- cd32_fmv_vsync_handler();
-#endif
- cpuboard_vsync();
- ncr_vsync();
statusline_vsync();
-#ifdef WITH_X86
- x86_bridge_vsync();
-#endif
+
+ execute_device_items(device_vsyncs_pre, device_vsync_pre_cnt);
}
void devices_vsync_post(void)
{
-#ifdef WITH_TOCCATA
- sndboard_vsync();
-#endif
+ execute_device_items(device_vsyncs_post, device_vsync_post_cnt);
}
void devices_hsync(void)
{
-#ifdef GFXBOARD
- gfxboard_hsync_handler();
-#endif
-#ifdef A2065
- a2065_hsync_handler ();
-#endif
-#ifdef CD32
- AKIKO_hsync_handler ();
- cd32_fmv_hsync_handler();
-#endif
-#ifdef CDTV
- CDTV_hsync_handler ();
- CDTVCR_hsync_handler ();
-#endif
- decide_blitter (-1);
+ DISK_hsync();
+ audio_hsync();
+ CIA_hsync_prehandler();
-#ifdef PICASSO96
- picasso_handle_hsync ();
-#endif
-#ifdef AHI
- {
- void ahi_hsync (void);
- ahi_hsync ();
- }
-#endif
-#ifdef WITH_PPC
- uae_ppc_hsync_handler();
- cpuboard_hsync();
-#endif
-#ifdef WITH_PCI
- pci_hsync();
-#endif
-#ifdef WITH_X86
- x86_bridge_hsync();
-#endif
-#ifdef WITH_TOCCATA
- sndboard_hsync();
-#endif
- ne2000_hsync();
- DISK_hsync ();
- audio_hsync ();
- CIA_hsync_prehandler ();
+ decide_blitter (-1);
serial_hsynchandler ();
- gayle_hsync ();
- idecontroller_hsync();
-#ifdef A2091
- scsi_hsync ();
-#endif
+
+ execute_device_items(device_hsyncs, device_hsync_cnt);
}
void devices_rethink_all(void func(void))
func();
}
-// these really should be dynamically allocated..
void devices_rethink(void)
{
rethink_cias ();
-#ifdef A2065
- rethink_a2065 ();
-#endif
-#ifdef A2091
- rethink_a2091 ();
-#endif
-#ifdef CDTV
- rethink_cdtv();
- rethink_cdtvcr();
-#endif
-#ifdef CD32
- rethink_akiko ();
- rethink_cd32fmv();
-#endif
-#ifdef NCR
- ncr_rethink();
-#endif
-#ifdef NCR9X
- ncr9x_rethink();
-#endif
- ncr80_rethink();
-#ifdef WITH_PCI
- pci_rethink();
-#endif
-#ifdef WITH_X86
- x86_bridge_rethink();
-#endif
-#ifdef WITH_TOCCATA
- sndboard_rethink();
-#endif
- rethink_ne2000();
- rethink_gayle ();
- idecontroller_rethink();
+
+ execute_device_items(device_rethinks, device_rethink_cnt);
+
rethink_uae_int();
- rethink_traps();
/* cpuboard_rethink must be last */
cpuboard_rethink();
}
cd32_fmv_set_sync(svpos, syncadjust);
}
-void reset_all_systems (void)
-{
- init_eventtab ();
-
-#ifdef WITH_PPC
- uae_ppc_reset(is_hardreset());
-#endif
-#ifdef PICASSO96
- for (int i = 0; i < MAX_AMIGADISPLAYS; i++) {
- picasso_reset(i);
- }
-#endif
-#ifdef SCSIEMU
- scsi_reset ();
- scsidev_reset ();
- scsidev_start_threads ();
-#endif
-#ifdef A2065
- a2065_reset ();
-#endif
-#ifdef SANA2
- netdev_reset ();
- netdev_start_threads ();
-#endif
-#ifdef WITH_PCI
- pci_reset();
-#endif
-#ifdef FILESYS
- filesys_prepare_reset ();
- filesys_reset ();
-#endif
- init_shm ();
- memory_reset ();
-#if defined (BSDSOCKET)
- bsdlib_reset ();
-#endif
-#ifdef FILESYS
- filesys_start_threads ();
- hardfile_reset ();
-#endif
-#ifdef UAESERIAL
- uaeserialdev_reset ();
- uaeserialdev_start_threads ();
-#endif
-#if defined (PARALLEL_PORT)
- initparallel ();
-#endif
- ne2000_reset();
- native2amiga_reset ();
- dongle_reset ();
- sampler_init ();
- device_func_reset();
- uae_int_requested = 0;
-}
-
void do_leave_program (void)
{
#ifdef WITH_PPC
// must be first
uae_ppc_free();
#endif
- picasso_free();
free_traps();
sampler_free ();
graphics_leave ();
dump_counts ();
#ifdef SERIAL_PORT
serial_exit ();
-#endif
-#ifdef CDTV
- cdtv_free();
- cdtvcr_free();
-#endif
-#ifdef A2091
- a2091_free ();
- gvp_free ();
- a3000scsi_free ();
-#endif
- soft_scsi_free();
-#ifdef NCR
- ncr_free();
-#endif
-#ifdef NCR9X
- ncr9x_free();
-#endif
-#ifdef A2065
- a2065_free();
-#endif
- ne2000_free();
-#ifdef CD32
- akiko_free ();
- cd32_fmv_free();
#endif
if (! no_gui)
gui_exit ();
#ifdef AUTOCONFIG
expansion_cleanup ();
#endif
-#ifdef WITH_PCI
- pci_free();
-#endif
-#ifdef WITH_X86
- x86_bridge_free();
-#endif
#ifdef FILESYS
filesys_cleanup ();
#endif
#ifdef BSDSOCKET
bsdlib_reset ();
#endif
- gayle_free ();
- idecontroller_free();
device_func_free();
#ifdef WITH_LUA
uae_lua_free ();
-#endif
-#ifdef WITH_TOCCATA
- sndboard_free();
- uaesndboard_free();
#endif
gfxboard_free();
savestate_free ();
driveclick_free();
ethernet_enumerate_free();
rtarea_free();
+
+ execute_device_items(device_leaves, device_leave_cnt);
}
void virtualdevice_init (void)
{
+ reset_device_items();
+
#ifdef AUTOCONFIG
rtarea_setup ();
#endif
#ifdef WITH_TABLETLIBRARY
tabletlib_install ();
#endif
-#ifdef NCR
- ncr_init();
-#endif
-#ifdef NCR9X
- ncr9x_init();
-#endif
-#ifdef CDTV
- cdtvcr_reset();
-#endif
}
void devices_restore_start(void)
#include "ethernet.h"
#include "sana2.h"
#include "arcadia.h"
+#include "devices.h"
#define CARD_FLAG_CAN_Z3 1
expansion_parse_cards(p, log);
}
-void expamem_reset (void)
+void expamem_reset (int hardreset)
{
reset_ac(&currprefs);
expansion_autoconfig_sort(&currprefs);
expansion_parse_cards(&currprefs, true);
+ // this also resets all autoconfig devices
+ devices_reset_ext(hardreset);
+
if (cardno == 0 || savestate_state) {
expamem_init_clear_zero ();
} else {
static int dataflyer_disable_irq;
static uae_u8 dataflyer_byte;
+static void gayle_reset(int hardreset);
+
static void pcmcia_reset (void)
{
memset (pcmcia_configuration, 0, sizeof pcmcia_configuration);
return checkgayleideirq() != 0;
}
-void rethink_gayle (void)
+static void rethink_gayle (void)
{
int lev2 = 0;
int lev6 = 0;
ide = add_ide_unit (idedrive, TOTAL_IDE * 2, ch, ci, NULL);
}
+static void gayle_init(void);
+
bool gayle_ide_init(struct autoconfig_info *aci)
{
aci->zorro = 0;
aci->start = GAYLE_BASE_4000;
aci->size = 0x1000;
}
+ device_add_reset(gayle_reset);
+ if (aci->doinit)
+ gayle_init();
return true;
}
aci->size = PCMCIA_ATTRIBUTE_SIZE;
aci->zorro = 0;
aci->parent_address_space = true;
+ device_add_reset(gayle_reset);
+ if (aci->doinit)
+ gayle_init();
return true;
}
aci->size = PCMCIA_COMMON_SIZE;
aci->zorro = 0;
aci->parent_address_space = true;
+ device_add_reset(gayle_reset);
+ if (aci->doinit)
+ gayle_init();
return true;
}
aci->start = PCMCIA_COMMON_START;
aci->size = 0xa80000 - aci->start;
aci->zorro = 0;
+ device_add_reset(gayle_reset);
+ if (aci->doinit)
+ gayle_init();
return true;
}
}
}
-void gayle_hsync(void)
+static void gayle_hsync(void)
{
if (ne2000)
ne2000->hsync(ne2000_board_state);
gayle_irq = gayle_int = 0;
}
-void gayle_free (void)
+static void gayle_free (void)
{
stop_ide_thread(&gayle_its);
stop_ide_thread(&pcmcia_its);
}
-void gayle_reset (int hardreset)
+static void check_prefs_changed_gayle(void)
+{
+ if (!currprefs.cs_pcmcia)
+ return;
+ pcmcia_card_check(1, -1);
+}
+
+static void gayle_reset (int hardreset)
{
static TCHAR bankname[100];
#ifdef NCR
if (is_a4000t_scsi()) {
_tcscat (bankname, _T(" + NCR53C710 SCSI"));
- ncr_init();
- ncr_reset();
+ ncr_reset(hardreset);
}
#endif
gayle_bank.name = bankname;
pcmcia_card_check(0, -1);
}
-void check_prefs_changed_gayle(void)
-{
- if (!currprefs.cs_pcmcia)
- return;
- pcmcia_card_check(1, -1);
-}
-
uae_u8 *restore_gayle (uae_u8 *src)
{
changed_prefs.cs_ide = restore_u8 ();
return src;
}
+static void gayle_init(void)
+{
+ device_add_check_config(check_prefs_changed_gayle);
+ device_add_rethink(rethink_gayle);
+ device_add_hsync(gayle_hsync);
+ device_add_exit(gayle_free);
+}
+
uae_u8 *save_gayle (int *len, uae_u8 *dstptr)
{
uae_u8 *dstbak, *dst;
#include "gfxboard.h"
#include "rommgr.h"
#include "xwin.h"
+#include "devices.h"
#include "qemuvga/qemuuaeglue.h"
#include "qemuvga/vga.h"
vram_ram_a8 = 0;
}
+static void gfxboard_hsync_handler(void)
+{
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ struct rtggfxboard *gb = &rtggfxboards[i];
+ if (gb->func && gb->userdata) {
+ gb->func->hsync(gb->userdata);
+ }
+ }
+}
+
static void init_board (struct rtggfxboard *gb)
{
struct rtgboardconfig *rbc = gb->rbc;
gb->vga.vga.con = (void*)gb;
cirrus_init_common(&gb->vga, chiptype, 0, NULL, NULL, gb->board->manufacturer == 0, gb->board->romtype == ROMTYPE_x86_VGA);
picasso_allocatewritewatch(gb->rbc->rtg_index, gb->rbc->rtgmem_size);
+
+ device_add_hsync(gfxboard_hsync_handler);
}
static int GetBytesPerPixel(RGBFTYPE RGBfmt)
}
}
-void gfxboard_hsync_handler(void)
-{
- for (int i = 0; i < MAX_RTG_BOARDS; i++) {
- struct rtggfxboard *gb = &rtggfxboards[i];
- if (gb->func && gb->userdata) {
- gb->func->hsync(gb->userdata);
- }
- }
-}
-
void gfxboard_vsync_handler(bool full_redraw_required, bool redraw_required)
{
for (int i = 0; i < MAX_RTG_BOARDS; i++) {
return *idep;
}
-static struct ide_board *getide(struct autoconfig_info *aci)
-{
- for (int i = 0; i < MAX_IDE_UNITS; i++) {
- if (ide_boards[i]) {
- struct ide_board *ide = ide_boards[i];
- if (ide->rc == aci->rc) {
- ide->original_rc = aci->rc;
- ide->rc = NULL;
- ide->aci = aci;
- return ide;
- }
- }
- }
- return NULL;
-}
-
static struct ide_board *getideboard(uaecptr addr)
{
for (int i = 0; ide_boards[i]; i++) {
void x86_doirq(uint8_t irqnum);
-void idecontroller_rethink(void)
+static void idecontroller_rethink(void)
{
bool irq = false;
for (int i = 0; ide_boards[i]; i++) {
}
}
-void idecontroller_hsync(void)
+static void idecontroller_hsync(void)
{
for (int i = 0; ide_boards[i]; i++) {
struct ide_board *board = ide_boards[i];
board->enabled = false;
}
-void idecontroller_reset(void)
+static void idecontroller_reset(int hardreset)
{
for (int i = 0; ide_boards[i]; i++) {
reset_ide(ide_boards[i]);
}
}
-void idecontroller_free(void)
+static void idecontroller_free(void)
{
stop_ide_thread(&idecontroller_its);
for (int i = 0; i < MAX_IDE_UNITS; i++) {
ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
+static struct ide_board *getide(struct autoconfig_info *aci)
+{
+ device_add_rethink(idecontroller_rethink);
+ device_add_hsync(idecontroller_hsync);
+ device_add_exit(idecontroller_free);
+
+ for (int i = 0; i < MAX_IDE_UNITS; i++) {
+ if (ide_boards[i]) {
+ struct ide_board *ide = ide_boards[i];
+ if (ide->rc == aci->rc) {
+ ide->original_rc = aci->rc;
+ ide->rc = NULL;
+ ide->aci = aci;
+ return ide;
+ }
+ }
+ }
+ return NULL;
+}
+
+static void ide_add_reset(void)
+{
+ device_add_reset(idecontroller_reset);
+}
static void ew(struct ide_board *ide, int addr, uae_u32 value)
{
} else {
autoconfig = gvp_ide2_rom_autoconfig;
}
+ ide_add_reset();
aci->autoconfigp = autoconfig;
if (!aci->doinit)
return true;
bool gvp_ide_controller_autoconfig_init(struct autoconfig_info *aci)
{
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = gvp_ide2_controller_autoconfig;
return true;
bool alf_init(struct autoconfig_info *aci)
{
bool alfplus = is_board_enabled(&currprefs, ROMTYPE_ALFAPLUS, 0);
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = alfplus ? alfplus_autoconfig : alf_autoconfig;
return true;
autoconfig = apollo_autoconfig_cpuboard;
}
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = autoconfig;
return true;
memset(rom, 0xff, rom_size);
load_rom_rc(aci->rc, ROMTYPE_MASOBOSHI, 32768, 0, rom, 65536, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
+ ide_add_reset();
if (!aci->doinit) {
if (aci->rc && aci->rc->autoboot_disabled)
memcpy(aci->autoconfig_raw, rom + 0x100, sizeof aci->autoconfig_raw);
uae_u8 *rom = xcalloc(uae_u8, rom_size);
memset(rom, 0xff, rom_size);
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = aci->ert->autoconfig;
return true;
bool adide_init(struct autoconfig_info *aci)
{
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = adide_autoconfig;
return true;
memset(rom, 0xff, rom_size);
load_rom_rc(aci->rc, ROMTYPE_MTEC, 16384, !aci->rc->autoboot_disabled ? 16384 : 0, rom, 32768, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
xfree(rom);
bool rochard_init(struct autoconfig_info *aci)
{
+ ide_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_ROCHARD, 8192, !aci->rc->autoboot_disabled ? 8192 : 0, aci->autoconfig_raw, sizeof aci->autoconfig_raw, 0);
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_BUDDHA);
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
memset(rom, 0xff, rom_size);
load_rom_rc(aci->rc, ROMTYPE_GOLEMFAST, 16384, 0, rom, 32768, 0);
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
xfree(rom);
memset(rom, 0xff, rom_size);
load_rom_rc(aci->rc, ROMTYPE_DATAFLYER, 32768, aci->rc->autoboot_disabled ? 8192 : 0, rom, 16384, LOADROM_EVENONLY_ODDONE);
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
xfree(rom);
memset(rom, 0xff, rom_size);
load_rom_rc(aci->rc, ROMTYPE_ATEAM, 16384, !aci->rc->autoboot_disabled ? 0xc000 : 0x8000, rom, 32768, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
xfree(rom);
return true;
}
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_bytes, aci->ert->autoconfig, sizeof aci->ert->autoconfig);
int type = aci->rc->device_settings & 3;
bool arriba_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_ARRIBA);
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
if (aci->rc->autoboot_disabled)
rom[0] &= ~0x10;
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
xfree(rom);
}
}
+ ide_add_reset();
if (!aci->doinit) {
memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
xfree(rom);
bool trumpcard500at_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_IVST500AT);
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
bool tandem_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_TANDEM);
+ ide_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
{
static const int parent[] = { ROMTYPE_A1060, ROMTYPE_A2088, ROMTYPE_A2088T, ROMTYPE_A2286, ROMTYPE_A2386, 0 };
aci->parent_romtype = parent;
+ ide_add_reset();
if (!aci->doinit)
return true;
#ifdef A2065
extern bool a2065_init (struct autoconfig_info *aci);
-extern void a2065_free (void);
-extern void a2065_reset (void);
-extern void a2065_hsync_handler (void);
-
extern bool ariadne_init(struct autoconfig_info *aci);
-
-extern void rethink_a2065 (void);
-
#endif
#endif /* UAE_A2065_H */
uae_u32 addr;
uae_u16 len;
uae_u8 bank;
+ uae_u8 maprom;
int dma_on;
uae_u8 version;
bool use_version;
extern bool a2090b_preinit (struct autoconfig_info *aci);
extern bool a2091_init (struct autoconfig_info *aci);
-extern void a2091_free(void);
-extern void a2091_reset (void);
extern bool gvp_init_s1(struct autoconfig_info *aci);
extern bool gvp_init_s2(struct autoconfig_info *aci);
extern bool gvp_init_accelerator(struct autoconfig_info *aci);
-extern void gvp_free(void);
-extern void gvp_reset (void);
extern bool comspec_init (struct autoconfig_info *aci);
extern bool comspec_preinit (struct autoconfig_info *aci);
extern bool a3000scsi_init(struct autoconfig_info *aci);
-extern void a3000scsi_free (void);
-extern void rethink_a2091 (void);
extern void wdscsi_put (struct wd_chip_state*, wd_state*, uae_u8);
extern uae_u8 wdscsi_get (struct wd_chip_state*, struct wd_state*);
extern uae_u8 wdscsi_getauxstatus (struct wd_chip_state*);
extern void wdscsi_sasr (struct wd_chip_state*, uae_u8);
-extern void scsi_hsync (void);
-
#define WDTYPE_A2091 0
#define WDTYPE_A2091_2 1
#define WDTYPE_A3000 2
#define AKIKO_BASE 0xb80000
#define AKIKO_BASE_END 0xb80100 /* ?? */
-extern void akiko_reset (void);
extern int akiko_init (void);
-extern void akiko_free (void);
+extern void akiko_reset(int);
-extern void AKIKO_hsync_handler (void);
extern void akiko_mute (int);
extern bool akiko_ntscmode(void);
-extern void rethink_akiko (void);
-
#endif /* UAE_AKIKO_H */
#ifdef ARCADIA
-extern void arcadia_reset(void);
-
extern int is_arcadia_rom (const TCHAR *path);
extern int arcadia_map_banks (void);
extern void arcadia_unmap (void);
-extern void arcadia_vsync (void);
extern uae_u8 arcadia_parport (int port, uae_u8 pra, uae_u8 dra);
extern struct romdata *scan_arcadia_rom (TCHAR*, int);
extern bool cubo_init(struct autoconfig_info *aci);
-extern void check_arcadia_prefs_changed(void);
-
extern void cubo_function(int);
#endif /* ARCADIA */
extern volatile uae_atomic uae_int_requested;
extern void rtarea_reset(void);
-extern bool rethink_traps(void);
#define RTS 0x4e75
#define RTE 0x4e73
#include "uae/types.h"
extern addrbank *cd32_fmv_init (struct autoconfig_info *aci);
-extern void cd32_fmv_reset(void);
-extern void cd32_fmv_free(void);
-extern void rethink_cd32fmv(void);
-extern void cd32_fmv_hsync_handler(void);
-extern void cd32_fmv_vsync_handler(void);
extern void cd32_fmv_state(int state);
extern void cd32_fmv_new_image(int, int, int, uae_u8*);
extern addrbank dmac_bank;
extern bool cdtv_init (struct autoconfig_info *aci);
-extern void cdtv_free (void);
-extern void CDTV_hsync_handler(void);
void cdtv_battram_write (int addr, int v);
uae_u8 cdtv_battram_read (int addr);
extern void cdtv_getdmadata (uae_u32*);
-extern void rethink_cdtv (void);
extern void cdtv_scsi_int (void);
extern void cdtv_scsi_clear_int (void);
#define UAE_CDTVCR_H
bool cdtvcr_init(struct autoconfig_info*);
-void cdtvcr_reset(void);
-void cdtvcr_free(void);
-void rethink_cdtvcr(void);
-
-extern void CDTVCR_hsync_handler(void);
#endif /* UAE_CDTVCR_H */
#include "uae/types.h"
-extern bool cpuboard_autoconfig_init(struct autoconfig_info*);
-extern bool cpuboard_maprom(void);
-extern void cpuboard_map(void);
-extern void cpuboard_reset(void);
-extern void cpuboard_cleanup(void);
-extern void cpuboard_init(void);
-extern void cpuboard_clear(void);
-extern void cpuboard_vsync(void);
-extern void cpuboard_hsync(void);
-extern void cpuboard_rethink(void);
-extern bool cpuboard_is_ppcboard_irq(void);
-extern int cpuboard_memorytype(struct uae_prefs *p);
-extern int cpuboard_maxmemory(struct uae_prefs *p);
-extern bool cpuboard_32bit(struct uae_prefs *p);
-extern bool cpuboard_jitdirectompatible(struct uae_prefs *p);
-extern bool is_ppc_cpu(struct uae_prefs *);
-extern bool cpuboard_io_special(int addr, uae_u32 *val, int size, bool write);
-extern void cpuboard_overlay_override(void);
-extern void cpuboard_setboard(struct uae_prefs *p, int type, int subtype);
-extern uaecptr cpuboard_get_reset_pc(uaecptr *stack);
-extern void cpuboard_set_flash_unlocked(bool unlocked);
-
-extern bool ppc_interrupt(int new_m68k_ipl);
-
-extern void cyberstorm_scsi_ram_put(uaecptr addr, uae_u32);
-extern uae_u32 cyberstorm_scsi_ram_get(uaecptr addr);
-extern int REGPARAM3 cyberstorm_scsi_ram_check(uaecptr addr, uae_u32 size) REGPARAM;
-extern uae_u8 *REGPARAM3 cyberstorm_scsi_ram_xlate(uaecptr addr) REGPARAM;
+bool cpuboard_autoconfig_init(struct autoconfig_info*);
+bool cpuboard_maprom(void);
+void cpuboard_map(void);
+void cpuboard_reset(int hardreset);
+void cpuboard_rethink(void);
+void cpuboard_cleanup(void);
+void cpuboard_init(void);
+void cpuboard_clear(void);
+bool cpuboard_is_ppcboard_irq(void);
+int cpuboard_memorytype(struct uae_prefs *p);
+int cpuboard_maxmemory(struct uae_prefs *p);
+bool cpuboard_32bit(struct uae_prefs *p);
+bool cpuboard_jitdirectompatible(struct uae_prefs *p);
+bool is_ppc_cpu(struct uae_prefs *);
+bool cpuboard_io_special(int addr, uae_u32 *val, int size, bool write);
+void cpuboard_overlay_override(void);
+void cpuboard_setboard(struct uae_prefs *p, int type, int subtype);
+uaecptr cpuboard_get_reset_pc(uaecptr *stack);
+void cpuboard_set_flash_unlocked(bool unlocked);
+
+bool ppc_interrupt(int new_m68k_ipl);
+
+void cyberstorm_scsi_ram_put(uaecptr addr, uae_u32);
+uae_u32 cyberstorm_scsi_ram_get(uaecptr addr);
+int REGPARAM3 cyberstorm_scsi_ram_check(uaecptr addr, uae_u32 size) REGPARAM;
+uae_u8 *REGPARAM3 cyberstorm_scsi_ram_xlate(uaecptr addr) REGPARAM;
void cyberstorm_mk3_ppc_irq(int id, int level);
void blizzardppc_irq(int id, int level);
void cyberstorm_mk3_ppc_irq_setonly(int id, int level);
void blizzardppc_irq_setonly(int id, int level);
+void cpuboard_gvpmaprom(int);
#define BOARD_MEMORY_Z2 1
#define BOARD_MEMORY_Z3 2
#define UAE_DEVICES_H
void devices_reset(int hardreset);
+void devices_reset_ext(int hardreset);
void devices_vsync_pre(void);
void devices_vsync_post(void);
void devices_hsync(void);
void devices_syncchange(void);
void devices_update_sound(double clk, double syncadjust);
void devices_update_sync(double svpos, double syncadjust);
-void reset_all_systems(void);
void do_leave_program(void);
void virtualdevice_init(void);
void devices_restore_start(void);
void devices_unpause(void);
void devices_unsafeperiod(void);
+typedef void (*DEVICE_INT)(int hardreset);
+typedef void (*DEVICE_VOID)(void);
+
+void device_add_vsync_pre(DEVICE_VOID p);
+void device_add_vsync_post(DEVICE_VOID p);
+void device_add_hsync(DEVICE_VOID p);
+void device_add_rethink(DEVICE_VOID p);
+void device_add_check_config(DEVICE_VOID p);
+void device_add_reset(DEVICE_INT p);
+void device_add_reset_imm(DEVICE_INT p);
+void device_add_exit(DEVICE_VOID p);
+
#define IRQ_SOURCE_PCI 0
#define IRQ_SOURCE_SOUND 1
#define IRQ_SOURCE_NE2000 2
extern bool xsurf_init(struct autoconfig_info *aci);
extern bool xsurf100_init(struct autoconfig_info *aci);
-void rethink_ne2000(void);
-void ne2000_reset(void);
-void ne2000_hsync(void);
-void ne2000_free(void);
-
void ethernet_updateselection(void);
uae_u32 ethernet_getselection(const TCHAR*);
const TCHAR *ethernet_getselectionname(uae_u32 settings);
#include "uae/types.h"
-extern void gayle_reset (int);
-extern void gayle_hsync (void);
-extern void gayle_free (void);
-extern void gayle_add_ide_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc);
-extern bool gayle_ide_init(struct autoconfig_info*);
-extern void gayle_free_units (void);
-extern void rethink_gayle (void);
-extern void gayle_map_pcmcia (void);
-extern void check_prefs_changed_gayle(void);
-extern bool gayle_init_pcmcia(struct autoconfig_info *aci);
-extern bool gayle_init_board_io_pcmcia(struct autoconfig_info *aci);
-extern bool gayle_init_board_common_pcmcia(struct autoconfig_info *aci);
+void gayle_add_ide_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+bool gayle_ide_init(struct autoconfig_info*);
+void gayle_free_units (void);
+void gayle_map_pcmcia (void);
+bool gayle_init_pcmcia(struct autoconfig_info *aci);
+bool gayle_init_board_io_pcmcia(struct autoconfig_info *aci);
+bool gayle_init_board_common_pcmcia(struct autoconfig_info *aci);
void pcmcia_eject(struct uae_prefs *p);
void pcmcia_reinsert(struct uae_prefs*);
bool pcmcia_disk_reinsert(struct uae_prefs *p, struct uaedev_config_info *uci, bool ejectonly);
#define PCMCIA_ATTRIBUTE_START 0xa00000
#define PCMCIA_ATTRIBUTE_SIZE 0x80000
-extern void gayle_dataflyer_enable(bool);
+void gayle_dataflyer_enable(bool);
#endif /* UAE_GAYLE_H */
extern void gfxboard_free (void);
extern void gfxboard_reset (void);
extern void gfxboard_vsync_handler (bool, bool);
-extern void gfxboard_hsync_handler(void);
extern int gfxboard_get_configtype (struct rtgboardconfig*);
extern bool gfxboard_is_registers (struct rtgboardconfig*);
extern int gfxboard_get_vram_min (struct rtgboardconfig*);
// Other IDE controllers
-void idecontroller_free(void);
-void idecontroller_reset(void);
-void idecontroller_rethink(void);
-void idecontroller_hsync(void);
-
void gvp_add_ide_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
bool gvp_ide_rom_autoconfig_init(struct autoconfig_info *aci);
bool gvp_ide_controller_autoconfig_init(struct autoconfig_info *aci);
extern void rtarea_free(void);
extern void rtarea_init_mem(void);
extern void rtarea_setup(void);
-extern void expamem_reset (void);
-extern void expamem_next (addrbank *mapped, addrbank *next);
-extern void expamem_shutup (addrbank *mapped);
+extern void expamem_reset(int);
+extern void expamem_next(addrbank *mapped, addrbank *next);
+extern void expamem_shutup(addrbank *mapped);
extern bool expamem_z3hack(struct uae_prefs*);
extern void expansion_cpu_fallback(void);
extern void set_expamem_z3_hack_mode(int);
#include "uae/types.h"
-extern void ncr9x_init(void);
-extern void ncr9x_free(void);
-extern void ncr9x_reset(void);
-extern void ncr9x_rethink(void);
-
extern void cpuboard_ncr9x_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void cpuboard_dkb_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void fastlane_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern addrbank ncr_bank_cyberstorm;
extern addrbank ncr_bank_generic;
-extern void ncr_init(void);
-extern void ncr_free(void);
-extern void ncr_reset(void);
-extern void ncr_rethink(void);
-extern void ncr_vsync(void);
+extern void ncr_reset(int);
extern bool ncr710_a4091_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr710_warpengine_autoconfig_init(struct autoconfig_info *aci);
#ifndef UAE_PCI_H
#define UAE_PCI_H
-extern void pci_free(void);
-extern void pci_reset(void);
-extern void pci_hsync(void);
-extern void pci_rethink(void);
extern void pci_dump(int);
extern bool dkb_wildfire_pci_init(struct autoconfig_info *aci);
int slot_cnt;
};
-extern void pci_free(void);
-extern void pci_reset(void);
-extern void pci_rethink(void);
-
-extern addrbank *dkb_wildfire_pci_init(struct romconfig *rc);
-
extern void pci_irq_callback(struct pci_board_state *pcibs, bool irq);
extern void pci_write_dma(struct pci_board_state *pcibs, uaecptr addr, uae_u8*, int size);
extern void pci_read_dma(struct pci_board_state *pcibs, uaecptr addr, uae_u8*, int size);
uaecptr netdev_startup(TrapContext*, uaecptr resaddr);
void netdev_install(void);
-void netdev_reset(void);
-void netdev_start_threads(void);
-void uaenet_vsync(void);
extern int log_net;
void soft_scsi_put(uaecptr addr, int size, uae_u32 v);
uae_u32 soft_scsi_get(uaecptr addr, int size);
-void ncr80_rethink(void);
-
void apollo_scsi_bput(uaecptr addr, uae_u8 v, uae_u32 config);
uae_u8 apollo_scsi_bget(uaecptr addr, uae_u32 config);
void apollo_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
void twelvegauge_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
bool twelvegauge_init(struct autoconfig_info *aci);
-void soft_scsi_free(void);
-void soft_scsi_reset(void);
-
uae_u8 parallel_port_scsi_read(int reg, uae_u8 data, uae_u8 dir);
void parallel_port_scsi_write(int reg, uae_u8 v, uae_u8 dir);
extern bool parallel_port_scsi;
bool toccata_init(struct autoconfig_info *aci);
bool prelude_init(struct autoconfig_info *aci);
bool prelude1200_init(struct autoconfig_info *aci);
-void sndboard_free(void);
-void sndboard_hsync(void);
-void sndboard_vsync(void);
-void sndboard_rethink(void);
void update_sndboard_sound(double);
-void sndboard_reset(void);
void sndboard_ext_volume(void);
bool uaesndboard_init_z2(struct autoconfig_info *aci);
bool uaesndboard_init_z3(struct autoconfig_info *aci);
-void uaesndboard_free(void);
-void uaesndboard_reset(void);
bool pmx_init(struct autoconfig_info *aci);
-void pmx_free(void);
-void pmx_reset(void);
#endif /* UAE_SNDBOARD_H */
void uae_ppc_emulate(void);
void uae_ppc_reset(bool hardreset);
void uae_ppc_free(void);
-void uae_ppc_hsync_handler(void);
void uae_ppc_wakeup(void);
void ppc_map_banks(uae_u32, uae_u32, const TCHAR*, void*, bool);
void ppc_remap_bank(uae_u32 start, uae_u32 size, const TCHAR *name, void *addr);
bool a2286_init(struct autoconfig_info *aci);
bool a2386_init(struct autoconfig_info *aci);
bool isa_expansion_init(struct autoconfig_info *aci);
-void x86_bridge_hsync(void);
-void x86_bridge_vsync(void);
-void x86_bridge_reset(void);
-void x86_bridge_free(void);
-void x86_bridge_rethink(void);
void x86_bridge_sync_change(void);
void x86_update_sound(double);
void x86_mouse(int port, int x, int y, int z, int b);
inputdevice_handle_inputcode ();
if (mouseedge_alive > 0)
mouseedge_alive--;
-#ifdef ARCADIA
- if (arcadia_bios || alg_flag || cubo_enabled)
- arcadia_vsync ();
-#endif
if (mouseedge(monid))
mouseedge_alive = 10;
if (mousehack_alive_cnt > 0) {
#ifdef WITH_LUA
uae_lua_init ();
#endif
-#ifdef PICASSO96
- picasso_reset(0);
-#endif
#if 0
#ifdef JIT
currprefs.cs_fatgaryrev = changed_prefs.cs_fatgaryrev;
currprefs.cs_ramseyrev = changed_prefs.cs_ramseyrev;
currprefs.cs_unmapped_space = changed_prefs.cs_unmapped_space;
- cpuboard_reset();
+ cpuboard_reset(mem_hardreset);
gayleorfatgary = ((currprefs.chipset_mask & CSMASK_AGA) || currprefs.cs_pcmcia || currprefs.cs_ide > 0 || currprefs.cs_mbdmac) && !currprefs.cs_cd32cd;
memset (kickmem_bank.baseaddr, 0, ROM_SIZE_512);
_tcscpy (currprefs.romfile, _T("<none>"));
currprefs.romextfile[0] = 0;
- cpuboard_reset();
+ cpuboard_reset(1);
#ifdef ACTION_REPLAY
action_replay_unload (0);
return NULL;
}
-void ncr9x_rethink(void)
+static void ncr9x_rethink(void)
{
for (int i = 0; ncr_units[i]; i++) {
if (ncr_units[i]->boardirq) {
}
}
+static void ncr9x_reset_board(struct ncr9x_state *ncr);
+static void ncr9x_reset(int hardreset)
+{
+ for (int i = 0; ncr_units[i]; i++) {
+ ncr9x_reset_board(ncr_units[i]);
+ ncr_units[i]->enabled = false;
+ }
+}
+
+static void ncr9x_free(void)
+{
+ for (int i = 0; ncr_units[i]; i++) {
+ freencrunit(ncr_units[i]);
+ }
+}
+
static void ncr9x_reset_board(struct ncr9x_state *ncr)
{
if (!ncr)
ncr->configured = 0;
ncr->boardirq = false;
ncr->chipirq = false;
-}
-void ncr9x_reset(void)
-{
- for (int i = 0; ncr_units[i]; i++) {
- ncr9x_reset_board(ncr_units[i]);
- ncr_units[i]->enabled = false;
- }
+ device_add_rethink(ncr9x_rethink);
+ device_add_reset(ncr9x_reset);
+ device_add_exit(ncr9x_free);
}
void ncr_squirrel_init(struct romconfig *rc, uaecptr baseaddress)
bool ncr_multievolution_init(struct autoconfig_info *aci)
{
+ device_add_reset(ncr9x_reset);
if (!aci->doinit)
return true;
zfile_fclose(z);
}
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
xfree(rom);
return true;
bool ncr_oktagon_autoconfig_init(struct autoconfig_info *aci)
{
+ device_add_reset(ncr9x_reset);
aci->autoconfigp = oktagon_autoconfig;
if (!aci->doinit)
return true;
memcpy(aci->autoconfig_bytes, alf3_autoconfig, 16);
aci->autoconfigp = aci->autoconfig_bytes;
}
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
return true;
}
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_RAPIDFIRE);
+ device_add_reset(ncr9x_reset);
aci->autoconfigp = dkb_autoconfig;
if (!aci->doinit)
return true;
uae_u8 *rom = xcalloc(uae_u8, 65536);
load_rom_rc(aci->rc, ROMTYPE_CB_TYPHOON2, 32768, 32768, rom, 65536, LOADROM_EVENONLY_ODDONE);
memcpy(aci->autoconfig_raw, aci->rc->autoboot_disabled ? rom + 256 : rom, 128);
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
xfree(rom);
return true;
uae_u8 *rom = xcalloc(uae_u8, 65536);
load_rom_rc(aci->rc, ROMTYPE_CB_EMATRIX, 32768, 32768, rom, 65536, LOADROM_EVENONLY_ODDONE);
memcpy(aci->autoconfig_raw, aci->rc->autoboot_disabled ? rom + 256 : rom, 128);
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
xfree(rom);
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_SCRAM5394);
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
uae_u8 *rom = xcalloc(uae_u8, 65536);
load_rom_rc(aci->rc, ROMTYPE_MASTERCARD, 32768, 0, rom, 65536, LOADROM_EVENONLY_ODDONE);
memcpy(aci->autoconfig_raw, aci->rc->autoboot_disabled ? rom + 256 : rom, 128);
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
xfree(rom);
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_RAPIDFIRE);
+ device_add_reset(ncr9x_reset);
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
esp_scsi_reset(&ncr->devobject, ncr);
}
-void ncr9x_free(void)
-{
- for (int i = 0; ncr_units[i]; i++) {
- freencrunit(ncr_units[i]);
- }
-}
-
-void ncr9x_init(void)
-{
-}
-
static void allocscsidevice(struct ncr9x_state *ncr, int ch, struct scsi_data *handle, int uae_unitnum)
{
handle->privdata = ncr;
safe_interrupt_set(IRQ_SOURCE_NCR, 0, true);
}
-void ncr_rethink(void)
+static void ncr_rethink(void)
{
for (int i = 0; ncr_units[i]; i++) {
if (ncr_units[i] != ncr_cs && ncr_units[i]->irq)
}
}
-void ncr_vsync(void)
+static void ncr_vsync(void)
{
for (int i = 0; ncr_units[i]; i++) {
if (ncr_units[i] == ncr_magnum40) {
ncr->configured = 0;
}
+static void ncr_free(void)
+{
+ for (int i = 0; i < MAX_NCR_UNITS; i++) {
+ freencrunit(ncr_units[i]);
+ }
+}
+
+static void ncr_reset_board(struct ncr_state *ncr);
+void ncr_reset(int hardreset)
+{
+ for (int i = 0; i < MAX_NCR_UNITS; i++) {
+ ncr_reset_board(ncr_units[i]);
+ }
+}
+
static void ncr_reset_board (struct ncr_state *ncr)
{
if (!ncr)
return;
ncr->irq = false;
+
+ device_add_rethink(ncr_rethink);
+ device_add_exit(ncr_free);
+ device_add_vsync_pre(ncr_vsync);
+ device_add_reset(ncr_reset);
}
// 01010040
bool ncr710_warpengine_autoconfig_init(struct autoconfig_info *aci)
{
aci->autoconfigp = warpengine_a4000_autoconfig;
+ device_add_reset(ncr_reset);
if (!aci->doinit)
return true;
zfile_fclose(z);
}
+ device_add_reset(ncr_reset);
if (!aci->doinit) {
xfree(rom);
return true;
bool ncr710_zeus040_autoconfig_init(struct autoconfig_info *aci)
{
aci->autoconfigp = zeus040_autoconfig;
+ device_add_reset(ncr_reset);
if (!aci->doinit)
return true;
bool ncr710_magnum40_autoconfig_init(struct autoconfig_info *aci)
{
+ device_add_reset(ncr_reset);
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_CB_MAGNUM40, 65536, 0, aci->autoconfig_raw, 128, 0);
return true;
return true;
}
-void ncr_free(void)
-{
- for (int i = 0; i < MAX_NCR_UNITS; i++) {
- freencrunit(ncr_units[i]);
- }
-}
-
-void ncr_init(void)
-{
-}
-
-void ncr_reset(void)
-{
- for (int i = 0; i < MAX_NCR_UNITS; i++) {
- ncr_reset_board(ncr_units[i]);
- }
-}
-
static void allocscsidevice(struct ncr_state *ncr, int ch, struct scsi_data *handle, int uae_unitnum)
{
handle->privdata = ncr;
}
}
-void ahi_hsync (void)
+static void ahi_hsync (void)
{
struct DSAHI *dsahip = &dsahi[0];
static int cnt;
#include "gfxboard.h"
#include "gfxfilter.h"
#include "dxwrap.h"
+#include "devices.h"
int debug_rtg_blitter = 3;
}
}
-void picasso_handle_hsync(void)
+static void picasso_handle_hsync(void)
{
struct AmigaMonitor *mon = &AMonitors[currprefs.rtgboards[0].monitor_id];
struct amigadisplay *ad = &adisplays[currprefs.rtgboards[0].monitor_id];
initvblankABI(ctx, uaegfx_base, ABI);
}
-void picasso_reset(int monid)
+static void picasso_reset2(int monid)
{
struct picasso96_state_struct *state = &picasso96_state[monid];
if (!monid && currprefs.rtg_multithread) {
unlockrtg();
}
+static void picasso_reset(int hardreset)
+{
+ for (int i = 0; i < MAX_AMIGADISPLAYS; i++) {
+ picasso_reset2(i);
+ }
+}
+
+static void picasso_free(void)
+{
+ if (render_thread_state > 0) {
+ write_comm_pipe_int(render_pipe, -1, 0);
+ while (render_thread_state >= 0) {
+ Sleep(10);
+ }
+ render_thread_state = 0;
+ }
+}
+
void uaegfx_install_code (uaecptr start)
{
uaegfx_rom = start;
org (start);
inituaegfxfuncs(NULL, start, 0);
+
+ device_add_reset(picasso_reset);
+ device_add_hsync(picasso_handle_hsync);
+ device_add_exit(picasso_free);
}
#define UAEGFX_VERSION 3
return 0;
}
-void picasso_free(void)
-{
- if (render_thread_state > 0) {
- write_comm_pipe_int(render_pipe, -1, 0);
- while (render_thread_state >= 0) {
- Sleep(10);
- }
- render_thread_state = 0;
- }
-}
-
static uae_u32 p96_restored_flags;
void restore_p96_finish (void)
extern void picasso_enablescreen(int monid, int on);
extern void picasso_refresh(int monid);
extern void init_hz_p96(int monid);
-extern void picasso_handle_hsync(void);
extern void picasso_handle_vsync(void);
extern void picasso_trigger_vblank(void);
-extern void picasso_reset(int monid);
extern bool picasso_is_active(int monid);
extern int picasso_setwincursor(int monid);
extern int picasso_palette(struct MyCLUTEntry *MCLUT, uae_u32 *clut);
extern bool picasso_is_vram_dirty (int index, uaecptr addr, int size);
extern void picasso_statusline (int monid, uae_u8 *dst);
extern void picasso_invalidate(int monid, int x, int y, int w, int h);
-extern void picasso_free(void);
/* This structure describes the UAE-side framebuffer for the Picasso
* screen. */
#include "rp.h"
#include "direct3d.h"
#include "debug.h"
+#include "devices.h"
static int initialized;
static RPGUESTINFO guestinfo;
dactmask[i] = 0;
}
mousecapture = 0;
+
+ device_add_vsync_pre(rp_vsync);
+
return hr;
}
}
}
-void pci_free(void)
+static void pci_free(void)
{
for (int i = 0; i < PCI_BRIDGE_MAX; i++) {
pci_bridge_free(bridges[i]);
hsyncs[i] = NULL;
}
}
-void pci_reset(void)
+static void pci_reset(int hardreset)
{
pci_free();
}
-void pci_hsync(void)
+static void pci_hsync(void)
{
for (int i = 0; i < MAX_PCI_BOARDS; i++) {
if (hsyncs[i])
}
}
-void pci_rethink(void)
+static void pci_rethink(void)
{
for (int i = 0; i < PCI_BRIDGE_MAX; i++) {
struct pci_bridge *pcib = bridges[i];
}
}
+static void pci_init(void)
+{
+ device_add_reset(pci_reset);
+ device_add_rethink(pci_rethink);
+ device_add_exit(pci_free);
+ device_add_hsync(pci_hsync);
+}
+
// Wildfire
void wildfire_ncr815_irq(int id, int v)
{
struct pci_bridge *pcib = pci_bridge_alloc();
+ device_add_reset(pci_reset);
if (!aci->doinit) {
return true;
}
map_banks(&pci_bridge_bank, 0xffff0000 >> 16, 0x10000 >> 16, 0);
pcib->data = xcalloc(uae_u8, 32768);
aci->addrbank = &expamem_null;
+ pci_init();
return true;
}
static bool prometheus_pci_init(struct autoconfig_info *aci)
{
+ device_add_reset(pci_reset);
if (!aci->doinit) {
for (int i = 0; i < sizeof prometheus_autoconfig; i++) {
ew(aci->autoconfig_raw, i * 4, prometheus_autoconfig[i]);
ew(pcib->acmemory, i * 4, prometheus_autoconfig[i]);
}
aci->addrbank = pcib->bank;
+ pci_init();
return true;
}
aci->start = 0x80000000;
aci->size = 0x80000000;
+ device_add_reset(pci_reset);
if (!aci->doinit) {
return true;
}
map_banks(&pci_io_bank, 0xfffa0000 >> 16, 0x20000 >> 16, 0);
map_banks(&pci_bridge_bank, 0xfffe0000 >> 16, 0x10000 >> 16, 0);
pcib->io_offset = 0xfffa0000;
-
+ pci_init();
return true;
}
pcib->io_offset = 0xfffa0000;
aci->zorro = 0;
aci->parent_of_previous = true;
+ pci_init();
return true;
}
static addrbank *mediator_pci_init_1200_1(struct autoconfig_info *aci, struct romconfig *rc, struct mediator_autoconfig *m_ac)
{
+ device_add_reset(pci_reset);
if (!aci->doinit) {
for (int i = 0; i < 16; i++) {
ew(aci->autoconfig_raw, i * 4, m_ac->io[i]);
for (int i = 0; i < 16; i++) {
ew(pcib->acmemory_2, i * 4, m_ac->io[i]);
}
+ pci_init();
return &pci_bridge_bank_2;
}
static addrbank *mediator_pci_init_1200_2(struct autoconfig_info *aci, struct romconfig *rc, struct mediator_autoconfig *m_ac)
{
+ device_add_reset(pci_reset);
if (!aci->doinit) {
const uae_u8 *ac = (rc->device_settings & 2) ? m_ac->mem_large : m_ac->mem_small;
for (int i = 0; i < 16; i++) {
for (int i = 0; i < 16; i++) {
ew(pcib->acmemory, i * 4, ac[i]);
}
+ pci_init();
return &pci_bridge_bank;
}
static addrbank *mediator_pci_init_4000_1(struct autoconfig_info *aci, struct romconfig *rc, struct mediator_autoconfig *m_ac)
{
+ device_add_reset(pci_reset);
if (!aci->doinit) {
aci->autoconfigp = m_ac->io;
return &pci_bridge_bank_2;
for (int i = 0; i < 16; i++) {
ew(pcib->acmemory_2, i * 4, m_ac->io[i]);
}
+ pci_init();
return &pci_bridge_bank_2;
}
static addrbank *mediator_pci_init_4000_2(struct autoconfig_info *aci, struct romconfig *rc, struct mediator_autoconfig *m_ac)
{
+ device_add_reset(pci_reset);
if (!aci->doinit) {
aci->autoconfigp = (rc->device_settings & 2) ? m_ac->mem_large : m_ac->mem_small;
return &pci_bridge_bank;
for (int i = 0; i < 16; i++) {
ew(pcib->acmemory, i * 4, ac[i]);
}
+ pci_init();
return &pci_bridge_bank;
}
#include "uae/log.h"
#include "uae/ppc.h"
#include "uae/qemu.h"
+#include "devices.h"
#define SPINLOCK_DEBUG 0
#define PPC_ACCESS_LOG 0
return true;
}
+static void uae_ppc_hsync_handler(void)
+{
+ if (ppc_state == PPC_STATE_INACTIVE)
+ return;
+ if (using_pearpc()) {
+ if (ppc_state != PPC_STATE_SLEEP)
+ return;
+ if (impl.get_dec() == 0) {
+ uae_ppc_wakeup();
+ } else {
+ impl.do_dec(ppc_cycle_count);
+ }
+ }
+}
+
void uae_ppc_cpu_stop(void)
{
if (ppc_state == PPC_STATE_INACTIVE)
initialize();
+ device_add_hsync(uae_ppc_hsync_handler);
+
if (!ppc_thread_running) {
write_log(_T("Starting PPC thread.\n"));
ppc_thread_running = true;
}
}
-void uae_ppc_hsync_handler(void)
-{
- if (ppc_state == PPC_STATE_INACTIVE)
- return;
- if (using_pearpc()) {
- if (ppc_state != PPC_STATE_SLEEP)
- return;
- if (impl.get_dec() == 0) {
- uae_ppc_wakeup();
- } else {
- impl.do_dec(ppc_cycle_count);
- }
- }
-}
-
void uae_ppc_pause(int pause)
{
if (ppc_state == PPC_STATE_INACTIVE)
}
}
-void rethink_ne2000(void)
+static void rethink_ne2000(void)
{
struct ne2000_s *ne = getne2k(0);
if (!ne->ariadne2_board_state)
}
}
-void ne2000_hsync(void)
+static void ne2000_hsync(void)
{
struct ne2000_s *ne = getne2k(0);
if (!ne->ariadne2_board_state)
ABFLAG_IO | ABFLAG_PPCIOSPACE, S_READ, S_WRITE
};
-void ne2000_free(void)
-{
- ne2000_reset();
-}
-
-void ne2000_reset(void)
+static void ne2000_reset(int hardreset)
{
struct ne2000_s *ne = getne2k(0);
ne->ariadne2_irq = false;
ne->ariadne2_board_state = NULL;
}
+static void ne2000_free(void)
+{
+ ne2000_reset(1);
+}
+
+static void init(void)
+{
+ device_add_exit(ne2000_free);
+ device_add_reset(ne2000_reset);
+ device_add_hsync(ne2000_hsync);
+ device_add_rethink(rethink_ne2000);
+}
+
bool ariadne2_init(struct autoconfig_info *aci)
{
struct ne2000_s *ne = getne2k(0);
aci->autoconfigp = ert->autoconfig;
aci->addrbank = &ariadne2_bank;
aci->autoconfig_automatic = true;
+ device_add_reset(ne2000_reset);
if (!aci->doinit)
return true;
return false;
ne2000_byteswapsupported(&ne2000state);
+ init();
+
return true;
}
aci->autoconfigp = ert->autoconfig;
aci->addrbank = &ariadne2_bank;
aci->autoconfig_automatic = true;
+ device_add_reset(ne2000_reset);
if (!aci->doinit)
return true;
return false;
ne2000_setisdp8390(&ne2000state);
+ init();
+
return true;
}
aci->autoconfigp = ert->autoconfig;
aci->addrbank = &ariadne2_bank;
aci->autoconfig_automatic = true;
+ device_add_reset(ne2000_reset);
if (!aci->doinit)
return true;
ne2000_setisdp8390(&ne2000state);
ne->level6 = (aci->rc->device_settings & 1) != 0;
+ init();
+
return true;
}
aci->autoconfigp = ert->autoconfig;
aci->addrbank = &ariadne2_bank;
aci->autoconfig_automatic = true;
+ device_add_reset(ne2000_reset);
if (!aci->doinit)
return true;
ne2000_byteswapsupported(&ne2000state);
ne2000_setident(&ne2000state, 0x50, 0x70);
+ init();
+
return true;
}
aci->autoconfigp = ert->autoconfig;
aci->addrbank = &ariadne2_bank;
aci->autoconfig_automatic = true;
+ device_add_reset(ne2000_reset);
if (!aci->doinit)
return true;
return false;
ne2000_setident(&ne2000state, 0x50, 0x70);
+ init();
+
return true;
}
#endif
#include "execio.h"
#include "debug.h"
+#include "devices.h"
#ifdef SANA2
}
}
-void uaenet_vsync(void)
+static void uaenet_vsync(void)
{
if (!irq_init)
return;
}
+static void netdev_start_threads(void)
+{
+ if (!currprefs.sana2)
+ return;
+ if (log_net)
+ write_log(_T("netdev_start_threads()\n"));
+ uae_sem_init(&change_sem, 0, 1);
+ uae_sem_init(&pipe_sem, 0, 1);
+ uae_sem_init(&async_sem, 0, 1);
+}
+
+static void netdev_reset(int hardreset)
+{
+ uaenet_signal_state = 1;
+ netdev_start_threads();
+ if (!currprefs.sana2)
+ return;
+ dev_reset();
+}
+
uaecptr netdev_startup(TrapContext *ctx, uaecptr resaddr)
{
if (!currprefs.sana2)
dw (NSCMD_DEVICEQUERY);
dw (0);
-}
-
-void netdev_start_threads (void)
-{
- if (!currprefs.sana2)
- return;
- if (log_net)
- write_log (_T("netdev_start_threads()\n"));
- uae_sem_init(&change_sem, 0, 1);
- uae_sem_init(&pipe_sem, 0, 1);
- uae_sem_init(&async_sem, 0, 1);
-}
-
-void netdev_reset (void)
-{
- uaenet_signal_state = 1;
- if (!currprefs.sana2)
- return;
- dev_reset ();
+ device_add_vsync_pre(uaenet_vsync);
+ device_add_reset(netdev_reset);
}
#endif /* SANA2 */
return *ncr;
}
-static struct soft_scsi *getscsi(struct romconfig *rc)
-{
- if (rc->unitdata)
- return (struct soft_scsi*)rc->unitdata;
- return NULL;
-}
-
-
static struct soft_scsi *getscsiboard(uaecptr addr)
{
for (int i = 0; soft_scsi_devices[i]; i++) {
}
}
+void x86_doirq(uint8_t irqnum);
+static void ncr80_rethink(void)
+{
+ for (int i = 0; soft_scsi_devices[i]; i++) {
+ struct soft_scsi *s = soft_scsi_devices[i];
+ if (s->irq && s->intena && ((s->c400 && (s->regs_400[0] & 0x10) && !s->c400_count) || !s->c400)) {
+ if (soft_scsi_devices[i] == x86_hd_data) {
+ ;// x86_doirq(5);
+ } else {
+ safe_interrupt_set(IRQ_SOURCE_SCSI, i, soft_scsi_devices[i]->level6);
+ }
+ }
+ }
+}
+
// AIC-6250
static void aic_int(struct soft_scsi *scsi, uae_u8 mask)
// NCR 53C80/MISC SCSI-LIKE
-void x86_doirq(uint8_t irqnum);
-void ncr80_rethink(void)
-{
- for (int i = 0; soft_scsi_devices[i]; i++) {
- struct soft_scsi *s = soft_scsi_devices[i];
- if (s->irq && s->intena && ((s->c400 && (s->regs_400[0] & 0x10) && !s->c400_count) || !s->c400)) {
- if (soft_scsi_devices[i] == x86_hd_data) {
- ;// x86_doirq(5);
- } else {
- safe_interrupt_set(IRQ_SOURCE_SCSI, i, soft_scsi_devices[i]->level6);
- }
- }
- }
-}
-
static void ncr5380_set_irq(struct soft_scsi *scsi)
{
if (scsi->irq)
return v;
}
-void soft_scsi_free(void)
+static void soft_scsi_free(void)
{
parallel_port_scsi = false;
parallel_port_scsi_data = NULL;
}
}
-void soft_scsi_reset(void)
+static void soft_scsi_reset(int hardreset)
{
for (int i = 0; soft_scsi_devices[i]; i++) {
raw_scsi_reset(&soft_scsi_devices[i]->rscsi);
}
}
+static struct soft_scsi *getscsi(struct romconfig *rc)
+{
+ device_add_rethink(ncr80_rethink);
+ device_add_reset(soft_scsi_reset);
+ device_add_exit(soft_scsi_free);
+ if (rc->unitdata)
+ return (struct soft_scsi *)rc->unitdata;
+ return NULL;
+}
+
+static void scsi_add_reset(void)
+{
+ device_add_reset(soft_scsi_reset);
+}
+
/*
$8380 select unit (unit mask)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_SUPRA);
aci->autoconfigp = ert->subtypes[aci->rc->subtype].autoconfig;
+ scsi_add_reset();
if (!aci->doinit)
return true;
bool golem_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_GOLEM, 8192, aci->rc->autoboot_disabled ? 8192 : 0, aci->autoconfig_raw, 128, 0);
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_STARDRIVE);
aci->autoconfigp = ert->autoconfig;
+ scsi_add_reset();
if (!aci->doinit)
return true;
bool kommos_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit)
return true;
bool vector_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_VECTOR, 32768, 0, aci->autoconfig_raw, 128, 0);
return true;
bool protar_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_PROTAR, 32768, 0x200, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE);
return true;
bool add500_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_ADD500, 16384, 0, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
return true;
bool kronos_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_KRONOS);
+ scsi_add_reset();
aci->autoconfigp = ert->autoconfig;
if (!aci->doinit)
return true;
bool adscsi_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_ADSCSI, 32768, 0, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
return true;
bool trumpcardpro_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_IVSTPRO);
+ scsi_add_reset();
aci->autoconfigp = ert->autoconfig;
if (!aci->doinit)
return true;
bool trumpcard_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_IVSTC);
+ scsi_add_reset();
aci->autoconfigp = ert->autoconfig;
if (!aci->doinit)
return true;
bool cltda1000scsi_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_CLTDSCSI);
+ scsi_add_reset();
aci->autoconfigp = ert->autoconfig;
if (!aci->doinit)
return true;
bool ptnexus_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_PTNEXUS);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
bool dataflyer_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
static const uae_u8 ac[16] = { 0x40, 0x00, 0, 0, 1001 >> 8, (uae_u8)1001 };
+ scsi_add_reset();
aci->hardwired = true;
if (!aci->doinit) {
aci->zorro = 1;
aci->start = 0xef0000;
aci->size = 0x10000;
aci->zorro = 0;
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
aci->start = 0x600000;
aci->size = 0x800000 - aci->start;
+ scsi_add_reset();
if (!aci->doinit)
return true;
bool paradox_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_HDA506);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
{
aci->start = 0xef0000;
aci->size = 0x10000;
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
aci->start = 0xf40000;
aci->size = 0x10000;
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
aci->start = 0xf00000;
aci->size = 0x10000;
-
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
aci->start = 0xea0000;
aci->size = 0x10000;
-
+ scsi_add_reset();
if (!aci->doinit)
return true;
{
aci->start = 0x8f0000;
aci->size = 0x10000;
-
+ scsi_add_reset();
if (!aci->doinit)
return true;
bool phoenixboard_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_PHOENIXB, 8192, aci->rc->autoboot_disabled ? 0 : 8192, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
return true;
bool twelvegauge_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_CB_12GAUGE);
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_CB_12GAUGE, 32768, 0, aci->autoconfig_raw, 128, 0);
return true;
bool ivsvector_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_CB_VECTOR);
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_CB_VECTOR, 65536, 0x300, aci->autoconfig_raw, 128, 0);
return true;
bool scram5380_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_SCRAM5380);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
bool ossi_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_OSSI);
+ scsi_add_reset();
if (!aci->doinit) {
if (!load_rom_rc(aci->rc, ROMTYPE_OSSI, 32768, aci->rc->autoboot_disabled ? 16384 : 0, aci->autoconfig_raw, 128, 0))
aci->autoconfigp = ert->autoconfig;
bool hardframe_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_HARDFRAME, 32768, aci->rc->autoboot_disabled ? 64 : 0, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE);
return true;
bool inmate_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_INMATE, 32768, 0, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE);
return true;
bool malibu_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_MALIBU);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
bool addhard_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_ADDHARD);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
bool emplant_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_EMPLANT);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_GOLEMHD3000);
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_GOLEMHD3000, 8192, !aci->rc->autoboot_disabled ? 0 : 8192, aci->autoconfig_raw, 128, 0);
return true;
bool eveshamref_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_EVESHAMREF, 65536, aci->rc->autoboot_disabled ? 0x1000 : 0, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE);
return true;
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_PROFEX);
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_PROFEX, 8192, 0, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE);
if (aci->rc->autoboot_disabled)
bool fasttrak_init(struct autoconfig_info *aci)
{
+ scsi_add_reset();
if (!aci->doinit) {
load_rom_rc(aci->rc, ROMTYPE_FASTTRAK, 65536, aci->rc->autoboot_disabled ? 0x4000 : 0x6000, aci->autoconfig_raw, 128, LOADROM_EVENONLY_ODDONE);
return true;
bool overdrive_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_OVERDRIVE);
+ scsi_add_reset();
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
{
static const int parent[] = { ROMTYPE_A1060, ROMTYPE_A2088, ROMTYPE_A2088T, ROMTYPE_A2286, ROMTYPE_A2386, 0 };
aci->parent_romtype = parent;
+ scsi_add_reset();
if (!aci->doinit)
return true;
#define DEBUG_SNDDEV 0
#define DEBUG_SNDDEV_FIFO 0
+static void snd_init(void);
+static void sndboard_rethink(void);
static uae_u8 *sndboard_get_buffer(int *frames);
static void sndboard_release_buffer(uae_u8 *buffer, int frames);
static void sndboard_free_capture(void);
static bool sndboard_init_capture(int freq);
+static void uaesndboard_reset(int hardreset);
+static void sndboard_reset(int hardreset);
static double base_event_clock;
{
struct uaesndboard_data *data = &uaesndboard[0];
+ device_add_reset(uaesndboard_reset);
+
+ if (aci->doinit)
+ snd_init();
+
data->configured = 0;
data->enabled = true;
data->z3 = z == 3;
return uaesndboard_init(aci, 3);
}
-void uaesndboard_free(void)
+static void uaesndboard_free(void)
{
for (int j = 0; j < MAX_DUPLICATE_SOUND_BOARDS; j++) {
struct uaesndboard_data *data = &uaesndboard[j];
sndboard_rethink();
}
-void uaesndboard_reset(void)
+static void uaesndboard_reset(int hardreset)
{
for (int j = 0; j < MAX_DUPLICATE_SOUND_BOARDS; j++) {
struct uaesndboard_data *data = &uaesndboard[j];
aci->addrbank = &pmx_bank;
aci->autoconfig_automatic = true;
+ device_add_reset(sndboard_reset);
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
}
+ snd_init();
+
data->configured = 0;
data->streamid = 0;
memset(data->acmemory, 0xff, sizeof data->acmemory);
return true;
}
-void pmx_free(void)
+static void pmx_free(void)
{
for (int j = 0; j < MAX_DUPLICATE_SOUND_BOARDS; j++) {
struct pmx_data *data = &pmx[j];
sndboard_rethink();
}
-void pmx_reset(void)
+static void pmx_reset(int hardreset)
{
for (int j = 0; j < MAX_DUPLICATE_SOUND_BOARDS; j++) {
struct pmx_data *data = &pmx[j];
data->capture_buffer = NULL;
}
-void sndboard_rethink(void)
+static void sndboard_rethink(void)
{
for (int i = 0; i < MAX_SNDDEVS; i++) {
if (snddev[i].enabled) {
}
}
-void sndboard_hsync(void)
+static void sndboard_hsync(void)
{
for (int i = 0; i < MAX_SNDDEVS; i++) {
struct snddev_data *data = &snddev[i];
aci->addrbank = &prelude1200_bank;
aci->start = 0xd80000;
aci->size = 0x10000;
+ device_add_reset(sndboard_reset);
if (!aci->doinit)
return true;
+ snd_init();
+
data->configured = 1;
data->baseaddress = 0xd80000;
data->type = SNDDEV_PRELUDE1200;
return false;
aci->addrbank = &prelude_bank;
+ device_add_reset(sndboard_reset);
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
}
+ snd_init();
+
struct snddev_data *data = &snddev[1];
data->configured = 0;
return false;
aci->addrbank = &toccata_bank;
+ device_add_reset(sndboard_reset);
if (!aci->doinit) {
aci->autoconfigp = ert->autoconfig;
return true;
}
+ snd_init();
+
struct snddev_data *data = &snddev[0];
data->configured = 0;
return true;
}
-void sndboard_reset(void)
+static void sndboard_reset(int hardreset)
{
for (int i = 0; i < MAX_SNDDEVS; i++) {
struct snddev_data *data = &snddev[i];
sndboard_rethink();
}
-void sndboard_free(void)
+static void sndboard_free(void)
{
- sndboard_reset();
+ sndboard_reset(1);
for (int i = 0; i < MAX_SNDDEVS; i++) {
struct snddev_data *data = &snddev[i];
data->rc = NULL;
audio_activate();
}
-void sndboard_vsync(void)
+static void sndboard_vsync(void)
{
if (snddev[0].snddev_active)
sndboard_vsync_toccata(&snddev[0]);
calculate_volume_qemu();
}
+static void snd_init(void)
+{
+ device_add_hsync(sndboard_hsync);
+ device_add_vsync_post(sndboard_vsync);
+ device_add_rethink(sndboard_rethink);
+ device_add_exit(sndboard_free);
+ device_add_exit(uaesndboard_free);
+}
+
+
#ifdef _WIN32
#include <mmdeviceapi.h>
return v;
}
+static void x86_bridge_rethink(void);
static void set_interrupt(struct x86_bridge *xb, int bit)
{
if (xb->amiga_io[IO_AMIGA_INTERRUPT_STATUS] & (1 << bit))
return *(uint32_t *)&xtiderom[addr & 0x3fff];
}
-void x86_bridge_rethink(void)
+static void x86_bridge_rethink(void)
{
struct x86_bridge *xb = bridges[0];
if (!xb)
}
}
-void x86_bridge_free(void)
-{
- x86_bridge_reset();
- x86_found = 0;
-}
-
-void x86_bridge_reset(void)
+static void x86_bridge_reset(int hardreset)
{
for (int i = 0; i < X86_BRIDGE_MAX; i++) {
struct x86_bridge *xb = bridges[i];
}
}
+static void x86_bridge_free(void)
+{
+ x86_bridge_reset(1);
+ x86_found = 0;
+}
+
static void check_floppy_delay(void)
{
for (int i = 0; i < 4; i++) {
return;
}
-void x86_bridge_vsync(void)
+static void x86_bridge_vsync(void)
{
struct x86_bridge *xb = bridges[0];
if (!xb)
xb->audeventtime = x86_base_event_clock * CYCLE_UNIT / currprefs.sound_freq + 1;
}
-void x86_bridge_hsync(void)
+static void x86_bridge_hsync(void)
{
static float totalcycles;
struct x86_bridge *xb = bridges[0];
const uae_u8 *ac;
struct romconfig *rc = aci->rc;
+ device_add_reset(x86_bridge_reset);
if (type >= TYPE_2286) {
ac = type >= TYPE_2386 ? a2386_autoconfig : a1060_autoconfig;
}
xb->bank = &x86_bridge_bank;
aci->addrbank = xb->bank;
+
+ device_add_hsync(x86_bridge_hsync);
+ device_add_vsync_pre(x86_bridge_vsync);
+ device_add_exit(x86_bridge_free);
+ device_add_rethink(x86_bridge_rethink);
+
return true;
}
projects / francis / winuae.git / commitdiff