uaecptr mmu040_movem_ea;
uae_u32 mmu040_move16[4];
-static struct mmu_debug_data *mddm;
+static struct mmu_debug_data mddm;
#if MMU_ICACHE
struct mmu_icache mmu_icache_data[MMU_ICACHE_SZ];
static uae_u32 mmu_fill_atc(uaecptr addr, bool super, uae_u32 tag, bool write, struct mmu_atc_line *l, uae_u32 *status060)
{
uae_u32 desc, desc_addr, wp;
- uae_u32 desca = 0, descb = 0, descc = 0;
uae_u32 status = 0;
int i;
int old_s;
SAVE_EXCEPTION;
TRY(prb) {
- desca = desc_addr;
- desc = desc_get_long(desc_addr);
+ mddm.descriptor[0] = desc_addr;
+ desc = desc_get_long(desc_addr);
if ((desc & 2) == 0) {
#if MMUDEBUG > 1
write_log(_T("MMU: invalid root descriptor %s for %x desc at %x desc=%x\n"), super ? _T("srp"):_T("urp"),
/* fetch pointer table descriptor */
i = (addr >> 16) & 0x1fc;
desc_addr = (desc & MMU_ROOT_PTR_ADDR_MASK) | i;
- descb = desc_addr;
+ mddm.descriptor[1] = desc_addr;
desc = desc_get_long(desc_addr);
if ((desc & 2) == 0) {
#if MMUDEBUG > 1
goto fail;
}
wp |= desc;
- if ((desc & MMU_DES_USED) == 0 && !mmu_debugger) {
- desc_put_long(desc_addr, desc | MMU_DES_USED);
+ if ((desc & MMU_DES_USED) == 0) {
+ if (!mmu_debugger) {
+ desc_put_long(desc_addr, desc | MMU_DES_USED);
+ }
}
/* fetch page table descriptor */
desc_addr = (desc & MMU_PTR_PAGE_ADDR_MASK_4) + i;
}
- desc = desc_get_long(desc_addr);
- descc = desc_addr;
- if ((desc & 3) == 2) {
+ mddm.descriptor[2] = desc_addr;
+ desc = desc_get_long(desc_addr);
+ if ((desc & 3) == 2) {
/* indirect */
desc_addr = desc & MMU_PAGE_INDIRECT_MASK;
- desc = desc_get_long(desc_addr);
- }
- if ((desc & 1) == 1) {
+ mddm.descriptor[3] = desc_addr;
+ desc = desc_get_long(desc_addr);
+ }
+ if ((desc & 1) == 1) {
wp |= desc;
if (write) {
if ((wp & MMU_DES_WP) || ((desc & MMU_DES_SUPER) && !super)) {
- if ((desc & MMU_DES_USED) == 0 && !mmu_debugger) {
- desc |= MMU_DES_USED;
- desc_put_long(desc_addr, desc);
+ if ((desc & MMU_DES_USED) == 0) {
+ desc |= MMU_DES_USED;
+ if (!mmu_debugger) {
+ desc_put_long(desc_addr, desc);
+ }
}
} else if ((desc & (MMU_DES_USED|MMU_DES_MODIFIED)) !=
(MMU_DES_USED|MMU_DES_MODIFIED)) {
status = l->phys | l->status;
}
- if (mmu_debugger) {
- mddm->descriptor[0] = desca;
- mddm->descriptor[1] = descb;
- mddm->descriptor[2] = descc;
- }
-
RESTORE_EXCEPTION;
} CATCH(prb) {
RESTORE_EXCEPTION;
status = MMU_MMUSR_B;
*status060 |= MMU_FSLW_LK | MMU_FSLW_TWE;
- if (mmu_debugger) {
- mddm->desc_fault = true;
- }
+ mddm.desc_fault = true;
#if MMUDEBUG > 0
write_log(_T("MMU: bus error during table search.\n"));
}
}
-uaecptr debug_mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size, struct mmu_debug_data *mdd)
+uaecptr debug_mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size, struct mmu_debug_data **mdd)
{
- memset(mdd, 0, sizeof(struct mmu_debug_data));
- mddm = mdd;
+ memset(&mddm, 0, sizeof(struct mmu_debug_data));
+ *mdd = &mddm;
for (int i = 0; i < MAX_MMU_DEBUG_DESCRIPTOR_LEVEL; i++) {
- mdd->descriptor[i] = 0xffffffff;
+ mddm.descriptor[i] = 0xffffffff;
}
mmu_debugger = true;
mmu_flush_atc_all(true);
if (!data) {
int res = mmu_do_match_ttr(regs.itt0, addr, super);
if (res == TTR_OK_MATCH) {
- mdd->tt = 1;
- mdd->ttdata = regs.itt0;
+ mddm.tt = 1;
+ mddm.ttdata = regs.itt0;
return addr;
}
res = mmu_do_match_ttr(regs.itt1, addr, super);
if (res == TTR_OK_MATCH) {
- mdd->tt = 2;
- mdd->ttdata = regs.itt1;
+ mddm.tt = 2;
+ mddm.ttdata = regs.itt1;
return addr;
}
} else {
int res = mmu_do_match_ttr(regs.dtt0, addr, super);
if (res == TTR_OK_MATCH) {
- mdd->tt = 1;
- mdd->ttdata = regs.dtt0;
+ mddm.tt = 1;
+ mddm.ttdata = regs.dtt0;
return addr;
}
res = mmu_do_match_ttr(regs.dtt1, addr, super);
if (res == TTR_OK_MATCH) {
- mdd->tt = 2;
- mdd->ttdata = regs.dtt1;
+ mddm.tt = 2;
+ mddm.ttdata = regs.dtt1;
return addr;
}
}
void debug_mmu_translate_end(void)
{
mmu_debugger = false;
- mddm = NULL;
}
uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size)
struct mmu030_access mmu030_ad[MAX_MMU030_ACCESS + 1];
bool ismoves030, islrmw030;
-static struct mmu_debug_data *mddm;
+static struct mmu_debug_data mddm;
static void mmu030_ptest_atc_search(uaecptr logical_addr, uae_u32 fc, bool write);
static uae_u32 mmu030_table_search(uaecptr addr, uae_u32 fc, bool write, int level);
descr[1] = x_phys_get_long(addr + 4);
}
-/* Descriptors */
-
-#define DESCR_TYPE_MASK 0x00000003
-
-#define DESCR_TYPE_INVALID 0 /* all tables */
-
-#define DESCR_TYPE_EARLY_TERM 1 /* all but lowest level table */
-#define DESCR_TYPE_PAGE 1 /* only lowest level table */
-#define DESCR_TYPE_VALID4 2 /* all but lowest level table */
-#define DESCR_TYPE_INDIRECT4 2 /* only lowest level table */
-#define DESCR_TYPE_VALID8 3 /* all but lowest level table */
-#define DESCR_TYPE_INDIRECT8 3 /* only lowest level table */
-
-#define DESCR_TYPE_VALID_MASK 0x2 /* all but lowest level table */
-#define DESCR_TYPE_INDIRECT_MASK 0x2 /* only lowest level table */
-
/* Short format (4 byte):
*
* tables A, B, C and D and one indirect descriptor */
uae_u32 descr[2];
uae_u32 descr_type;
- uaecptr descr_addr[7];
- uaecptr table_addr = 0;
+ uaecptr descr_addr[7];
+ uaecptr descr_types[7];
+ uaecptr table_addr = 0;
uaecptr page_addr = 0;
uaecptr indirect_addr = 0;
uae_u32 table_index = 0;
/* Check descriptor type of root pointer */
descr_type = descr[0]&DESCR_TYPE_MASK;
- switch (descr_type) {
+ descr_types[descr_num] = descr_type;
+ switch (descr_type) {
case DESCR_TYPE_INVALID:
write_log(_T("Fatal error: Root pointer is invalid descriptor!\n"));
mmu030.status |= MMUSR_INVALID;
* index for top level table, limit check not required */
if (tc_030&TC_ENABLE_FCL) {
- write_log(_T("Function code lookup enabled, FC = %i\n"), fc);
-
+#if MMU030_REG_DBG_MSG
+ write_log(_T("Function code lookup enabled, FC = %i\n"), fc);
+#endif
addr_position = (descr_size==4) ? 0 : 1;
table_addr = descr[addr_position]&DESCR_TD_ADDR_MASK;
table_index = fc; /* table index is function code */
- write_log(_T("Table FCL at %08X: index = %i, "),table_addr,table_index);
-
+#if MMU030_REG_DBG_MSG
+ write_log(_T("Table FCL at %08X: index = %i, "),table_addr,table_index);
+#endif
/* Fetch next descriptor */
descr_num++;
descr_addr[descr_num] = table_addr+(table_index*next_size);
/* Check descriptor type */
descr_type = descr[0]&DESCR_TYPE_MASK;
+ descr_types[descr_num] = descr_type;
switch (descr_type) {
case DESCR_TYPE_INVALID:
write_log(_T("Invalid descriptor!\n"));
/* Check descriptor type */
descr_type = descr[0]&DESCR_TYPE_MASK;
- switch (descr_type) {
+ descr_types[descr_num] = descr_type;
+ switch (descr_type) {
case DESCR_TYPE_INVALID:
#if MMU030_REG_DBG_MSG
write_log(_T("Invalid descriptor!\n"));
/* Fetch indirect descriptor */
descr_num++;
descr_addr[descr_num] = indirect_addr;
-
+
if (next_size==4) {
descr[0] = desc_get_long(descr_addr[descr_num]);
#if MMU030_REG_DBG_MSG > 2
/* Check descriptor type, only page descriptor is valid */
descr_type = descr[0]&DESCR_TYPE_MASK;
- if (descr_type!=DESCR_TYPE_PAGE) {
+ descr_types[descr_num] = descr_type;
+ if (descr_type!=DESCR_TYPE_PAGE) {
mmu030.status |= MMUSR_INVALID;
goto stop_search;
}
descr_num--;
}
mmu030.status |= (MMUSR_BUS_ERROR|MMUSR_INVALID);
- write_log(_T("MMU: Bus error while %s descriptor!\n"),
+ mddm.desc_fault = true;
+#if MMU030_REG_DBG_MSG
+ write_log(_T("MMU: Bus error while %s descriptor!\n"),
bBusErrorReadWrite?_T("reading"):_T("writing"));
-
- if (mmu_debugger) {
- mddm->desc_fault = true;
- }
+#endif
} ENDTRY;
if (mmu_debugger) {
for (int i = 1; i <= descr_num; i++) {
- mddm->descriptor[i - 1] = descr_addr[i];
- }
- if (descr_size > 4) {
- mddm->descriptor8 = true;
- }
+ mddm.descriptor[i - 1] = descr_addr[i];
+ mddm.descriptor_type[i - 1] = descr_types[i];
+ }
}
// Restore original supervisor state
void debug_mmu030_translate_end(void)
{
mmu_debugger = false;
- mddm = NULL;
}
-uaecptr debug_mmu030_translate(uaecptr addr, int fc, bool write, struct mmu_debug_data *mdd)
+uaecptr debug_mmu030_translate(uaecptr addr, int fc, bool write, struct mmu_debug_data **mdd)
{
- memset(mdd, 0, sizeof(struct mmu_debug_data));
- mddm = mdd;
+ memset(&mddm, 0, sizeof(struct mmu_debug_data));
+ *mdd = &mddm;
for (int i = 0; i < MAX_MMU_DEBUG_DESCRIPTOR_LEVEL; i++) {
- mdd->descriptor[i] = 0xffffffff;
+ mddm.descriptor[i] = 0xffffffff;
}
mmu_debugger = true;
mmu030_flush_atc_all();
if ((fc == 7) || (mmu030_match_ttr(addr, fc, write) & TT_OK_MATCH) || (!mmu030.enabled)) {
if (mmu030_do_match_ttr(tt0_030, mmu030.transparent.tt0, addr, fc, write) & TT_OK_MATCH) {
- mdd->ttdata = tt0_030;
- mdd->tt = 1;
+ mddm.ttdata = tt0_030;
+ mddm.tt = 1;
}
if (mmu030_do_match_ttr(tt1_030, mmu030.transparent.tt1, addr, fc, write) & TT_OK_MATCH) {
- mdd->ttdata = tt1_030;
- mdd->tt = 2;
+ mddm.ttdata = tt1_030;
+ mddm.tt = 2;
}
return addr;
}
- int atc_line_num = mmu030_logical_is_in_atc(addr, fc, write);
-
- if (atc_line_num >= 0) {
- return mmu030_get_addr_atc(addr, atc_line_num, fc, write);
- } else {
- mmu030_table_search(addr, fc, false, 0);
- return mmu030_get_addr_atc(addr, mmu030_logical_is_in_atc(addr, fc, write), fc, write);
- }
+ mmu030_table_search(addr, fc, false, 0);
+ return mmu030_get_addr_atc(addr, mmu030_logical_is_in_atc(addr, fc, write), fc, write);
}
uaecptr mmu030_translate(uaecptr addr, bool super, bool data, bool write)
static void debug_do_mmu_translate(uaecptr addrl)
{
- struct mmu_debug_data mdd, mdd2;
+ struct mmu_debug_data *mdd, *mdd2;
uaecptr addrp;
console_out_f(_T("%08x translates to:\n"), addrl);
if (currprefs.mmu_model >= 68040 && fc != 5 && fc != 6 && fc != 1 && fc != 2) {
continue;
}
- console_out_f(_T("FC%d %s: "), fc, fc == 6 ? _T("SI") : (fc == 5 ? _T("SD") : (fc == 2 ? _T("UI") : (fc == 1 ? _T("UD") : _T("--")))));
+ console_out_f(_T("FC%d %s: "), fc, fc == 6 ? _T("SC") : (fc == 5 ? _T("SD") : (fc == 2 ? _T("UC") : (fc == 1 ? _T("UD") : _T("--")))));
TRY(prb) {
if (currprefs.mmu_model >= 68040) {
addrp = debug_mmu_translate(addrl, 0, super, data, false, sz_long, &mdd);
} CATCH(prb) {
console_out_f(_T("PHYS: ********"));
} ENDTRY;
- if (mdd.tt) {
- console_out_f(_T(" TT%d: %08x"), mdd.tt - 1, mdd.ttdata);
- } else if (mdd.descriptor[0] != 0xffffffff) {
- console_out_f(_T(" DESCR:"));
- for (int i = 0; i < MAX_MMU_DEBUG_DESCRIPTOR_LEVEL; i++) {
- uaecptr desc = mdd.descriptor[i];
- if (desc == 0xffffffff) {
- break;
- }
- if (mdd.descriptor8) {
- uae_u32 descdata1 = get_long_debug(desc);
- uae_u32 descdata2 = get_long_debug(desc + 4);
- console_out_f(_T(" %08x (%08x.%08x)"), desc, descdata1, descdata2);
- } else {
+ if (mdd->tt) {
+ console_out_f(_T(" TT%d: %08x"), mdd->tt - 1, mdd->ttdata);
+ } else if (mdd->descriptor[0] != 0xffffffff) {
+ console_out_f(_T("\n"));
+ if (currprefs.mmu_model < 68040) {
+ uaecptr desc = mdd->descriptor[0];
+ int type = mdd->descriptor_type[0];
+ for (int i = 0; i < MAX_MMU_DEBUG_DESCRIPTOR_LEVEL; i++) {
+ uaecptr desc = mdd->descriptor[i];
+ int type = mdd->descriptor_type[i];
+ if (desc == 0xffffffff) {
+ break;
+ }
uae_u32 descdata = get_long_debug(desc);
- console_out_f(_T(" %08x (%08x)"), desc, descdata);
+ if (type == DESCR_TYPE_PAGE) {
+ console_out_f(_T(" - PAGE %08x (%08x = %08x,CI=%d,M=%d,U=%d,WP=%d,DT=%d)\n"),
+ desc, descdata, descdata >> 8,
+ (descdata >> 6) & 1,
+ (descdata >> 4) & 1,
+ (descdata >> 3) & 1,
+ (descdata >> 2) & 1,
+ (descdata >> 0) & 3);
+ } else if (type == DESCR_TYPE_VALID4) {
+ console_out_f(_T(" - TABLE %08x (%08x = %08x,U=%d,WP=%d,DT=%d)\n"),
+ desc, descdata, descdata >> 4,
+ (descdata >> 3) & 1,
+ (descdata >> 2) & 1,
+ (descdata >> 0) & 3);
+ } else if (type == DESCR_TYPE_INVALID) {
+ console_out_f(_T(" - INV %08x (%08x = %08x,DT=%d)\n"),
+ desc, descdata, descdata >> 2,
+ (descdata >> 0) & 3);
+ }
+ }
+ } else {
+ uaecptr desc = mdd->descriptor[0];
+ uae_u32 descdata = get_long_debug(desc);
+ console_out_f(_T(" - ROOT %08x (%08x = %08x,U=%d,W=%d,UDT=%d)\n"),
+ desc, descdata, descdata & 0xfffffe00,
+ (descdata >> 3) & 1,
+ (descdata >> 2) & 1,
+ (descdata >> 0) & 3);
+ desc = mdd->descriptor[1];
+ if (desc != 0xffffffff) {
+ descdata = get_long_debug(desc);
+ console_out_f(_T(" - PTR %08x (%08x = %08x,U=%d,W=%d,UDT=%d)\n"),
+ desc, descdata, descdata >> (regs.mmu_page_size == 4096 ? 8 : 7),
+ (descdata >> 3) & 1,
+ (descdata >> 2) & 1,
+ (descdata >> 0) & 3);
+ int pageidx = 2;
+ desc = mdd->descriptor[pageidx];
+ if (desc != 0xffffffff) {
+ descdata = get_long_debug(desc);
+ if ((descdata & 3) == 2) {
+ console_out_f(_T(" - IND %08x (%08x = %08x,PDT=%d)\n"),
+ desc, descdata & ~3, descdata & 3);
+ pageidx++;
+ }
+ desc = mdd->descriptor[pageidx];
+ descdata = get_long_debug(desc);
+ if (desc != 0xffffffff) {
+ console_out_f(_T(" - PAGE %08x (%08x = %08x,UR=%d,G=%d,U1=%d,U0=%d,S=%d,CM=%d,M=%d,U=%d,W=%d,PDT=%d)\n"),
+ desc, descdata, descdata >> (regs.mmu_page_size == 4096 ? 12 : 13),
+ (descdata >> 12) & (regs.mmu_page_size == 4096 ? 1 : 3),
+ (descdata >> 10) & 1,
+ (descdata >> 9) & 1,
+ (descdata >> 8) & 1,
+ (descdata >> 7) & 1,
+ (descdata >> 5) & 3,
+ (descdata >> 4) & 1,
+ (descdata >> 3) & 1,
+ (descdata >> 2) & 1,
+ (descdata >> 0) & 3);
+ }
+ }
+ }
+ if (mdd->desc_fault) {
+ console_out_f(_T(" - DESCRIPTOR FAULT\n"));
}
}
} else {
console_out_f(_T(" DESCR: ********"));
+ console_out_f(_T("\n"));
}
- if (mdd.desc_fault) {
- console_out_f(_T(" FAULT"));
- }
- console_out_f(_T("\n"));
if (currprefs.mmu_model >= 68040) {
debug_mmu_translate_end();
} else {
extern void mmu_get_move16(uaecptr addr, uae_u32 *v, bool data, int size);
extern void mmu_put_move16(uaecptr addr, uae_u32 *val, bool data, int size);
-extern uaecptr debug_mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size, struct mmu_debug_data *mdd);
+extern uaecptr debug_mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size, struct mmu_debug_data **mdd);
extern void debug_mmu_translate_end(void);
#if MMU_IPAGECACHE
extern uae_u8 mmu030_cache_state, mmu030_cache_state_default;
extern bool ismoves030, islrmw030;
+/* Descriptors */
+
+#define DESCR_TYPE_MASK 0x00000003
+
+#define DESCR_TYPE_INVALID 0 /* all tables */
+
+#define DESCR_TYPE_EARLY_TERM 1 /* all but lowest level table */
+#define DESCR_TYPE_PAGE 1 /* only lowest level table */
+#define DESCR_TYPE_VALID4 2 /* all but lowest level table */
+#define DESCR_TYPE_INDIRECT4 2 /* only lowest level table */
+#define DESCR_TYPE_VALID8 3 /* all but lowest level table */
+#define DESCR_TYPE_INDIRECT8 3 /* only lowest level table */
+
+#define DESCR_TYPE_VALID_MASK 0x2 /* all but lowest level table */
+#define DESCR_TYPE_INDIRECT_MASK 0x2 /* only lowest level table */
+
#define MMU030_STATEFLAG1_FMOVEM 0x2000
#define MMU030_STATEFLAG1_MOVEM1 0x4000
#define MMU030_STATEFLAG1_MOVEM2 0x8000
extern void REGPARAM3 mmu030_put_word_unaligned(uaecptr addr, uae_u16 val, uae_u32 fc, int flags) REGPARAM;
extern void REGPARAM3 mmu030_put_long_unaligned(uaecptr addr, uae_u32 val, uae_u32 fc, int flags) REGPARAM;
-extern uaecptr debug_mmu030_translate(uaecptr addr, int fc, bool write, struct mmu_debug_data *mdd);
+extern uaecptr debug_mmu030_translate(uaecptr addr, int fc, bool write, struct mmu_debug_data **mdd);
extern void debug_mmu030_translate_end(void);
static ALWAYS_INLINE uae_u32 uae_mmu030_get_fc_code(void)
struct mmu_debug_data
{
uaecptr descriptor[MAX_MMU_DEBUG_DESCRIPTOR_LEVEL];
- bool descriptor8;
+ int descriptor_type[MAX_MMU_DEBUG_DESCRIPTOR_LEVEL];
bool desc_fault;
int tt;
uae_u32 ttdata;