From: Toni Wilen <twilen@winuae.net>
Date: Sat, 31 Oct 2020 11:01:48 +0000 (+0200)
Subject: Memory bank metadata support.
X-Git-Tag: 4900~276
X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=00f186b9eeff20b00ef810f7104ff71b95e7d0a8;p=francis%2Fwinuae.git

Memory bank metadata support.
---

diff --git a/ar.cpp b/ar.cpp
index fab6331d..8e1d87bc 100644
--- a/ar.cpp
+++ b/ar.cpp
@@ -1519,7 +1519,7 @@ int action_replay_unload (int in_memory_reset)
 
 static int superiv_init (struct romdata *rd, struct zfile *f)
 {
-	uae_u32 chip = currprefs.chipmem_size - 0x10000;
+	uae_u32 chip = currprefs.chipmem.size - 0x10000;
 	int subtype = rd->id;
 	int flags = rd->type & ROMTYPE_MASK;
 	const TCHAR *memname1, *memname2, *memname3;
@@ -1778,7 +1778,7 @@ static void hrtmon_configure(void)
 	cfg->hexmode = TRUE;
 	cfg->entered = 0;
 	cfg->keyboard = hrtmon_lang;
-	do_put_mem_long (&cfg->max_chip, currprefs.chipmem_size);
+	do_put_mem_long (&cfg->max_chip, currprefs.chipmem.size);
 	do_put_mem_long (&cfg->mon_size, 0x800000);
 	cfg->ide = currprefs.cs_ide ? 1 : 0;
 	cfg->a1200 = currprefs.cs_ide == IDE_A600A1200 ? 1 : 0; /* type of IDE interface, not Amiga model */
diff --git a/blitter.cpp b/blitter.cpp
index 38f7b318..0f9ff5af 100644
--- a/blitter.cpp
+++ b/blitter.cpp
@@ -337,7 +337,7 @@ static void blitter_debugsave(int copper, uaecptr pc)
 
 static void blitter_dump (void)
 {
-	int chipsize = currprefs.chipmem_size;
+	int chipsize = currprefs.chipmem.size;
 	console_out_f(_T("PT A=%08X B=%08X C=%08X D=%08X\n"), bltapt, bltbpt, bltcpt, bltdpt);
 	console_out_f(_T("CON0=%04X CON1=%04X DAT A=%04X B=%04X C=%04X\n"),
 		bltcon0, bltcon1, blt_info.bltadat, blt_info.bltbdat, blt_info.bltcdat);
diff --git a/cfgfile.cpp b/cfgfile.cpp
index 6e31720f..2202a563 100644
--- a/cfgfile.cpp
+++ b/cfgfile.cpp
@@ -1591,6 +1591,8 @@ static bool cfgfile_readramboard(const TCHAR *option, const TCHAR *value, const
 			_stprintf(tmp1, _T("%s_size"), name);
 		if (!_tcsicmp(option, tmp1)) {
 			v = 0;
+			if (!_tcsicmp(tmp1, _T("chipmem_size")))
+				return false;
 			cfgfile_intval(option, value, tmp1, &v, 0x100000);
 			rb->size = v;
 			return true;
@@ -2500,9 +2502,12 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 	}
 	cfgfile_write(f, _T("debugmem_start"), _T("0x%x"), p->debugmem_start);
 	cfgfile_write(f, _T("debugmem_size"), _T("%d"), p->debugmem_size / 0x100000);
-	cfgfile_write(f, _T("mem25bit_size"), _T("%d"), p->mem25bit_size / 0x100000);
-	cfgfile_write(f, _T("a3000mem_size"), _T("%d"), p->mbresmem_low_size / 0x100000);
-	cfgfile_write(f, _T("mbresmem_size"), _T("%d"), p->mbresmem_high_size / 0x100000);
+	cfgfile_write(f, _T("mem25bit_size"), _T("%d"), p->mem25bit.size / 0x100000);
+	cfgfile_writeramboard(p, f, _T("mem25bit"), 0, &p->mem25bit);
+	cfgfile_write(f, _T("a3000mem_size"), _T("%d"), p->mbresmem_low.size / 0x100000);
+	cfgfile_writeramboard(p, f, _T("a3000mem"), 0, &p->mbresmem_low);
+	cfgfile_write(f, _T("mbresmem_size"), _T("%d"), p->mbresmem_high.size / 0x100000);
+	cfgfile_writeramboard(p, f, _T("mbresmem"), 0, &p->mbresmem_high);
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		if (i == 0 || p->z3fastmem[i].size) {
 			if (i > 0)
@@ -2514,7 +2519,10 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 		cfgfile_writeramboard(p, f, _T("z3mem"), i, &p->z3fastmem[i]);
 	}
 	cfgfile_write(f, _T("z3mem_start"), _T("0x%x"), p->z3autoconfig_start);
-	cfgfile_write(f, _T("bogomem_size"), _T("%d"), p->bogomem_size / 0x40000);
+
+	cfgfile_write(f, _T("bogomem_size"), _T("%d"), p->bogomem.size / 0x40000);
+	cfgfile_writeramboard(p, f, _T("bogomem"), 0, &p->bogomem);
+
 	if (p->cpuboard_type) {
 		const struct cpuboardtype *cbt = &cpuboards[p->cpuboard_type];
 		const struct cpuboardsubtype *cbst = &cbt->subtypes[p->cpuboard_subtype];
@@ -2528,8 +2536,10 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 	} else {
 		cfgfile_dwrite_str(f, _T("cpuboard_type"), _T("none"));
 	}
-	cfgfile_dwrite(f, _T("cpuboardmem1_size"), _T("%d"), p->cpuboardmem1_size / 0x100000);
-	cfgfile_dwrite(f, _T("cpuboardmem2_size"), _T("%d"), p->cpuboardmem2_size / 0x100000);
+	cfgfile_dwrite(f, _T("cpuboardmem1_size"), _T("%d"), p->cpuboardmem1.size / 0x100000);
+	cfgfile_writeramboard(p, f, _T("cpuboardmem1"), 0, &p->cpuboardmem1);
+	cfgfile_dwrite(f, _T("cpuboardmem2_size"), _T("%d"), p->cpuboardmem2.size / 0x100000);
+	cfgfile_writeramboard(p, f, _T("cpuboardmem2"), 0, &p->cpuboardmem2);
 	cfgfile_write_bool(f, _T("gfxcard_hardware_vblank"), p->rtg_hardwareinterrupt);
 	cfgfile_write_bool(f, _T("gfxcard_hardware_sprite"), p->rtg_hardwaresprite);
 	cfgfile_write_bool(f, _T("gfxcard_multithread"), p->rtg_multithread);
@@ -2565,8 +2575,12 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 			}
 		}
 	}
-	cfgfile_write (f, _T("chipmem_size"), _T("%d"), p->chipmem_size == 0x20000 ? -1 : (p->chipmem_size == 0x40000 ? 0 : p->chipmem_size / 0x80000));
-	cfgfile_dwrite (f, _T("megachipmem_size"), _T("%d"), p->z3chipmem_size / 0x100000);
+	cfgfile_write (f, _T("chipmem_size"), _T("%d"), p->chipmem.size == 0x20000 ? -1 : (p->chipmem.size == 0x40000 ? 0 : p->chipmem.size / 0x80000));
+	cfgfile_writeramboard(p, f, _T("chipmem"), 0, &p->chipmem);
+
+	cfgfile_dwrite (f, _T("megachipmem_size"), _T("%d"), p->z3chipmem.size / 0x100000);
+	cfgfile_writeramboard(p, f, _T("megachipmem"), 0, &p->z3chipmem);
+
 	// do not save aros rom special space
 	if (!(p->custom_memory_sizes[0] == 512 * 1024 && p->custom_memory_sizes[1] == 512 * 1024 && p->custom_memory_addrs[0] == 0xa80000 && p->custom_memory_addrs[1] == 0xb00000)) {
 		if (p->custom_memory_sizes[0])
@@ -5499,16 +5513,16 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 		|| cfgfile_intval(option, value, _T("fatgary"), &p->cs_fatgaryrev, 1)
 		|| cfgfile_intval(option, value, _T("ramsey"), &p->cs_ramseyrev, 1)
 		|| cfgfile_doubleval(option, value, _T("chipset_refreshrate"), &p->chipset_refreshrate)
-		|| cfgfile_intval(option, value, _T("cpuboardmem1_size"), &p->cpuboardmem1_size, 0x100000)
-		|| cfgfile_intval(option, value, _T("cpuboardmem2_size"), &p->cpuboardmem2_size, 0x100000)
+		|| cfgfile_intval(option, value, _T("cpuboardmem1_size"), &p->cpuboardmem1.size, 0x100000)
+		|| cfgfile_intval(option, value, _T("cpuboardmem2_size"), &p->cpuboardmem2.size, 0x100000)
 		|| cfgfile_intval(option, value, _T("debugmem_size"), &p->debugmem_size, 0x100000)
-		|| cfgfile_intval(option, value, _T("mem25bit_size"), &p->mem25bit_size, 0x100000)
-		|| cfgfile_intval(option, value, _T("a3000mem_size"), &p->mbresmem_low_size, 0x100000)
-		|| cfgfile_intval(option, value, _T("mbresmem_size"), &p->mbresmem_high_size, 0x100000)
-		|| cfgfile_intval(option, value, _T("megachipmem_size"), &p->z3chipmem_size, 0x100000)
+		|| cfgfile_intval(option, value, _T("mem25bit_size"), &p->mem25bit.size, 0x100000)
+		|| cfgfile_intval(option, value, _T("a3000mem_size"), &p->mbresmem_low.size, 0x100000)
+		|| cfgfile_intval(option, value, _T("mbresmem_size"), &p->mbresmem_high.size, 0x100000)
+		|| cfgfile_intval(option, value, _T("megachipmem_size"), &p->z3chipmem.size, 0x100000)
 		|| cfgfile_intval(option, value, _T("z3mem_start"), &p->z3autoconfig_start, 1)
 		|| cfgfile_intval(option, value, _T("debugmem_start"), &p->debugmem_start, 1)
-		|| cfgfile_intval(option, value, _T("bogomem_size"), &p->bogomem_size, 0x40000)
+		|| cfgfile_intval(option, value, _T("bogomem_size"), &p->bogomem.size, 0x40000)
 		|| cfgfile_intval(option, value, _T("rtg_modes"), &p->picasso96_modeflags, 1)
 		|| cfgfile_intval(option, value, _T("floppy_speed"), &p->floppy_speed, 1)
 		|| cfgfile_intval(option, value, _T("cd_speed"), &p->cd_speed, 1)
@@ -5606,12 +5620,30 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 		return 1;
 	}
 
+	if (cfgfile_readramboard(option, value, _T("chipmem"), &p->chipmem)) {
+		return 1;
+	}
+	if (cfgfile_readramboard(option, value, _T("bogomem"), &p->bogomem)) {
+		return 1;
+	}
 	if (cfgfile_readramboard(option, value, _T("fastmem"), &p->fastmem[0])) {
 		return 1;
 	}
+	if (cfgfile_readramboard(option, value, _T("mem25bit"), &p->mem25bit)) {
+		return 1;
+	}
+	if (cfgfile_readramboard(option, value, _T("a3000mem"), &p->mbresmem_low)) {
+		return 1;
+	}
+	if (cfgfile_readramboard(option, value, _T("mbresmem"), &p->mbresmem_high)) {
+		return 1;
+	}
 	if (cfgfile_readramboard(option, value, _T("z3mem"), &p->z3fastmem[0])) {
 		return 1;
 	}
+	if (cfgfile_readramboard(option, value, _T("megachipmem"), &p->z3chipmem)) {
+		return 1;
+	}
 
 	if (cfgfile_intval(option, value, _T("cdtvramcard"), &utmpval, 1)) {
 		if (utmpval)
@@ -5805,11 +5837,11 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 
 	if (cfgfile_intval (option, value, _T("chipmem_size"), &dummyint, 1)) {
 		if (dummyint < 0)
-			p->chipmem_size = 0x20000; /* 128k, prototype support */
+			p->chipmem.size = 0x20000; /* 128k, prototype support */
 		else if (dummyint == 0)
-			p->chipmem_size = 0x40000; /* 256k */
+			p->chipmem.size = 0x40000; /* 256k */
 		else
-			p->chipmem_size = dummyint * 0x80000;
+			p->chipmem.size = dummyint * 0x80000;
 		return 1;
 	}
 
@@ -5985,8 +6017,8 @@ static void romtype_restricted(struct uae_prefs *p, const int *list)
 					addbcromtype(p, romtype, false, NULL, 0);
 				}
 				i++;
-				return;
 			}
+			return;
 		}
 	}
 }
@@ -7096,11 +7128,11 @@ int parse_cmdline_option (struct uae_prefs *p, TCHAR c, const TCHAR *arg)
 		break;
 
 	case 'b':
-		p->bogomem_size = _tstoi (arg) * 0x40000;
+		p->bogomem.size = _tstoi (arg) * 0x40000;
 		break;
 
 	case 'c':
-		p->chipmem_size = _tstoi (arg) * 0x80000;
+		p->chipmem.size = _tstoi (arg) * 0x80000;
 		break;
 
 	case 'l':
@@ -7666,8 +7698,8 @@ static void default_prefs_mini (struct uae_prefs *p, int type)
 	p->floppyslots[1].dfxtype = DRV_NONE;
 	p->cpu_model = 68000;
 	p->address_space_24 = 1;
-	p->chipmem_size = 0x00080000;
-	p->bogomem_size = 0x00080000;
+	p->chipmem.size = 0x00080000;
+	p->bogomem.size = 0x00080000;
 }
 #endif
 
@@ -7974,8 +8006,8 @@ void default_prefs (struct uae_prefs *p, bool reset, int type)
 	p->filesys_max_file_size = 0x7fffffff;
 
 	p->z3autoconfig_start = 0x10000000;
-	p->chipmem_size = 0x00080000;
-	p->bogomem_size = 0x00080000;
+	p->chipmem.size = 0x00080000;
+	p->bogomem.size = 0x00080000;
 	for (int i = 0; i < MAX_RTG_BOARDS; i++) {
 		p->rtgboards[i].rtg_index = i;
 	}
@@ -8081,8 +8113,8 @@ static void buildin_default_prefs_68020 (struct uae_prefs *p)
 	p->address_space_24 = 1;
 	p->cpu_compatible = 1;
 	p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA;
-	p->chipmem_size = 0x200000;
-	p->bogomem_size = 0;
+	p->chipmem.size = 0x200000;
+	p->bogomem.size = 0;
 	p->m68k_speed = -1;
 }
 
@@ -8142,9 +8174,9 @@ static void buildin_default_prefs (struct uae_prefs *p)
 	p->cpuboard_type = 0;
 	p->cpuboard_subtype = 0;
 
-	p->chipmem_size = 0x00080000;
-	p->bogomem_size = 0x00080000;
-	p->z3chipmem_size = 0;
+	p->chipmem.size = 0x00080000;
+	p->bogomem.size = 0x00080000;
+	p->z3chipmem.size = 0;
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		memset(p->fastmem, 0, sizeof(struct ramboard));
 		memset(p->z3fastmem, 0, sizeof(struct ramboard));
@@ -8282,8 +8314,8 @@ static int bip_a3000 (struct uae_prefs *p, int config, int compa, int romcheck)
 	else
 		roms[0] = 59;
 	roms[1] = -1;
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x200000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x200000;
 	p->cpu_model = 68030;
 	p->fpu_model = 68882;
 	p->fpu_no_unimplemented = true;
@@ -8300,7 +8332,7 @@ static int bip_a3000 (struct uae_prefs *p, int config, int compa, int romcheck)
 	p->floppy_speed = 0;
 	p->cpu_idle = 150;
 	p->cs_compatible = CP_A3000;
-	p->mbresmem_low_size = 8 * 1024 * 1024;
+	p->mbresmem_low.size = 8 * 1024 * 1024;
 	built_in_chipset_prefs (p);
 	p->cs_ciaatod = p->ntscmode ? 2 : 1;
 	return configure_rom (p, roms, romcheck);
@@ -8315,9 +8347,9 @@ static int bip_a4000 (struct uae_prefs *p, int config, int compa, int romcheck)
 	roms[3] = 12;
 	roms[4] = -1;
 
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x200000;
-	p->mbresmem_low_size = 8 * 1024 * 1024;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x200000;
+	p->mbresmem_low.size = 8 * 1024 * 1024;
 	p->cpu_model = 68030;
 	p->fpu_model = 68882;
 	switch (config)
@@ -8331,7 +8363,7 @@ static int bip_a4000 (struct uae_prefs *p, int config, int compa, int romcheck)
 		p->fpu_model = 68060;
 		p->ppc_mode = 1;
 		cpuboard_setboard(p, BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_PPC);
-		p->cpuboardmem1_size = 128 * 1024 * 1024;
+		p->cpuboardmem1.size = 128 * 1024 * 1024;
 		int roms_ppc[] = { 98, -1 };
 		configure_rom(p, roms_ppc, romcheck);
 		break;
@@ -8361,9 +8393,9 @@ static int bip_a4000t (struct uae_prefs *p, int config, int compa, int romcheck)
 	roms[2] = 13;
 	roms[3] = -1;
 
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x200000;
-	p->mbresmem_low_size = 8 * 1024 * 1024;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x200000;
+	p->mbresmem_low.size = 8 * 1024 * 1024;
 	p->cpu_model = 68030;
 	p->fpu_model = 68882;
 	if (config > 0) {
@@ -8389,7 +8421,7 @@ static int bip_a4000t (struct uae_prefs *p, int config, int compa, int romcheck)
 static void bip_velvet(struct uae_prefs *p, int config, int compa, int romcheck)
 {
 	p->chipset_mask = 0;
-	p->bogomem_size = 0;
+	p->bogomem.size = 0;
 	p->sound_filter = FILTER_SOUND_ON;
 	set_68000_compa (p, compa);
 	p->floppyslots[1].dfxtype = DRV_NONE;
@@ -8400,7 +8432,7 @@ static void bip_velvet(struct uae_prefs *p, int config, int compa, int romcheck)
 	built_in_chipset_prefs (p);
 	p->cs_denisenoehb = 1;
 	p->cs_cia6526 = 1;
-	p->chipmem_size = 0x40000;
+	p->chipmem.size = 0x40000;
 }
 
 static int bip_a1000 (struct uae_prefs *p, int config, int compa, int romcheck)
@@ -8410,7 +8442,7 @@ static int bip_a1000 (struct uae_prefs *p, int config, int compa, int romcheck)
 	roms[0] = 24;
 	roms[1] = -1;
 	p->chipset_mask = 0;
-	p->bogomem_size = 0;
+	p->bogomem.size = 0;
 	p->sound_filter = FILTER_SOUND_ON;
 	set_68000_compa (p, compa);
 	p->floppyslots[1].dfxtype = DRV_NONE;
@@ -8422,7 +8454,7 @@ static int bip_a1000 (struct uae_prefs *p, int config, int compa, int romcheck)
 	if (config > 0)
 		p->cs_denisenoehb = 1;
 	if (config > 1)
-		p->chipmem_size = 0x40000;
+		p->chipmem.size = 0x40000;
 	if (config > 2) {
 		roms[0] = 125;
 		roms[1] = -1;
@@ -8435,8 +8467,8 @@ static int bip_cdtvcr (struct uae_prefs *p, int config, int compa, int romcheck)
 {
 	int roms[4];
 
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x100000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x100000;
 	p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
 	p->cs_cdtvcd = p->cs_cdtvram = true;
 	p->cs_cdtvcr = true;
@@ -8471,8 +8503,8 @@ static int bip_cdtv (struct uae_prefs *p, int config, int compa, int romcheck)
 	if (config >= 2)
 		return bip_cdtvcr(p, config - 2, compa, romcheck);
 
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x100000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x100000;
 	p->chipset_mask = CSMASK_ECS_AGNUS;
 	p->cs_cdtvcd = p->cs_cdtvram = 1;
 	if (config > 0) {
@@ -8565,7 +8597,7 @@ static int bip_a1200 (struct uae_prefs *p, int config, int compa, int romcheck)
 		break;
 		case 2:
 		cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230IV);
-		p->cpuboardmem1_size = 32 * 1024 * 1024;
+		p->cpuboardmem1.size = 32 * 1024 * 1024;
 		p->cpu_model = 68030;
 		p->cs_rtc = 1;
 		roms_bliz[0] = 89;
@@ -8573,7 +8605,7 @@ static int bip_a1200 (struct uae_prefs *p, int config, int compa, int romcheck)
 		break;
 		case 3:
 		cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260);
-		p->cpuboardmem1_size = 32 * 1024 * 1024;
+		p->cpuboardmem1.size = 32 * 1024 * 1024;
 		p->cpu_model = 68040;
 		p->fpu_model = 68040;
 		p->cs_rtc = 1;
@@ -8582,7 +8614,7 @@ static int bip_a1200 (struct uae_prefs *p, int config, int compa, int romcheck)
 		break;
 		case 4:
 		cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260);
-		p->cpuboardmem1_size = 32 * 1024 * 1024;
+		p->cpuboardmem1.size = 32 * 1024 * 1024;
 		p->cpu_model = 68060;
 		p->fpu_model = 68060;
 		p->cs_rtc = 1;
@@ -8591,7 +8623,7 @@ static int bip_a1200 (struct uae_prefs *p, int config, int compa, int romcheck)
 		break;
 		case 5:
 		cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_PPC);
-		p->cpuboardmem1_size = 256 * 1024 * 1024;
+		p->cpuboardmem1.size = 256 * 1024 * 1024;
 		p->cpu_model = 68060;
 		p->fpu_model = 68060;
 		p->ppc_mode = 1;
@@ -8618,12 +8650,12 @@ static int bip_a600 (struct uae_prefs *p, int config, int compa, int romcheck)
 	set_68000_compa (p, compa);
 	p->cs_compatible = CP_A600;
 	built_in_chipset_prefs (p);
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x100000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x100000;
 	if (config > 0)
 		p->cs_rtc = 1;
 	if (config == 1)
-		p->chipmem_size = 0x200000;
+		p->chipmem.size = 0x200000;
 	if (config == 2)
 		p->fastmem[0].size = 0x400000;
 	p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
@@ -8639,12 +8671,12 @@ static int bip_a500p (struct uae_prefs *p, int config, int compa, int romcheck)
 	set_68000_compa (p, compa);
 	p->cs_compatible = CP_A500P;
 	built_in_chipset_prefs (p);
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x100000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x100000;
 	if (config > 0)
 		p->cs_rtc = 1;
 	if (config == 1)
-		p->chipmem_size = 0x200000;
+		p->chipmem.size = 0x200000;
 	if (config == 2)
 		p->fastmem[0].size = 0x400000;
 	p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
@@ -8669,13 +8701,13 @@ static int bip_a500 (struct uae_prefs *p, int config, int compa, int romcheck)
 	case 2: // KS 1.3, ECS Agnus, 1.0M Chip
 		roms[0] = 6;
 		roms[1] = 32;
-		p->bogomem_size = 0;
-		p->chipmem_size = 0x100000;
+		p->bogomem.size = 0;
+		p->chipmem.size = 0x100000;
 		break;
 	case 3: // KS 1.3, OCS Agnus, 0.5M Chip
 		roms[0] = 6;
 		roms[1] = 32;
-		p->bogomem_size = 0;
+		p->bogomem.size = 0;
 		p->chipset_mask = 0;
 		p->cs_rtc = 0;
 		p->floppyslots[1].dfxtype = DRV_NONE;
@@ -8683,7 +8715,7 @@ static int bip_a500 (struct uae_prefs *p, int config, int compa, int romcheck)
 	case 4: // KS 1.2, OCS Agnus, 0.5M Chip
 		roms[0] = 5;
 		roms[1] = 4;
-		p->bogomem_size = 0;
+		p->bogomem.size = 0;
 		p->chipset_mask = 0;
 		p->cs_rtc = 0;
 		p->floppyslots[1].dfxtype = DRV_NONE;
@@ -8711,8 +8743,8 @@ static int bip_super (struct uae_prefs *p, int config, int compa, int romcheck)
 	roms[4] = 12;
 	roms[5] = 11;
 	roms[6] = -1;
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x400000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x400000;
 	p->z3fastmem[0].size = 8 * 1024 * 1024;
 	p->rtgboards[0].rtgmem_size = 16 * 1024 * 1024;
 	p->cpu_model = 68040;
@@ -8746,7 +8778,7 @@ static int bip_arcadia (struct uae_prefs *p, int config, int compa, int romcheck
 	int roms[4], i;
 	struct romlist **rl;
 
-	p->bogomem_size = 0;
+	p->bogomem.size = 0;
 	p->chipset_mask = 0;
 	p->cs_rtc = 0;
 	p->nr_floppies = 0;
@@ -8787,8 +8819,8 @@ static int bip_casablanca(struct uae_prefs *p, int config, int compa, int romche
 	roms[0] = 231;
 	roms[1] = -1;
 
-	p->bogomem_size = 0;
-	p->chipmem_size = 0x200000;
+	p->bogomem.size = 0;
+	p->chipmem.size = 0x200000;
 	switch (config)
 	{
 	default:
@@ -8927,7 +8959,7 @@ int built_in_chipset_prefs (struct uae_prefs *p)
 			// very A500-like
 			p->cs_df0idhw = 0;
 			p->cs_resetwarning = 0;
-			if (p->bogomem_size || p->chipmem_size > 0x80000 || p->fastmem[0].size)
+			if (p->bogomem.size || p->chipmem.size > 0x80000 || p->fastmem[0].size)
 				p->cs_rtc = 1;
 			p->cs_ciatodbug = true;
 		} else {
@@ -8966,7 +8998,7 @@ int built_in_chipset_prefs (struct uae_prefs *p)
 	case CP_A500: // A500
 		p->cs_df0idhw = 0;
 		p->cs_resetwarning = 0;
-		if (p->bogomem_size || p->chipmem_size > 0x80000 || p->fastmem[0].size)
+		if (p->bogomem.size || p->chipmem.size > 0x80000 || p->fastmem[0].size)
 			p->cs_rtc = 1;
 		p->cs_ciatodbug = true;
 		break;
diff --git a/consolehook.cpp b/consolehook.cpp
index 87e2baab..5544715f 100644
--- a/consolehook.cpp
+++ b/consolehook.cpp
@@ -38,9 +38,9 @@ void consolehook_config (struct uae_prefs *p)
 	p->cachesize = 8192;
 	p->cpu_compatible = 0;
 	p->address_space_24 = 0;
-	p->chipmem_size = 0x00200000;
+	p->chipmem.size = 0x00200000;
 	p->fastmem[0].size = 0x00800000;
-	p->bogomem_size = 0;
+	p->bogomem.size = 0;
 	p->nr_floppies = 1;
 	p->floppyslots[1].dfxtype = DRV_NONE;
 	p->floppy_speed = 0;
diff --git a/cpuboard.cpp b/cpuboard.cpp
index fc8a499b..90048d1c 100644
--- a/cpuboard.cpp
+++ b/cpuboard.cpp
@@ -1717,7 +1717,7 @@ void cpuboard_reset(int hardreset)
 #endif
 	configured = false;
 	delayed_rom_protect = 0;
-	currprefs.cpuboardmem1_size = changed_prefs.cpuboardmem1_size;
+	currprefs.cpuboardmem1.size = changed_prefs.cpuboardmem1.size;
 	maprom_unwriteprotect();
 	if (hardreset || (!mapromconfigured() && (is_blizzard(&currprefs) || is_blizzard2060(&currprefs))))
 		maprom_state = 0;
@@ -1810,8 +1810,8 @@ static void memory_mirror_bank(addrbank *bank, uaecptr end_addr)
 
 static void cpuboard_custom_memory(uaecptr addr, int max, bool swap, bool alias)
 {
-	int size1 = swap ? currprefs.cpuboardmem2_size : currprefs.cpuboardmem1_size;
-	int size2 = swap ? currprefs.cpuboardmem1_size : currprefs.cpuboardmem2_size;
+	int size1 = swap ? currprefs.cpuboardmem2.size : currprefs.cpuboardmem1.size;
+	int size2 = swap ? currprefs.cpuboardmem1.size : currprefs.cpuboardmem2.size;
 	int size_low = size1;
 	max *= 1024 * 1024;
 	if (size_low > max)
@@ -1836,7 +1836,7 @@ static void cpuboard_init_2(void)
 	if (!currprefs.cpuboard_type)
 		return;
 
-	cpuboard_size = currprefs.cpuboardmem1_size;
+	cpuboard_size = currprefs.cpuboardmem1.size;
 	cpuboardmem1_bank.reserved_size = 0;
 	cpuboardmem2_bank.reserved_size = 0;
 
@@ -2151,7 +2151,7 @@ void cpuboard_init(void)
 	if (!currprefs.cpuboard_type)
 		return;
 
-	if (cpuboard_size == currprefs.cpuboardmem1_size)
+	if (cpuboard_size == currprefs.cpuboardmem1.size)
 		return;
 
 	cpuboard_cleanup();
@@ -2910,7 +2910,7 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci)
 		if (is_blizzardppc(p)) {
 			flashtype = 0xa4;
 			f0rom_size = 524288;
-			aci->last_high_ram = BLIZZARDMK4_RAM_BASE_48 + p->cpuboardmem1_size / 2;
+			aci->last_high_ram = BLIZZARDMK4_RAM_BASE_48 + p->cpuboardmem1.size / 2;
 		} else {
 			flashtype = 0x20;
 			f0rom_size = 131072;
@@ -2959,7 +2959,7 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci)
 				zfile_fread(blizzardea_bank.baseaddr + 0x10000, 32768, 1, autoconfig_rom);
 			}
 		}
-		aci->last_high_ram = BLIZZARDMK4_RAM_BASE_48 + p->cpuboardmem1_size / 2;
+		aci->last_high_ram = BLIZZARDMK4_RAM_BASE_48 + p->cpuboardmem1.size / 2;
 	} else if (is_blizzard1230mk2(p)) {
 		earom_size = 131072;
 		for (int i = 0; i < 32768; i++) {
diff --git a/custom.cpp b/custom.cpp
index 3e60042e..3006de83 100644
--- a/custom.cpp
+++ b/custom.cpp
@@ -5522,8 +5522,8 @@ static void immediate_copper (int num)
 			pos = oldpos;
 		if (!dmaen(DMA_COPPER))
 			break;
-		if (cop_state.ip >= currprefs.chipmem_size &&
-			(cop_state.ip < currprefs.z3chipmem_start || cop_state.ip >= currprefs.z3chipmem_start + currprefs.z3chipmem_size) &&
+		if (cop_state.ip >= currprefs.chipmem.size &&
+			(cop_state.ip < currprefs.z3chipmem.start_address || cop_state.ip >= currprefs.z3chipmem.start_address + currprefs.z3chipmem.size) &&
 			(cop_state.ip < debugmem_bank.start || cop_state.ip >= debugmem_bank.start + debugmem_bank.allocated_size))
 			break;
 		pos++;
diff --git a/debug.cpp b/debug.cpp
index f6ecd759..e9eed5f6 100644
--- a/debug.cpp
+++ b/debug.cpp
@@ -2884,11 +2884,11 @@ void debug_check_reg(uae_u32 addr, int write, uae_u16 v)
 
 	if (spc & CD_DMA_PTR) {
 		uae_u32 addr = (custom_storage[((reg & ~2) >> 1)].value << 16) | custom_storage[((reg | 2) >> 1)].value;
-		if (currprefs.z3chipmem_size) {
-			if (addr >= currprefs.z3chipmem_start && addr < currprefs.z3chipmem_start + currprefs.z3chipmem_size)
+		if (currprefs.z3chipmem.size) {
+			if (addr >= currprefs.z3chipmem.start_address && addr < currprefs.z3chipmem.start_address + currprefs.z3chipmem.size)
 				return;
 		}
-		if(addr >= currprefs.chipmem_size)
+		if(addr >= currprefs.chipmem.size)
 			write_log(_T("DMA pointer %04x (%s) set to invalid value %08x %s=%08x\n"), reg, cd->name, addr,
 				custom_storage[reg >> 1].pc & 1 ? _T("COP") : _T("PC"), custom_storage[reg >> 1].pc);
 	}
@@ -2923,11 +2923,11 @@ static void is_valid_dma(int reg, int ptrreg, uaecptr addr)
 		return;
 	if (reg == 0x1fe) // refresh
 		return;
-	if (currprefs.z3chipmem_size) {
-		if (addr >= currprefs.z3chipmem_start && addr < currprefs.z3chipmem_start + currprefs.z3chipmem_size)
+	if (currprefs.z3chipmem.size) {
+		if (addr >= currprefs.z3chipmem.start_address && addr < currprefs.z3chipmem.start_address + currprefs.z3chipmem.size)
 			return;
 	}
-	if (!(addr & ~(currprefs.chipmem_size - 1)))
+	if (!(addr & ~(currprefs.chipmem.size - 1)))
 		return;
 	const struct customData *cdreg = &custd[reg >> 1];
 	const struct customData *cdptr = &custd[ptrreg >> 1];
@@ -3279,7 +3279,7 @@ uae_u16 debug_wputpeekdma_chipram (uaecptr addr, uae_u32 v, uae_u32 mask, int re
 	is_valid_dma(reg, ptrreg, addr);
 	if (debug_mem_banks[addr >> 16] == NULL)
 		return v;
-	if (!currprefs.z3chipmem_size)
+	if (!currprefs.z3chipmem.size)
 		addr &= chipmem_bank.mask;
 	memwatch_func (addr & chipmem_bank.mask, 2, 2, &v, mask, reg);
 	return v;
@@ -3292,7 +3292,7 @@ uae_u16 debug_wgetpeekdma_chipram (uaecptr addr, uae_u32 v, uae_u32 mask, int re
 	is_valid_dma(reg, ptrreg, addr);
 	if (debug_mem_banks[addr >> 16] == NULL)
 		return v;
-	if (!currprefs.z3chipmem_size)
+	if (!currprefs.z3chipmem.size)
 		addr &= chipmem_bank.mask;
 	memwatch_func (addr, 1, 2, &vv, mask, reg);
 	return vv;
@@ -5874,11 +5874,11 @@ static bool debug_line (TCHAR *input)
 						_stprintf(buf, _T("0 dff000 200 NONE"));
 						pbuf = buf;
 						memwatch(&pbuf);
-						_stprintf(buf, _T("1 0 %08x NONE"), currprefs.chipmem_size);
+						_stprintf(buf, _T("1 0 %08x NONE"), currprefs.chipmem.size);
 						pbuf = buf;
 						memwatch(&pbuf);
-						if (currprefs.bogomem_size) {
-							_stprintf(buf, _T("2 c00000 %08x NONE"), currprefs.bogomem_size);
+						if (currprefs.bogomem.size) {
+							_stprintf(buf, _T("2 c00000 %08x NONE"), currprefs.bogomem.size);
 							pbuf = buf;
 							memwatch(&pbuf);
 						}
diff --git a/debugmem.cpp b/debugmem.cpp
index 87cec2af..6b4da72d 100644
--- a/debugmem.cpp
+++ b/debugmem.cpp
@@ -3549,7 +3549,7 @@ static struct debugmemallocs *ismysegment(uaecptr addr)
 		return NULL;
 	addr -= debugmem_bank.start;
 	if (addr >= debugmem_bank.allocated_size)
-		return false;
+		return NULL;
 	for (int i = 1; i <= executable_last_segment; i++) {
 		struct debugmemallocs *alloc = allocs[i];
 		if (addr >= alloc->start && addr < alloc->start + alloc->size)
diff --git a/devices.cpp b/devices.cpp
index f87624ff..371bc44b 100644
--- a/devices.cpp
+++ b/devices.cpp
@@ -379,14 +379,14 @@ void devices_restore_start(void)
 {
 	restore_cia_start();
 	restore_blkdev_start();
-	changed_prefs.bogomem_size = 0;
-	changed_prefs.chipmem_size = 0;
+	changed_prefs.bogomem.size = 0;
+	changed_prefs.chipmem.size = 0;
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		changed_prefs.fastmem[i].size = 0;
 		changed_prefs.z3fastmem[i].size = 0;
 	}
-	changed_prefs.mbresmem_low_size = 0;
-	changed_prefs.mbresmem_high_size = 0;
+	changed_prefs.mbresmem_low.size = 0;
+	changed_prefs.mbresmem_high.size = 0;
 	restore_expansion_boards(NULL);
 }
 
diff --git a/expansion.cpp b/expansion.cpp
index 8bfc3d78..396a81e6 100644
--- a/expansion.cpp
+++ b/expansion.cpp
@@ -287,7 +287,7 @@ bool expamem_z3hack(struct uae_prefs *p)
  */
 static void addextrachip (uae_u32 sysbase)
 {
-	if (currprefs.chipmem_size <= 0x00200000)
+	if (currprefs.chipmem.size <= 0x00200000)
 		return;
 	if (sysbase & 0x80000001)
 		return;
@@ -311,11 +311,11 @@ static void addextrachip (uae_u32 sysbase)
 			ml = next;
 			continue;
 		}
-		if (upper >= currprefs.chipmem_size)
+		if (upper >= currprefs.chipmem.size)
 			return;
-		uae_u32 added = currprefs.chipmem_size - upper;
+		uae_u32 added = currprefs.chipmem.size - upper;
 		uae_u32 first = get_long (ml + 16);
-		put_long (ml + 24, currprefs.chipmem_size); // mh_Upper
+		put_long (ml + 24, currprefs.chipmem.size); // mh_Upper
 		put_long (ml + 28, get_long (ml + 28) + added); // mh_Free
 		uae_u32 next = 0;
 		while (first) {
@@ -325,7 +325,7 @@ static void addextrachip (uae_u32 sysbase)
 		if (next) {
 			uae_u32 bytes = get_long(next + 4);
 			if (next + bytes == 0x00200000) {
-				put_long(next + 4, currprefs.chipmem_size - next);
+				put_long(next + 4, currprefs.chipmem.size - next);
 			} else {
 				put_long(0x00200000 + 0, 0);
 				put_long(0x00200000 + 4, added);
@@ -609,6 +609,7 @@ void expamem_next(addrbank *mapped, addrbank *next)
 			aci.doinit = true;
 			aci.prefs = &currprefs;
 			aci.rc = cards[ecard]->rc;
+			aci.devnum = (ec->flags >> 16) & 255;
 			ec->initrc(&aci);
 		} else {
 			call_card_init(ecard);
@@ -1745,7 +1746,7 @@ static bool megachipram_init(struct autoconfig_info *aci)
 {
 	aci->zorro = 0;
 	aci->start = 0x10000000;
-	aci->size = aci->prefs->z3chipmem_size;
+	aci->size = aci->prefs->z3chipmem.size;
 	aci->label = _T("32-bit Chip RAM");
 	return true;
 }
@@ -2225,7 +2226,7 @@ static void allocate_expamem (void)
 	for (int i = 0; i < MAX_RTG_BOARDS; i++) {
 		memcpy(&currprefs.rtgboards[i], &changed_prefs.rtgboards[i], sizeof(struct rtgboardconfig));
 	}
-	currprefs.z3chipmem_size = changed_prefs.z3chipmem_size;
+	currprefs.z3chipmem.size = changed_prefs.z3chipmem.size;
 
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		currprefs.fastmem[i].size = changed_prefs.fastmem[i].size;
@@ -2251,11 +2252,11 @@ static void allocate_expamem (void)
 
 	z3chipmem_bank.start = Z3BASE_UAE;
 
-	if (currprefs.mbresmem_high_size >= 128 * 1024 * 1024)
-		z3chipmem_bank.start += (currprefs.mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
+	if (currprefs.mbresmem_high.size >= 128 * 1024 * 1024)
+		z3chipmem_bank.start += (currprefs.mbresmem_high.size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
 
-	if (currprefs.z3chipmem_size && z3fastmem_bank[0].start - z3chipmem_bank.start < currprefs.z3chipmem_size)
-		currprefs.z3chipmem_size = changed_prefs.z3chipmem_size = 0;	
+	if (currprefs.z3chipmem.size && z3fastmem_bank[0].start - z3chipmem_bank.start < currprefs.z3chipmem.size)
+		currprefs.z3chipmem.size = changed_prefs.z3chipmem.size = 0;	
 
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		if (fastmem_bank[i].reserved_size != currprefs.fastmem[i].size) {
@@ -2314,9 +2315,9 @@ static void allocate_expamem (void)
 			memory_hardreset (1);
 		}
 	}
-	if (z3chipmem_bank.reserved_size != currprefs.z3chipmem_size) {
+	if (z3chipmem_bank.reserved_size != currprefs.z3chipmem.size) {
 		mapped_free (&z3chipmem_bank);
-		mapped_malloc_dynamic (&currprefs.z3chipmem_size, &changed_prefs.z3chipmem_size, &z3chipmem_bank, 16, _T("*"));
+		mapped_malloc_dynamic (&currprefs.z3chipmem.size, &changed_prefs.z3chipmem.size, &z3chipmem_bank, 16, _T("*"));
 		memory_hardreset (1);
 	}
 
@@ -2350,8 +2351,9 @@ static void allocate_expamem (void)
 		}
 		if (z3chipmem_bank.allocated_size > 0) {
 			restore_ram (z3_fileposchip, z3chipmem_bank.baseaddr);
-			map_banks(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16,
+			map_banks(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem.size >> 16,
 				z3chipmem_bank.allocated_size);
+			initramboard(&z3chipmem_bank, &currprefs.z3chipmem);
 		}
 #ifdef PICASSO96
 		if (gfxmem_banks[0]->allocated_size > 0 && gfxmem_banks[0]->start > 0) {
@@ -2407,9 +2409,9 @@ static uaecptr check_boot_rom (struct uae_prefs *p, int *boot_rom_type)
 		return b;
 	if (p->win32_automount_removable)
 		return b;
-	if (p->chipmem_size > 2 * 1024 * 1024)
+	if (p->chipmem.size > 2 * 1024 * 1024)
 		return b;
-	if (p->z3chipmem_size)
+	if (p->z3chipmem.size)
 		return b;
 	if (p->boot_rom >= 3)
 		return b;
@@ -2526,6 +2528,7 @@ static void add_expansions(struct uae_prefs *p, int zorro, int *fastmem_nump, in
 					cards_set[cardno].rc = rc;
 					cards_set[cardno].zorro = zorro;
 					cards_set[cardno].ert = ert;
+					cards_set[cardno].flags = j << 16;
 					cards_set[cardno++].map = NULL;
 					if (ert->init2) {
 						cards_set[cardno].flags = CARD_FLAG_CHILD;
@@ -2683,14 +2686,14 @@ static void reset_ac_data(struct uae_prefs *p)
 	expamem_z3_highram_uae = 0;
 
 	expamem_highmem_pointer = 0;
-	if (p->mbresmem_low_size)
+	if (p->mbresmem_low.size)
 		expamem_highmem_pointer = 0x08000000;
-	if (p->mbresmem_high_size)
-		expamem_highmem_pointer = 0x08000000 + p->mbresmem_high_size;
+	if (p->mbresmem_high.size)
+		expamem_highmem_pointer = 0x08000000 + p->mbresmem_high.size;
 
-	if (p->mbresmem_high_size >= 128 * 1024 * 1024)
-		expamem_z3_pointer_uae += (p->mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
-	expamem_z3_pointer_uae += p->z3chipmem_size;
+	if (p->mbresmem_high.size >= 128 * 1024 * 1024)
+		expamem_z3_pointer_uae += (p->mbresmem_high.size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
+	expamem_z3_pointer_uae += p->z3chipmem.size;
 	expamem_board_pointer = 0;
 	expamem_board_size = 0;
 	memset(slots_20, 0, sizeof slots_20);
@@ -3485,7 +3488,7 @@ static void expansion_add_autoconfig(struct uae_prefs *p)
 		cards_set[cardno++].map = NULL;
 	}
 
-	if (p->z3chipmem_size) {
+	if (p->z3chipmem.size) {
 		cards_set[cardno].flags = 0;
 		cards_set[cardno].name = _T("MegaChipRAM");
 		cards_set[cardno].initrc = megachipram_init;
@@ -3799,8 +3802,8 @@ void expansion_map(void)
 			map_banks(&romboardmem_bank[i], rb->start_address >> 16, rb->size >> 16, 0);
 		}
 	}
-	if (currprefs.z3chipmem_size) {
-		map_banks_z3(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16);
+	if (currprefs.z3chipmem.size) {
+		map_banks_z3(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem.size >> 16);
 	}
 	if (do_mount < 0 && ks11orolder()) {
 		filesys_bank.start = 0xe90000;
@@ -3867,7 +3870,7 @@ void restore_zram (int len, size_t filepos, int num)
 {
 	if (num == -1) {
 		z3_fileposchip = filepos;
-		changed_prefs.z3chipmem_size = len;
+		changed_prefs.z3chipmem.size = len;
 	} else {
 		z3_filepos[num] = filepos;
 		changed_prefs.z3fastmem[num].size = len;
diff --git a/gayle.cpp b/gayle.cpp
index 57e642ab..c8517c4f 100644
--- a/gayle.cpp
+++ b/gayle.cpp
@@ -1865,11 +1865,11 @@ static void gayle_map_pcmcia (void)
 	}
 	if (pcmcia_card == 0 || (gayle_cs & GAYLE_CS_DIS)) {
 		map_banks_cond (&dummy_bank, 0xa0, 8, 0);
-		if (currprefs.chipmem_size <= 4 * 1024 * 1024 && !pcmcia_override)
+		if (currprefs.chipmem.size <= 4 * 1024 * 1024 && !pcmcia_override)
 			map_banks_cond (&dummy_bank, PCMCIA_COMMON_START >> 16, PCMCIA_COMMON_SIZE >> 16, 0);
 	} else {
 		map_banks_cond (&gayle_attr_bank, 0xa0, 8, 0);
-		if (currprefs.chipmem_size <= 4 * 1024 * 1024 && !pcmcia_override)
+		if (currprefs.chipmem.size <= 4 * 1024 * 1024 && !pcmcia_override)
 			map_banks_cond (&gayle_common_bank, PCMCIA_COMMON_START >> 16, PCMCIA_COMMON_SIZE >> 16, 0);
 	}
 }
diff --git a/include/options.h b/include/options.h
index dbf13bae..b1374e12 100644
--- a/include/options.h
+++ b/include/options.h
@@ -371,7 +371,8 @@ struct gfx_filterdata
 	int gfx_filter_keep_autoscale_aspect;
 };
 
-#define MAX_DUPLICATE_EXPANSION_BOARDS 4
+#define MAX_DUPLICATE_EXPANSION_BOARDS 5
+#define MAX_AVAILABLE_DUPLICATE_EXPANSION_BOARDS 4
 #define MAX_EXPANSION_BOARDS 20
 #define ROMCONFIG_CONFIGTEXT_LEN 256
 struct boardromconfig;
@@ -741,20 +742,19 @@ struct uae_prefs {
 	struct ramboard z3fastmem[MAX_RAM_BOARDS];
 	struct ramboard fastmem[MAX_RAM_BOARDS];
 	struct romboard romboards[MAX_ROM_BOARDS];
-	uae_u32 z3chipmem_size;
-	uae_u32 z3chipmem_start;
-	uae_u32 chipmem_size;
-	uae_u32 bogomem_size;
-	uae_u32 mbresmem_low_size;
-	uae_u32 mbresmem_high_size;
-	uae_u32 mem25bit_size;
+	struct ramboard z3chipmem;
+	struct ramboard chipmem;
+	struct ramboard bogomem;
+	struct ramboard mbresmem_low;
+	struct ramboard mbresmem_high;
+	struct ramboard mem25bit;
 	uae_u32 debugmem_start;
 	uae_u32 debugmem_size;
 	int cpuboard_type;
 	int cpuboard_subtype;
 	int cpuboard_settings;
-	uae_u32 cpuboardmem1_size;
-	uae_u32 cpuboardmem2_size;
+	struct ramboard cpuboardmem1;
+	struct ramboard cpuboardmem2;
 	int ppc_implementation;
 	bool rtg_hardwareinterrupt;
 	bool rtg_hardwaresprite;
diff --git a/main.cpp b/main.cpp
index 50630541..791be8ab 100644
--- a/main.cpp
+++ b/main.cpp
@@ -272,8 +272,8 @@ void fixup_cpu (struct uae_prefs *p)
 				cpuboard_setboard(p,  BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_PPC);
 			}
 		}
-		if (p->cpuboardmem1_size < 8 * 1024 * 1024)
-			p->cpuboardmem1_size = 8 * 1024 * 1024;
+		if (p->cpuboardmem1.size < 8 * 1024 * 1024)
+			p->cpuboardmem1.size = 8 * 1024 * 1024;
 	}
 
 	if (p->cpu_model < 68020 && p->cachesize) {
@@ -381,26 +381,26 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
 
 	read_kickstart_version(p);
 
-	if (p->cpuboard_type && p->cpuboardmem1_size > cpuboard_maxmemory(p)) {
-		error_log(_T("Unsupported accelerator board memory size %d (0x%x).\n"), p->cpuboardmem1_size, p->cpuboardmem1_size);
-		p->cpuboardmem1_size = cpuboard_maxmemory(p);
+	if (p->cpuboard_type && p->cpuboardmem1.size > cpuboard_maxmemory(p)) {
+		error_log(_T("Unsupported accelerator board memory size %d (0x%x).\n"), p->cpuboardmem1.size, p->cpuboardmem1.size);
+		p->cpuboardmem1.size = cpuboard_maxmemory(p);
 	}
 	if (cpuboard_memorytype(p) == BOARD_MEMORY_HIGHMEM) {
-		p->mbresmem_high_size = p->cpuboardmem1_size;
+		p->mbresmem_high.size = p->cpuboardmem1.size;
 	} else if (cpuboard_memorytype(p) == BOARD_MEMORY_Z2) {
-		p->fastmem[0].size = p->cpuboardmem1_size;
+		p->fastmem[0].size = p->cpuboardmem1.size;
 	} else if (cpuboard_memorytype(p) == BOARD_MEMORY_25BITMEM) {
-		p->mem25bit_size = p->cpuboardmem1_size;
+		p->mem25bit.size = p->cpuboardmem1.size;
 	} else if (cpuboard_memorytype(p) == BOARD_MEMORY_CUSTOM_32) {
-		p->mem25bit_size = 0;
+		p->mem25bit.size = 0;
 	}
 
-	if (((p->chipmem_size & (p->chipmem_size - 1)) != 0 && p->chipmem_size != 0x180000)
-		|| p->chipmem_size < 0x20000
-		|| p->chipmem_size > 0x800000)
+	if (((p->chipmem.size & (p->chipmem.size - 1)) != 0 && p->chipmem.size != 0x180000)
+		|| p->chipmem.size < 0x20000
+		|| p->chipmem.size > 0x800000)
 	{
-		error_log (_T("Unsupported chipmem size %d (0x%x)."), p->chipmem_size, p->chipmem_size);
-		p->chipmem_size = 0x200000;
+		error_log (_T("Unsupported chipmem size %d (0x%x)."), p->chipmem.size, p->chipmem.size);
+		p->chipmem.size = 0x200000;
 		err = 1;
 	}
 
@@ -480,57 +480,57 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
 	if (p->z3autoconfig_start < 0x1000000)
 		p->z3autoconfig_start = 0x1000000;
 
-	if (p->z3chipmem_size > max_z3fastmem) {
-		error_log (_T("Zorro III fake chipmem size %d (0x%x) larger than max reserved %d (0x%x)."), p->z3chipmem_size, p->z3chipmem_size, max_z3fastmem, max_z3fastmem);
-		p->z3chipmem_size = max_z3fastmem;
+	if (p->z3chipmem.size > max_z3fastmem) {
+		error_log (_T("Zorro III fake chipmem size %d (0x%x) larger than max reserved %d (0x%x)."), p->z3chipmem.size, p->z3chipmem.size, max_z3fastmem, max_z3fastmem);
+		p->z3chipmem.size = max_z3fastmem;
 		err = 1;
 	}
-	if (((p->z3chipmem_size & (p->z3chipmem_size - 1)) != 0 &&  p->z3chipmem_size != 0x18000000 && p->z3chipmem_size != 0x30000000) || (p->z3chipmem_size != 0 && p->z3chipmem_size < 0x100000))
+	if (((p->z3chipmem.size & (p->z3chipmem.size - 1)) != 0 &&  p->z3chipmem.size != 0x18000000 && p->z3chipmem.size != 0x30000000) || (p->z3chipmem.size != 0 && p->z3chipmem.size < 0x100000))
 	{
-		error_log (_T("Unsupported 32-bit chipmem size %d (0x%x)."), p->z3chipmem_size, p->z3chipmem_size);
-		p->z3chipmem_size = 0;
+		error_log (_T("Unsupported 32-bit chipmem size %d (0x%x)."), p->z3chipmem.size, p->z3chipmem.size);
+		p->z3chipmem.size = 0;
 		err = 1;
 	}
 
-	if (p->address_space_24 && (p->z3fastmem[0].size != 0 || p->z3fastmem[1].size != 0 || p->z3fastmem[2].size != 0 || p->z3fastmem[3].size != 0 || p->z3chipmem_size != 0)) {
+	if (p->address_space_24 && (p->z3fastmem[0].size != 0 || p->z3fastmem[1].size != 0 || p->z3fastmem[2].size != 0 || p->z3fastmem[3].size != 0 || p->z3chipmem.size != 0)) {
 		p->z3fastmem[0].size = p->z3fastmem[1].size = p->z3fastmem[2].size = p->z3fastmem[3].size = 0;
-		p->z3chipmem_size = 0;
+		p->z3chipmem.size = 0;
 		error_log (_T("Can't use a Z3 graphics card or 32-bit memory when using a 24 bit address space."));
 	}
 
-	if (p->bogomem_size != 0 && p->bogomem_size != 0x80000 && p->bogomem_size != 0x100000 && p->bogomem_size != 0x180000 && p->bogomem_size != 0x1c0000) {
-		error_log (_T("Unsupported bogomem size %d (0x%x)"), p->bogomem_size, p->bogomem_size);
-		p->bogomem_size = 0;
+	if (p->bogomem.size != 0 && p->bogomem.size != 0x80000 && p->bogomem.size != 0x100000 && p->bogomem.size != 0x180000 && p->bogomem.size != 0x1c0000) {
+		error_log (_T("Unsupported bogomem size %d (0x%x)"), p->bogomem.size, p->bogomem.size);
+		p->bogomem.size = 0;
 		err = 1;
 	}
 
-	if (p->bogomem_size > 0x180000 && (p->cs_fatgaryrev >= 0 || p->cs_ide || p->cs_ramseyrev >= 0)) {
-		p->bogomem_size = 0x180000;
+	if (p->bogomem.size > 0x180000 && (p->cs_fatgaryrev >= 0 || p->cs_ide || p->cs_ramseyrev >= 0)) {
+		p->bogomem.size = 0x180000;
 		error_log (_T("Possible Gayle bogomem conflict fixed."));
 	}
-	if (p->chipmem_size > 0x200000 && (p->fastmem[0].size > 262144 || p->fastmem[1].size > 262144)) {
+	if (p->chipmem.size > 0x200000 && (p->fastmem[0].size > 262144 || p->fastmem[1].size > 262144)) {
 		error_log(_T("You can't use fastmem and more than 2MB chip at the same time."));
-		p->chipmem_size = 0x200000;
+		p->chipmem.size = 0x200000;
 		err = 1;
 	}
-	if (p->mem25bit_size > 128 * 1024 * 1024 || (p->mem25bit_size & 0xfffff)) {
-		p->mem25bit_size = 0;
+	if (p->mem25bit.size > 128 * 1024 * 1024 || (p->mem25bit.size & 0xfffff)) {
+		p->mem25bit.size = 0;
 		error_log(_T("Unsupported 25bit RAM size"));
 	}
-	if (p->mbresmem_low_size > 0x04000000 || (p->mbresmem_low_size & 0xfffff)) {
-		p->mbresmem_low_size = 0;
+	if (p->mbresmem_low.size > 0x04000000 || (p->mbresmem_low.size & 0xfffff)) {
+		p->mbresmem_low.size = 0;
 		error_log (_T("Unsupported Mainboard RAM size"));
 	}
-	if (p->mbresmem_high_size > 0x08000000 || (p->mbresmem_high_size & 0xfffff)) {
-		p->mbresmem_high_size = 0;
+	if (p->mbresmem_high.size > 0x08000000 || (p->mbresmem_high.size & 0xfffff)) {
+		p->mbresmem_high.size = 0;
 		error_log (_T("Unsupported CPU Board RAM size."));
 	}
 
 	for (int i = 0; i < MAX_RTG_BOARDS; i++) {
 		struct rtgboardconfig *rbc = &p->rtgboards[i];
-		if (p->chipmem_size > 0x200000 && rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 2) {
+		if (p->chipmem.size > 0x200000 && rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 2) {
 			error_log(_T("You can't use Zorro II RTG and more than 2MB chip at the same time."));
-			p->chipmem_size = 0x200000;
+			p->chipmem.size = 0x200000;
 			err = 1;
 		}
 		if (rbc->rtgmem_type >= GFXBOARD_HARDWARE) {
@@ -576,13 +576,13 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
 		err = 1;
 	}
 
-	if ((p->z3fastmem[0].size || p->z3fastmem[1].size || p->z3fastmem[2].size || p->z3fastmem[3].size || p->z3chipmem_size) && p->address_space_24) {
+	if ((p->z3fastmem[0].size || p->z3fastmem[1].size || p->z3fastmem[2].size || p->z3fastmem[3].size || p->z3chipmem.size) && p->address_space_24) {
 		error_log (_T("Z3 fast memory can't be used if address space is 24-bit."));
 		p->z3fastmem[0].size = 0;
 		p->z3fastmem[1].size = 0;
 		p->z3fastmem[2].size = 0;
 		p->z3fastmem[3].size = 0;
-		p->z3chipmem_size = 0;
+		p->z3chipmem.size = 0;
 		err = 1;
 	}
 	for (int i = 0; i < MAX_RTG_BOARDS; i++) {
@@ -646,7 +646,7 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
 				p->cs_ramseyrev = 0x0f;
 		}
 	}
-	if (p->chipmem_size >= 0x100000)
+	if (p->chipmem.size >= 0x100000)
 		p->cs_1mchipjumper = true;
 
 	/* Can't fit genlock and A2024 or Graffiti at the same time,
@@ -731,7 +731,7 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
 	if (p->maprom && !p->address_space_24) {
 		p->maprom = 0x0f000000;
 	}
-	if (((p->maprom & 0xff000000) && p->address_space_24) || (p->maprom && p->mbresmem_high_size >= 0x08000000)) {
+	if (((p->maprom & 0xff000000) && p->address_space_24) || (p->maprom && p->mbresmem_high.size >= 0x08000000)) {
 		p->maprom = 0x00e00000;
 	}
 	if (p->maprom && p->cpuboard_type) {
diff --git a/memory.cpp b/memory.cpp
index c244e32b..889803d0 100644
--- a/memory.cpp
+++ b/memory.cpp
@@ -863,7 +863,7 @@ void chipmem_setindirect(void)
 		chipmem_bput_indirect = chipmem_bput_debugmem;
 		chipmem_check_indirect = chipmem_check_bigmem;
 		chipmem_xlate_indirect = chipmem_xlate_bigmem;
-	} else if (currprefs.z3chipmem_size) {
+	} else if (currprefs.z3chipmem.size) {
 		chipmem_lget_indirect = chipmem_lget_bigmem;
 		chipmem_wget_indirect = chipmem_wget_bigmem;
 		chipmem_bget_indirect = chipmem_bget_bigmem;
@@ -1616,9 +1616,9 @@ static bool load_kickstart_replacement(void)
 		currprefs.cachesize == 0 &&
 		currprefs.fastmem[0].size == 0 &&
 		currprefs.z3fastmem[0].size == 0 &&
-		currprefs.mbresmem_high_size == 0 &&
-		currprefs.mbresmem_low_size == 0 &&
-		currprefs.cpuboardmem1_size == 0) {
+		currprefs.mbresmem_high.size == 0 &&
+		currprefs.mbresmem_low.size == 0 &&
+		currprefs.cpuboardmem1.size == 0) {
 
 		changed_prefs.custom_memory_addrs[0] = currprefs.custom_memory_addrs[0] = 0xa80000;
 		changed_prefs.custom_memory_sizes[0] = currprefs.custom_memory_sizes[0] = 512 * 1024;
@@ -2154,7 +2154,7 @@ static void allocate_memory (void)
 	bogomem_aliasing = 0;
 
 	bool bogoreset = (bogomem_bank.flags & ABFLAG_NOALLOC) != 0 &&
-		(chipmem_bank.reserved_size != currprefs.chipmem_size || bogomem_bank.reserved_size != currprefs.bogomem_size);
+		(chipmem_bank.reserved_size != currprefs.chipmem.size || bogomem_bank.reserved_size != currprefs.bogomem.size);
 
 	mapped_free(&fakeuaebootrom_bank);
 
@@ -2164,23 +2164,23 @@ static void allocate_memory (void)
 	}
 
 	/* emulate 0.5M+0.5M with 1M Agnus chip ram aliasing */
-	if (currprefs.chipmem_size == 0x80000 && currprefs.bogomem_size >= 0x80000 &&
+	if (currprefs.chipmem.size == 0x80000 && currprefs.bogomem.size >= 0x80000 &&
 		(currprefs.chipset_mask & CSMASK_ECS_AGNUS) && !(currprefs.chipset_mask & CSMASK_AGA) && currprefs.cpu_model < 68020) {
-			if ((chipmem_bank.reserved_size != currprefs.chipmem_size || bogomem_bank.reserved_size != currprefs.bogomem_size)) {
+			if ((chipmem_bank.reserved_size != currprefs.chipmem.size || bogomem_bank.reserved_size != currprefs.bogomem.size)) {
 				int memsize1, memsize2;
 				mapped_free (&chipmem_bank);
 				mapped_free (&bogomem_bank);
 				bogomem_bank.reserved_size = 0;
-				memsize1 = chipmem_bank.reserved_size = currprefs.chipmem_size;
-				memsize2 = bogomem_bank.reserved_size = currprefs.bogomem_size;
+				memsize1 = chipmem_bank.reserved_size = currprefs.chipmem.size;
+				memsize2 = bogomem_bank.reserved_size = currprefs.bogomem.size;
 				chipmem_bank.mask = chipmem_bank.reserved_size - 1;
 				chipmem_bank.start = chipmem_start_addr;
 				chipmem_full_mask = bogomem_bank.reserved_size * 2 - 1;
 				chipmem_full_size = 0x80000 * 2;
 				chipmem_bank.reserved_size = memsize1 + memsize2;
 				mapped_malloc (&chipmem_bank);
-				chipmem_bank.reserved_size = currprefs.chipmem_size;
-				chipmem_bank.allocated_size = currprefs.chipmem_size;
+				chipmem_bank.reserved_size = currprefs.chipmem.size;
+				chipmem_bank.allocated_size = currprefs.chipmem.size;
 				bogomem_bank.baseaddr = chipmem_bank.baseaddr + memsize1;
 				bogomem_bank.mask = bogomem_bank.reserved_size - 1;
 				bogomem_bank.start = bogomem_start_addr;
@@ -2194,26 +2194,26 @@ static void allocate_memory (void)
 				}
 			}
 			bogomem_aliasing = 1;
-	} else if (currprefs.chipmem_size == 0x80000 && currprefs.bogomem_size >= 0x80000 &&
+	} else if (currprefs.chipmem.size == 0x80000 && currprefs.bogomem.size >= 0x80000 &&
 		!(currprefs.chipset_mask & CSMASK_ECS_AGNUS) && currprefs.cs_1mchipjumper && currprefs.cpu_model < 68020) {
-			if ((chipmem_bank.reserved_size != currprefs.chipmem_size || bogomem_bank.reserved_size != currprefs.bogomem_size)) {
+			if ((chipmem_bank.reserved_size != currprefs.chipmem.size || bogomem_bank.reserved_size != currprefs.bogomem.size)) {
 				int memsize1, memsize2;
 				mapped_free (&chipmem_bank);
 				mapped_free (&bogomem_bank);
 				bogomem_bank.reserved_size = 0;
-				memsize1 = chipmem_bank.reserved_size = currprefs.chipmem_size;
-				memsize2 = bogomem_bank.reserved_size = currprefs.bogomem_size;
+				memsize1 = chipmem_bank.reserved_size = currprefs.chipmem.size;
+				memsize2 = bogomem_bank.reserved_size = currprefs.bogomem.size;
 				chipmem_bank.mask = chipmem_bank.reserved_size - 1;
 				chipmem_bank.start = chipmem_start_addr;
 				chipmem_full_mask = chipmem_bank.reserved_size - 1;
 				chipmem_full_size = chipmem_bank.reserved_size;
 				chipmem_bank.reserved_size = memsize1 + memsize2;
 				mapped_malloc (&chipmem_bank);
-				chipmem_bank.reserved_size = currprefs.chipmem_size;
-				chipmem_bank.allocated_size = currprefs.chipmem_size;
+				chipmem_bank.reserved_size = currprefs.chipmem.size;
+				chipmem_bank.allocated_size = currprefs.chipmem.size;
 				bogomem_bank.baseaddr = chipmem_bank.baseaddr + memsize1;
 				bogomem_bank.mask = bogomem_bank.reserved_size - 1;
-				bogomem_bank.start = chipmem_bank.start + currprefs.chipmem_size;
+				bogomem_bank.start = chipmem_bank.start + currprefs.chipmem.size;
 				bogomem_bank.flags |= ABFLAG_NOALLOC;
 				if (chipmem_bank.baseaddr == 0) {
 					write_log (_T("Fatal error: out of memory for chipmem.\n"));
@@ -2225,12 +2225,12 @@ static void allocate_memory (void)
 			bogomem_aliasing = 2;
 	}
 
-	if (chipmem_bank.reserved_size != currprefs.chipmem_size || bogoreset) {
+	if (chipmem_bank.reserved_size != currprefs.chipmem.size || bogoreset) {
 		int memsize;
 		mapped_free (&chipmem_bank);
 		chipmem_bank.flags &= ~ABFLAG_NOALLOC;
 
-		memsize = chipmem_bank.reserved_size = chipmem_full_size = currprefs.chipmem_size;
+		memsize = chipmem_bank.reserved_size = chipmem_full_size = currprefs.chipmem.size;
 		chipmem_full_mask = chipmem_bank.mask = chipmem_bank.reserved_size - 1;
 		chipmem_bank.start = chipmem_start_addr;
 		if (!currprefs.cachesize && memsize < 0x100000)
@@ -2239,8 +2239,8 @@ static void allocate_memory (void)
 			memsize = 0x200000;
 		chipmem_bank.reserved_size = memsize;
 		mapped_malloc (&chipmem_bank);
-		chipmem_bank.reserved_size = currprefs.chipmem_size;
-		chipmem_bank.allocated_size = currprefs.chipmem_size;
+		chipmem_bank.reserved_size = currprefs.chipmem.size;
+		chipmem_bank.allocated_size = currprefs.chipmem.size;
 		if (chipmem_bank.baseaddr == 0) {
 			write_log (_T("Fatal error: out of memory for chipmem.\n"));
 			chipmem_bank.reserved_size = 0;
@@ -2263,13 +2263,13 @@ static void allocate_memory (void)
 		}
 	}
 
-	if (bogomem_bank.reserved_size != currprefs.bogomem_size || bogoreset) {
-		if (!(bogomem_bank.reserved_size == 0x200000 && currprefs.bogomem_size == 0x180000)) {
+	if (bogomem_bank.reserved_size != currprefs.bogomem.size || bogoreset) {
+		if (!(bogomem_bank.reserved_size == 0x200000 && currprefs.bogomem.size == 0x180000)) {
 			mapped_free (&bogomem_bank);
 			bogomem_bank.flags &= ~ABFLAG_NOALLOC;
 			bogomem_bank.reserved_size = 0;
 
-			bogomem_bank.reserved_size = currprefs.bogomem_size;
+			bogomem_bank.reserved_size = currprefs.bogomem.size;
 			if (bogomem_bank.reserved_size >= 0x180000)
 				bogomem_bank.reserved_size = 0x200000;
 			bogomem_bank.mask = bogomem_bank.reserved_size - 1;
@@ -2297,10 +2297,10 @@ static void allocate_memory (void)
 			}
 		}
 	}
-	if (mem25bit_bank.reserved_size != currprefs.mem25bit_size) {
+	if (mem25bit_bank.reserved_size != currprefs.mem25bit.size) {
 		mapped_free(&mem25bit_bank);
 
-		mem25bit_bank.reserved_size = currprefs.mem25bit_size;
+		mem25bit_bank.reserved_size = currprefs.mem25bit.size;
 		mem25bit_bank.mask = mem25bit_bank.reserved_size - 1;
 		mem25bit_bank.start = 0x01000000;
 		if (mem25bit_bank.reserved_size) {
@@ -2311,10 +2311,10 @@ static void allocate_memory (void)
 		}
 		need_hardreset = true;
 	}
-	if (a3000lmem_bank.reserved_size != currprefs.mbresmem_low_size) {
+	if (a3000lmem_bank.reserved_size != currprefs.mbresmem_low.size) {
 		mapped_free (&a3000lmem_bank);
 
-		a3000lmem_bank.reserved_size = currprefs.mbresmem_low_size;
+		a3000lmem_bank.reserved_size = currprefs.mbresmem_low.size;
 		a3000lmem_bank.mask = a3000lmem_bank.reserved_size - 1;
 		a3000lmem_bank.start = 0x08000000 - a3000lmem_bank.reserved_size;
 		if (a3000lmem_bank.reserved_size) {
@@ -2325,10 +2325,10 @@ static void allocate_memory (void)
 		}
 		need_hardreset = true;
 	}
-	if (a3000hmem_bank.reserved_size != currprefs.mbresmem_high_size) {
+	if (a3000hmem_bank.reserved_size != currprefs.mbresmem_high.size) {
 		mapped_free (&a3000hmem_bank);
 
-		a3000hmem_bank.reserved_size = currprefs.mbresmem_high_size;
+		a3000hmem_bank.reserved_size = currprefs.mbresmem_high.size;
 		a3000hmem_bank.mask = a3000hmem_bank.reserved_size - 1;
 		a3000hmem_bank.start = 0x08000000;
 		if (a3000hmem_bank.reserved_size) {
@@ -2502,6 +2502,7 @@ void map_overlay (int chip)
 			rb = &kickmem_bank;
 		map_banks (rb, 0, size, 0x80000);
 	}
+	initramboard(&chipmem_bank, &currprefs.chipmem);
 	overlay_state = chip;
 	fill_ce_banks ();
 	cpuboard_overlay_override();
@@ -2650,10 +2651,10 @@ void memory_reset (void)
 	memset(ce_cachable, CACHE_ENABLE_INS, sizeof ce_cachable);
 
 	be_cnt = be_recursive = 0;
-	currprefs.chipmem_size = changed_prefs.chipmem_size;
-	currprefs.bogomem_size = changed_prefs.bogomem_size;
-	currprefs.mbresmem_low_size = changed_prefs.mbresmem_low_size;
-	currprefs.mbresmem_high_size = changed_prefs.mbresmem_high_size;
+	currprefs.chipmem.size = changed_prefs.chipmem.size;
+	currprefs.bogomem.size = changed_prefs.bogomem.size;
+	currprefs.mbresmem_low.size = changed_prefs.mbresmem_low.size;
+	currprefs.mbresmem_high.size = changed_prefs.mbresmem_high.size;
 	currprefs.cs_ksmirror_e0 = changed_prefs.cs_ksmirror_e0;
 	currprefs.cs_ksmirror_a8 = changed_prefs.cs_ksmirror_a8;
 	currprefs.cs_ciaoverlay = changed_prefs.cs_ciaoverlay;
@@ -2710,7 +2711,7 @@ void memory_reset (void)
 	}
 
 	if (bogomem_bank.baseaddr) {
-		int t = currprefs.bogomem_size >> 16;
+		int t = currprefs.bogomem.size >> 16;
 		if (t > 0x1C)
 			t = 0x1C;
 		if (t > 0x18 && ((currprefs.chipset_mask & CSMASK_AGA) || (currprefs.cpu_model >= 68020 && !currprefs.address_space_24)))
@@ -2719,6 +2720,7 @@ void memory_reset (void)
 			map_banks (&bogomem_bank, 0x08, t, 0);
 		else
 			map_banks (&bogomem_bank, 0xC0, t, 0);
+		initramboard(&bogomem_bank, &currprefs.bogomem);
 	}
 	if (currprefs.cs_ide || currprefs.cs_pcmcia) {
 		if (currprefs.cs_ide == IDE_A600A1200 || currprefs.cs_pcmcia) {
@@ -2746,14 +2748,21 @@ void memory_reset (void)
 		map_banks (&gayle2_bank, 0xDD, 2, 0);
 	}
 #endif
-	if (mem25bit_bank.baseaddr)
+	if (mem25bit_bank.baseaddr) {
 		map_banks(&mem25bit_bank, mem25bit_bank.start >> 16, mem25bit_bank.allocated_size >> 16, 0);
-	if (a3000lmem_bank.baseaddr)
+		initramboard(&mem25bit_bank, &currprefs.mem25bit);
+	}
+	if (a3000lmem_bank.baseaddr) {
 		map_banks(&a3000lmem_bank, a3000lmem_bank.start >> 16, a3000lmem_bank.allocated_size >> 16, 0);
-	if (a3000hmem_bank.baseaddr)
+		initramboard(&a3000lmem_bank, &currprefs.mbresmem_low);
+	}
+	if (a3000hmem_bank.baseaddr) {
 		map_banks(&a3000hmem_bank, a3000hmem_bank.start >> 16, a3000hmem_bank.allocated_size >> 16, 0);
-	if (debugmem_bank.baseaddr)
+		initramboard(&a3000hmem_bank, &currprefs.mbresmem_high);
+	}
+	if (debugmem_bank.baseaddr) {
 		map_banks(&debugmem_bank, debugmem_bank.start >> 16, debugmem_bank.allocated_size >> 16, 0);
+	}
 	cpuboard_map();
 	map_banks_set(&kickmem_bank, 0xF8, 8, 0);
 	if (currprefs.maprom) {
@@ -2763,9 +2772,9 @@ void memory_reset (void)
 	/* map beta Kickstarts at 0x200000/0xC00000/0xF00000 */
 	if (kickmem_bank.baseaddr[0] == 0x11 && kickmem_bank.baseaddr[2] == 0x4e && kickmem_bank.baseaddr[3] == 0xf9 && kickmem_bank.baseaddr[4] == 0x00) {
 		uae_u32 addr = kickmem_bank.baseaddr[5];
-		if (addr == 0x20 && currprefs.chipmem_size <= 0x200000 && currprefs.fastmem[0].size == 0)
+		if (addr == 0x20 && currprefs.chipmem.size <= 0x200000 && currprefs.fastmem[0].size == 0)
 			map_banks_set(&kickmem_bank, addr, 8, 0);
-		if (addr == 0xC0 && currprefs.bogomem_size == 0)
+		if (addr == 0xC0 && currprefs.bogomem.size == 0)
 			map_banks_set(&kickmem_bank, addr, 8, 0);
 		if (addr == 0xF0)
 			map_banks_set(&kickmem_bank, addr, 8, 0);
@@ -3373,25 +3382,25 @@ void restore_bootrom (int len, size_t filepos)
 void restore_cram (int len, size_t filepos)
 {
 	chip_filepos = filepos;
-	changed_prefs.chipmem_size = len;
+	changed_prefs.chipmem.size = len;
 }
 
 void restore_bram (int len, size_t filepos)
 {
 	bogo_filepos = filepos;
-	changed_prefs.bogomem_size = len;
+	changed_prefs.bogomem.size = len;
 }
 
 void restore_a3000lram (int len, size_t filepos)
 {
 	a3000lmem_filepos = filepos;
-	changed_prefs.mbresmem_low_size = len;
+	changed_prefs.mbresmem_low.size = len;
 }
 
 void restore_a3000hram (int len, size_t filepos)
 {
 	a3000hmem_filepos = filepos;
-	changed_prefs.mbresmem_high_size = len;
+	changed_prefs.mbresmem_high.size = len;
 }
 
 uae_u8 *restore_rom (uae_u8 *src)
diff --git a/moduleripper.cpp b/moduleripper.cpp
index b1c26cc6..cdf926ba 100644
--- a/moduleripper.cpp
+++ b/moduleripper.cpp
@@ -41,29 +41,29 @@ void moduleripper (void)
 	int size;
 	uae_u8 *buf, *p;
 
-	size = currprefs.chipmem_size;
+	size = currprefs.chipmem.size;
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		size += currprefs.fastmem[i].size;
 		size += currprefs.z3fastmem[i].size;
 	}
-	size += currprefs.bogomem_size;
-	size += currprefs.mbresmem_low_size;
-	size += currprefs.mbresmem_high_size;
+	size += currprefs.bogomem.size;
+	size += currprefs.mbresmem_low.size;
+	size += currprefs.mbresmem_high.size;
 	buf = p = xmalloc (uae_u8, size);
 	if (!buf)
 		return;
-	memcpy (p, chipmem_bank.baseaddr, currprefs.chipmem_size);
-	p += currprefs.chipmem_size;
+	memcpy (p, chipmem_bank.baseaddr, currprefs.chipmem.size);
+	p += currprefs.chipmem.size;
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		mc (p, fastmem_bank[i].start, currprefs.fastmem[i].size);
 		p += currprefs.fastmem[i].size;
 	}
-	mc (p, bogomem_bank.start, currprefs.bogomem_size);
-	p += currprefs.bogomem_size;
-	mc (p, a3000lmem_bank.start, currprefs.mbresmem_low_size);
-	p += currprefs.mbresmem_low_size;
-	mc (p, a3000hmem_bank.start, currprefs.mbresmem_high_size);
-	p += currprefs.mbresmem_high_size;
+	mc (p, bogomem_bank.start, currprefs.bogomem.size);
+	p += currprefs.bogomem.size;
+	mc (p, a3000lmem_bank.start, currprefs.mbresmem_low.size);
+	p += currprefs.mbresmem_low.size;
+	mc (p, a3000hmem_bank.start, currprefs.mbresmem_high.size);
+	p += currprefs.mbresmem_high.size;
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
 		mc (p, z3fastmem_bank[i].start, currprefs.z3fastmem[i].size);
 		p += currprefs.z3fastmem[i].size;
diff --git a/newcpu.cpp b/newcpu.cpp
index 1f66768e..20bc6ecf 100644
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -3865,7 +3865,7 @@ static bool mmu_op30fake_pmove (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecpt
 		write_log (_T(" PC=%08X\n"), pc);
 	}
 #endif
-	if ((currprefs.cs_mbdmac & 1) && currprefs.mbresmem_low_size > 0) {
+	if ((currprefs.cs_mbdmac & 1) && currprefs.mbresmem_low.size > 0) {
 		if (otc != fake_tc_030) {
 			a3000_fakekick (fake_tc_030 & 0x80000000);
 		}
diff --git a/od-win32/mman.cpp b/od-win32/mman.cpp
index 0167c07f..c4c3645c 100644
--- a/od-win32/mman.cpp
+++ b/od-win32/mman.cpp
@@ -353,7 +353,7 @@ static int doinit_shm (void)
 
 	if (p->cpu_model >= 68020)
 		totalsize = 0x10000000;
-	totalsize += (p->z3chipmem_size + align) & ~align;
+	totalsize += (p->z3chipmem.size + align) & ~align;
 	totalsize_z3 = totalsize;
 
 	start_rtg = 0;
@@ -367,7 +367,7 @@ static int doinit_shm (void)
 	}
 #endif
 	// 1G Z3chip?
-	if ((Z3BASE_UAE + p->z3chipmem_size > Z3BASE_REAL) ||
+	if ((Z3BASE_UAE + p->z3chipmem.size > Z3BASE_REAL) ||
 		// real wrapped around
 		(expamem_z3_highram_real == 0xffffffff) ||
 		// Real highram > 0x80000000 && UAE highram <= 0x80000000 && Automatic
@@ -596,7 +596,7 @@ bool init_shm (void)
 		if (ortgmem_type[i] != changed_prefs.rtgboards[i].rtgmem_type)
 			changed = true;
 	}
-	if (!changed && oz3chipmem_size == changed_prefs.z3chipmem_size)
+	if (!changed && oz3chipmem_size == changed_prefs.z3chipmem.size)
 		return true;
 
 	for (int i = 0; i < MAX_RAM_BOARDS;i++) {
@@ -607,7 +607,7 @@ bool init_shm (void)
 		ortgmem_size[i] = changed_prefs.rtgboards[i].rtgmem_size;
 		ortgmem_type[i] = changed_prefs.rtgboards[i].rtgmem_type;
 	}
-	oz3chipmem_size = changed_prefs.z3chipmem_size;
+	oz3chipmem_size = changed_prefs.z3chipmem.size;
 
 	if (doinit_shm () < 0)
 		return false;
@@ -735,9 +735,9 @@ bool uae_mman_info(addrbank *ab, struct uae_mman_data *md)
 	} else if (!_tcscmp(ab->label, _T("chip"))) {
 		start = 0;
 		got = true;
-		if (!expansion_get_autoconfig_by_address(&currprefs, 0x00200000, 0) && currprefs.chipmem_size == 2 * 1024 * 1024)
+		if (!expansion_get_autoconfig_by_address(&currprefs, 0x00200000, 0) && currprefs.chipmem.size == 2 * 1024 * 1024)
 			barrier = true;
-		if (currprefs.chipmem_size != 2 * 1024 * 1024)
+		if (currprefs.chipmem.size != 2 * 1024 * 1024)
 			barrier = true;
 	} else if (!_tcscmp(ab->label, _T("kick"))) {
 		start = 0xf80000;
@@ -810,7 +810,7 @@ bool uae_mman_info(addrbank *ab, struct uae_mman_data *md)
 	} else if (!_tcscmp(ab->label, _T("bogo"))) {
 		start = 0x00C00000;
 		got = true;
-		if (currprefs.bogomem_size <= 0x100000)
+		if (currprefs.bogomem.size <= 0x100000)
 			barrier = true;
 	} else if (!_tcscmp(ab->label, _T("custmem1"))) {
 		start = currprefs.custom_memory_addrs[0];
diff --git a/od-win32/win32gui.cpp b/od-win32/win32gui.cpp
index 28ff798d..58515aaa 100644
--- a/od-win32/win32gui.cpp
+++ b/od-win32/win32gui.cpp
@@ -9093,7 +9093,7 @@ static void values_to_chipsetdlg2 (HWND hDlg)
 	CheckDlgButton(hDlg, IDC_CS_Z3AUTOCONFIG, workprefs.cs_z3autoconfig);
 	CheckDlgButton(hDlg, IDC_CS_IDE1, workprefs.cs_ide > 0 && (workprefs.cs_ide & 1));
 	CheckDlgButton(hDlg, IDC_CS_IDE2, workprefs.cs_ide > 0 && (workprefs.cs_ide & 2));
-	CheckDlgButton(hDlg, IDC_CS_1MCHIPJUMPER, workprefs.cs_1mchipjumper || workprefs.chipmem_size >= 0x100000);
+	CheckDlgButton(hDlg, IDC_CS_1MCHIPJUMPER, workprefs.cs_1mchipjumper || workprefs.chipmem.size >= 0x100000);
 	CheckDlgButton(hDlg, IDC_CS_BYTECUSTOMWRITEBUG, workprefs.cs_bytecustomwritebug);
 	CheckDlgButton(hDlg, IDC_CS_COMPOSITECOLOR, workprefs.cs_color_burst);
 	CheckDlgButton(hDlg, IDC_CS_TOSHIBAGARY, workprefs.cs_toshibagary);
@@ -9121,7 +9121,7 @@ static void values_to_chipsetdlg2 (HWND hDlg)
 			rev |= 0x10;
 		rev |= (workprefs.chipset_mask & CSMASK_AGA) ? 0x23 : 0;
 		rev |= (currprefs.chipset_mask & CSMASK_ECS_AGNUS) ? 0x20 : 0;
-		if (workprefs.chipmem_size > 1024 * 1024 && (workprefs.chipset_mask & CSMASK_ECS_AGNUS))
+		if (workprefs.chipmem.size > 1024 * 1024 && (workprefs.chipset_mask & CSMASK_ECS_AGNUS))
 			rev |= 0x21;
 		_stprintf (txt, _T("%02X"), rev);
 	}
@@ -9275,7 +9275,7 @@ static void enable_for_chipsetdlg2 (HWND hDlg)
 	ew(hDlg, IDC_CS_RTC3, e);
 	ew(hDlg, IDC_CS_RTC4, e);
 	ew(hDlg, IDC_CS_RTCADJUST, e);
-	ew(hDlg, IDC_CS_1MCHIPJUMPER, e && workprefs.chipmem_size < 0x100000);
+	ew(hDlg, IDC_CS_1MCHIPJUMPER, e && workprefs.chipmem.size < 0x100000);
 	ew(hDlg, IDC_CS_BYTECUSTOMWRITEBUG, e);
 	ew(hDlg, IDC_CS_COMPOSITECOLOR, e);
 	ew(hDlg, IDC_CS_TOSHIBAGARY, e);
@@ -9417,12 +9417,12 @@ static void setfastram_selectmenu(HWND hDlg, int mode)
 		min = 0;
 		max = MAX_CB_MEM_128M;
 		msi = msi_cpuboard;
-		fastram_select_pointer = &workprefs.mbresmem_high_size;
+		fastram_select_pointer = &workprefs.mbresmem_high.size;
 	} else if (fastram_select == 2 * MAX_RAM_BOARDS + 1) {
 		min = 0;
 		max = MAX_CB_MEM_64M;
 		msi = msi_cpuboard;
-		fastram_select_pointer = &workprefs.mbresmem_low_size;
+		fastram_select_pointer = &workprefs.mbresmem_low.size;
 	} else {
 		return;
 	}
@@ -9604,12 +9604,12 @@ static void setfastram_selectmenu(HWND hDlg, int mode)
 			SendDlgItemMessage(hDlg, IDC_MEMORYSELECT, CB_ADDSTRING, 0, (LPARAM)tmp);
 		}
 		_tcscpy(tmp, _T("Processor Slot Fast RAM"));
-		if (workprefs.mbresmem_high_size)
-			_stprintf(tmp + _tcslen(tmp), _T(" [%dM]"), workprefs.mbresmem_high_size / (1024 * 1024));
+		if (workprefs.mbresmem_high.size)
+			_stprintf(tmp + _tcslen(tmp), _T(" [%dM]"), workprefs.mbresmem_high.size / (1024 * 1024));
 		SendDlgItemMessage(hDlg, IDC_MEMORYSELECT, CB_ADDSTRING, 0, (LPARAM)tmp);
 		_tcscpy(tmp, _T("Motherboard Fast RAM"));
-		if (workprefs.mbresmem_low_size)
-			_stprintf(tmp + _tcslen(tmp), _T(" [%dM]"), workprefs.mbresmem_low_size / (1024 * 1024));
+		if (workprefs.mbresmem_low.size)
+			_stprintf(tmp + _tcslen(tmp), _T(" [%dM]"), workprefs.mbresmem_low.size / (1024 * 1024));
 		SendDlgItemMessage(hDlg, IDC_MEMORYSELECT, CB_ADDSTRING, 0, (LPARAM)tmp);
 	} else {
 		if (fastram_select >= MAX_RAM_BOARDS)
@@ -9651,25 +9651,25 @@ static void setmax32bitram (HWND hDlg)
 
 static void setcpuboardmemsize(HWND hDlg)
 {
-	if (workprefs.cpuboardmem1_size > cpuboard_maxmemory(&workprefs))
-		workprefs.cpuboardmem1_size = cpuboard_maxmemory(&workprefs);
+	if (workprefs.cpuboardmem1.size > cpuboard_maxmemory(&workprefs))
+		workprefs.cpuboardmem1.size = cpuboard_maxmemory(&workprefs);
 
 	if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_Z2) {
-		workprefs.fastmem[0].size = workprefs.cpuboardmem1_size;
+		workprefs.fastmem[0].size = workprefs.cpuboardmem1.size;
 	}
 	if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_25BITMEM) {
-		workprefs.mem25bit_size = workprefs.cpuboardmem1_size;
+		workprefs.mem25bit.size = workprefs.cpuboardmem1.size;
 	}
 	if (workprefs.cpuboard_type == 0) {
-		workprefs.mem25bit_size = 0;
+		workprefs.mem25bit.size = 0;
 	}
 
 	if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_HIGHMEM)
-		workprefs.mbresmem_high_size = workprefs.cpuboardmem1_size;
+		workprefs.mbresmem_high.size = workprefs.cpuboardmem1.size;
 
 	int maxmem = cpuboard_maxmemory(&workprefs);
-	if (workprefs.cpuboardmem1_size > maxmem) {
-		workprefs.cpuboardmem1_size = maxmem;
+	if (workprefs.cpuboardmem1.size > maxmem) {
+		workprefs.cpuboardmem1.size = maxmem;
 	}
 	if (maxmem <= 8 * 1024 * 1024)
 		SendDlgItemMessage (hDlg, IDC_CPUBOARDMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CB_MEM, MAX_CB_MEM_Z2));
@@ -9685,7 +9685,7 @@ static void setcpuboardmemsize(HWND hDlg)
 		SendDlgItemMessage (hDlg, IDC_CPUBOARDMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CB_MEM, MAX_CB_MEM_256M));
 
 	int mem_size = 0;
-	switch (workprefs.cpuboardmem1_size) {
+	switch (workprefs.cpuboardmem1.size) {
 	case 0x00000000: mem_size = 0; break;
 	case 0x00100000: mem_size = 1; break;
 	case 0x00200000: mem_size = 2; break;
@@ -9726,7 +9726,7 @@ static void values_to_memorydlg (HWND hDlg)
 	uae_u32 mem_size = 0;
 	uae_u32 v;
 
-	switch (workprefs.chipmem_size) {
+	switch (workprefs.chipmem.size) {
 	case 0x00040000: mem_size = 0; break;
 	case 0x00080000: mem_size = 1; break;
 	case 0x00100000: mem_size = 2; break;
@@ -9756,7 +9756,7 @@ static void values_to_memorydlg (HWND hDlg)
 	SetDlgItemText (hDlg, IDC_FASTRAM, memsize_names[msi_fast[mem_size]]);
 
 	mem_size = 0;
-	switch (workprefs.bogomem_size) {
+	switch (workprefs.bogomem.size) {
 	case 0x00000000: mem_size = 0; break;
 	case 0x00080000: mem_size = 1; break;
 	case 0x00100000: mem_size = 2; break;
@@ -9796,7 +9796,7 @@ static void values_to_memorydlg (HWND hDlg)
 	SetDlgItemText (hDlg, IDC_Z3FASTRAM, memsize_names[msi_z3fast[mem_size]]);
 
 	mem_size = 0;
-	v = workprefs.z3chipmem_size;
+	v = workprefs.z3chipmem.size;
 	if (v < 0x01000000)
 		mem_size = 0;
 	else if (v < 0x02000000)
@@ -9856,7 +9856,7 @@ static void values_to_memorydlg (HWND hDlg)
 
 static void fix_values_memorydlg (void)
 {
-	if (workprefs.chipmem_size <= 0x200000)
+	if (workprefs.chipmem.size <= 0x200000)
 		return;
 	int total = 0;
 	for (int i = 0; i < MAX_RAM_BOARDS; i++) {
@@ -10902,7 +10902,7 @@ static INT_PTR CALLBACK Expansion2DlgProc(HWND hDlg, UINT msg, WPARAM wParam, LP
 		if (recursive > 0)
 			break;
 		recursive++;
-		workprefs.cpuboardmem1_size = memsizes[msi_cpuboard[SendMessage(GetDlgItem(hDlg, IDC_CPUBOARDMEM), TBM_GETPOS, 0, 0)]];
+		workprefs.cpuboardmem1.size = memsizes[msi_cpuboard[SendMessage(GetDlgItem(hDlg, IDC_CPUBOARDMEM), TBM_GETPOS, 0, 0)]];
 		setcpuboardmemsize(hDlg);
 		recursive--;
 		break;
@@ -11664,14 +11664,14 @@ static INT_PTR CALLBACK MemoryDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARA
 		bool change1 = false;
 		uae_u32 v;
 		v = memsizes[msi_chip[SendMessage (GetDlgItem (hDlg, IDC_CHIPMEM), TBM_GETPOS, 0, 0)]];
-		if (v != workprefs.chipmem_size) {
+		if (v != workprefs.chipmem.size) {
 			change1 = true;
-			workprefs.chipmem_size = v;
+			workprefs.chipmem.size = v;
 		}
 		v = memsizes[msi_bogo[SendMessage (GetDlgItem (hDlg, IDC_SLOWMEM), TBM_GETPOS, 0, 0)]];
-		if (v != workprefs.bogomem_size) {
+		if (v != workprefs.bogomem.size) {
 			change1 = true;
-			workprefs.bogomem_size = v;
+			workprefs.bogomem.size = v;
 		}
 		v = memsizes[msi_fast[SendMessage (GetDlgItem (hDlg, IDC_FASTMEM), TBM_GETPOS, 0, 0)]];
 		if (v != workprefs.fastmem[0].size) {
@@ -11688,9 +11688,9 @@ static INT_PTR CALLBACK MemoryDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARA
 			setfastram_selectmenu(hDlg, 0);
 		}
 		v = memsizes[msi_z3chip[SendMessage (GetDlgItem (hDlg, IDC_Z3CHIPMEM), TBM_GETPOS, 0, 0)]];
-		if (v != workprefs.z3chipmem_size) {
+		if (v != workprefs.z3chipmem.size) {
 			change1 = true;
-			workprefs.z3chipmem_size = v;
+			workprefs.z3chipmem.size = v;
 		}
 		if (!change1 && fastram_select_pointer) {
 			v = memsizes[fastram_select_msi[SendMessage(GetDlgItem(hDlg, IDC_MEMORYMEM), TBM_GETPOS, 0, 0)]];
diff --git a/savestate.cpp b/savestate.cpp
index 34c2d082..2ed1d8b9 100644
--- a/savestate.cpp
+++ b/savestate.cpp
@@ -1419,10 +1419,10 @@ void savestate_rewind (void)
 		p = restore_p96 (p);
 #endif
 	len = restore_u32_func (&p);
-	memcpy (chipmem_bank.baseaddr, p, currprefs.chipmem_size > len ? len : currprefs.chipmem_size);
+	memcpy (chipmem_bank.baseaddr, p, currprefs.chipmem.size > len ? len : currprefs.chipmem.size);
 	p += len;
 	len = restore_u32_func (&p);
-	memcpy (save_bram (&dummy), p, currprefs.bogomem_size > len ? len : currprefs.bogomem_size);
+	memcpy (save_bram (&dummy), p, currprefs.bogomem.size > len ? len : currprefs.bogomem.size);
 	p += len;
 #ifdef AUTOCONFIG
 	len = restore_u32_func (&p);
diff --git a/uaelib.cpp b/uaelib.cpp
index 43aac13a..945a7f70 100644
--- a/uaelib.cpp
+++ b/uaelib.cpp
@@ -139,7 +139,7 @@ static uae_u32 REGPARAM2 emulib_ChgCMemSize(TrapContext *ctx, uae_u32 memsize)
 	}
 	trap_set_dreg(ctx, 0,  0);
 
-	changed_prefs.chipmem_size = memsize;
+	changed_prefs.chipmem.size = memsize;
 	uae_reset(1, 1);
 	return 1;
 }
@@ -157,7 +157,7 @@ static uae_u32 REGPARAM2 emulib_ChgSMemSize(TrapContext *ctx, uae_u32 memsize)
 	}
 
 	trap_set_dreg(ctx, 0, 0);
-	changed_prefs.bogomem_size = memsize;
+	changed_prefs.bogomem.size = memsize;
 	uae_reset (1, 1);
 	return 1;
 }