From: Frode Solheim <frode@fs-uae.net>
Date: Sun, 6 Sep 2015 20:43:00 +0000 (+0200)
Subject: JIT: moved midfunc declarations to compemu_midfunc_x86.h
X-Git-Tag: 3200~79^2~5
X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=06fae1769f198468f80daebd94a2bfe51944c994;p=francis%2Fwinuae.git

JIT: moved midfunc declarations to compemu_midfunc_x86.h
---

diff --git a/jit/compemu.h b/jit/compemu.h
index dca34dcf..822d2950 100644
--- a/jit/compemu.h
+++ b/jit/compemu.h
@@ -284,220 +284,6 @@ extern int touchcnt;
 
 #undef DECLARE_MIDFUNC
 
-/* What we expose to the outside */
-DECLARE(bt_l_ri(RR4 r, IMM i));
-DECLARE(bt_l_rr(RR4 r, RR4 b));
-DECLARE(btc_l_ri(RW4 r, IMM i));
-DECLARE(btc_l_rr(RW4 r, RR4 b));
-DECLARE(bts_l_ri(RW4 r, IMM i));
-DECLARE(bts_l_rr(RW4 r, RR4 b));
-DECLARE(btr_l_ri(RW4 r, IMM i));
-DECLARE(btr_l_rr(RW4 r, RR4 b));
-DECLARE(mov_l_rm(W4 d, IMM s));
-DECLARE(call_r(RR4 r));
-DECLARE(sub_l_mi(IMM d, IMM s));
-DECLARE(mov_l_mi(IMM d, IMM s));
-DECLARE(mov_w_mi(IMM d, IMM s));
-DECLARE(mov_b_mi(IMM d, IMM s));
-DECLARE(rol_b_ri(RW1 r, IMM i));
-DECLARE(rol_w_ri(RW2 r, IMM i));
-DECLARE(rol_l_ri(RW4 r, IMM i));
-DECLARE(rol_l_rr(RW4 d, RR1 r));
-DECLARE(rol_w_rr(RW2 d, RR1 r));
-DECLARE(rol_b_rr(RW1 d, RR1 r));
-DECLARE(shll_l_rr(RW4 d, RR1 r));
-DECLARE(shll_w_rr(RW2 d, RR1 r));
-DECLARE(shll_b_rr(RW1 d, RR1 r));
-DECLARE(ror_b_ri(RR1 r, IMM i));
-DECLARE(ror_w_ri(RR2 r, IMM i));
-DECLARE(ror_l_ri(RR4 r, IMM i));
-DECLARE(ror_l_rr(RR4 d, RR1 r));
-DECLARE(ror_w_rr(RR2 d, RR1 r));
-DECLARE(ror_b_rr(RR1 d, RR1 r));
-DECLARE(shrl_l_rr(RW4 d, RR1 r));
-DECLARE(shrl_w_rr(RW2 d, RR1 r));
-DECLARE(shrl_b_rr(RW1 d, RR1 r));
-DECLARE(shra_l_rr(RW4 d, RR1 r));
-DECLARE(shra_w_rr(RW2 d, RR1 r));
-DECLARE(shra_b_rr(RW1 d, RR1 r));
-DECLARE(shll_l_ri(RW4 r, IMM i));
-DECLARE(shll_w_ri(RW2 r, IMM i));
-DECLARE(shll_b_ri(RW1 r, IMM i));
-DECLARE(shrl_l_ri(RW4 r, IMM i));
-DECLARE(shrl_w_ri(RW2 r, IMM i));
-DECLARE(shrl_b_ri(RW1 r, IMM i));
-DECLARE(shra_l_ri(RW4 r, IMM i));
-DECLARE(shra_w_ri(RW2 r, IMM i));
-DECLARE(shra_b_ri(RW1 r, IMM i));
-DECLARE(setcc(W1 d, IMM cc));
-DECLARE(setcc_m(IMM d, IMM cc));
-DECLARE(cmov_b_rr(RW1 d, RR1 s, IMM cc));
-DECLARE(cmov_w_rr(RW2 d, RR2 s, IMM cc));
-DECLARE(cmov_l_rr(RW4 d, RR4 s, IMM cc));
-DECLARE(setzflg_l(RW4 r));
-DECLARE(cmov_l_rm(RW4 d, IMM s, IMM cc));
-DECLARE(bsf_l_rr(W4 d, RR4 s));
-DECLARE(pop_m(IMM d));
-DECLARE(push_m(IMM d));
-DECLARE(pop_l(W4 d));
-DECLARE(push_l_i(IMM i));
-DECLARE(push_l(RR4 s));
-DECLARE(clear_16(RW4 r));
-DECLARE(clear_8(RW4 r));
-DECLARE(sign_extend_16_rr(W4 d, RR2 s));
-DECLARE(sign_extend_8_rr(W4 d, RR1 s));
-DECLARE(zero_extend_16_rr(W4 d, RR2 s));
-DECLARE(zero_extend_8_rr(W4 d, RR1 s));
-DECLARE(imul_64_32(RW4 d, RW4 s));
-DECLARE(mul_64_32(RW4 d, RW4 s));
-DECLARE(imul_32_32(RW4 d, RR4 s));
-DECLARE(mov_b_rr(W1 d, RR1 s));
-DECLARE(mov_w_rr(W2 d, RR2 s));
-DECLARE(mov_l_rrm_indexed(W4 d, RR4 baser, RR4 index));
-DECLARE(mov_w_rrm_indexed(W2 d, RR4 baser, RR4 index));
-DECLARE(mov_b_rrm_indexed(W1 d, RR4 baser, RR4 index));
-DECLARE(mov_l_mrr_indexed(RR4 baser, RR4 index, RR4 s));
-DECLARE(mov_w_mrr_indexed(RR4 baser, RR4 index, RR2 s));
-DECLARE(mov_b_mrr_indexed(RR4 baser, RR4 index, RR1 s));
-DECLARE(mov_l_rm_indexed(W4 d, IMM base, RR4 index));
-DECLARE(mov_l_rR(W4 d, RR4 s, IMM offset));
-DECLARE(mov_w_rR(W2 d, RR4 s, IMM offset));
-DECLARE(mov_b_rR(W1 d, RR4 s, IMM offset));
-DECLARE(mov_l_brR(W4 d, RR4 s, IMM offset));
-DECLARE(mov_w_brR(W2 d, RR4 s, IMM offset));
-DECLARE(mov_b_brR(W1 d, RR4 s, IMM offset));
-DECLARE(mov_l_Ri(RR4 d, IMM i, IMM offset));
-DECLARE(mov_w_Ri(RR4 d, IMM i, IMM offset));
-DECLARE(mov_b_Ri(RR4 d, IMM i, IMM offset));
-DECLARE(mov_l_Rr(RR4 d, RR4 s, IMM offset));
-DECLARE(mov_w_Rr(RR4 d, RR2 s, IMM offset));
-DECLARE(mov_b_Rr(RR4 d, RR1 s, IMM offset));
-DECLARE(lea_l_brr(W4 d, RR4 s, IMM offset));
-DECLARE(lea_l_brr_indexed(W4 d, RR4 s, RR4 index, IMM factor, IMM offset));
-DECLARE(mov_l_bRr(RR4 d, RR4 s, IMM offset));
-DECLARE(mov_w_bRr(RR4 d, RR2 s, IMM offset));
-DECLARE(mov_b_bRr(RR4 d, RR1 s, IMM offset));
-DECLARE(mid_bswap_32(RW4 r));
-DECLARE(mid_bswap_16(RW2 r));
-DECLARE(mov_l_rr(W4 d, RR4 s));
-DECLARE(mov_l_mr(IMM d, RR4 s));
-DECLARE(mov_w_mr(IMM d, RR2 s));
-DECLARE(mov_w_rm(W2 d, IMM s));
-DECLARE(mov_b_mr(IMM d, RR1 s));
-DECLARE(mov_b_rm(W1 d, IMM s));
-DECLARE(mov_l_ri(W4 d, IMM s));
-DECLARE(mov_w_ri(W2 d, IMM s));
-DECLARE(mov_b_ri(W1 d, IMM s));
-DECLARE(add_l_mi(IMM d, IMM s) );
-DECLARE(add_w_mi(IMM d, IMM s) );
-DECLARE(add_b_mi(IMM d, IMM s) );
-DECLARE(test_l_ri(RR4 d, IMM i));
-DECLARE(test_l_rr(RR4 d, RR4 s));
-DECLARE(test_w_rr(RR2 d, RR2 s));
-DECLARE(test_b_rr(RR1 d, RR1 s));
-DECLARE(and_l_ri(RW4 d, IMM i));
-DECLARE(and_l(RW4 d, RR4 s));
-DECLARE(and_w(RW2 d, RR2 s));
-DECLARE(and_b(RW1 d, RR1 s));
-DECLARE(or_l_ri(RW4 d, IMM i));
-DECLARE(or_l(RW4 d, RR4 s));
-DECLARE(or_w(RW2 d, RR2 s));
-DECLARE(or_b(RW1 d, RR1 s));
-DECLARE(adc_l(RW4 d, RR4 s));
-DECLARE(adc_w(RW2 d, RR2 s));
-DECLARE(adc_b(RW1 d, RR1 s));
-DECLARE(add_l(RW4 d, RR4 s));
-DECLARE(add_w(RW2 d, RR2 s));
-DECLARE(add_b(RW1 d, RR1 s));
-DECLARE(sub_l_ri(RW4 d, IMM i));
-DECLARE(sub_w_ri(RW2 d, IMM i));
-DECLARE(sub_b_ri(RW1 d, IMM i));
-DECLARE(add_l_ri(RW4 d, IMM i));
-DECLARE(add_w_ri(RW2 d, IMM i));
-DECLARE(add_b_ri(RW1 d, IMM i));
-DECLARE(sbb_l(RW4 d, RR4 s));
-DECLARE(sbb_w(RW2 d, RR2 s));
-DECLARE(sbb_b(RW1 d, RR1 s));
-DECLARE(sub_l(RW4 d, RR4 s));
-DECLARE(sub_w(RW2 d, RR2 s));
-DECLARE(sub_b(RW1 d, RR1 s));
-DECLARE(cmp_l(RR4 d, RR4 s));
-DECLARE(cmp_l_ri(RR4 r, IMM i));
-DECLARE(cmp_w(RR2 d, RR2 s));
-DECLARE(cmp_b(RR1 d, RR1 s));
-DECLARE(xor_l(RW4 d, RR4 s));
-DECLARE(xor_w(RW2 d, RR2 s));
-DECLARE(xor_b(RW1 d, RR1 s));
-DECLARE(live_flags(void));
-DECLARE(dont_care_flags(void));
-DECLARE(duplicate_carry(void));
-DECLARE(restore_carry(void));
-DECLARE(start_needflags(void));
-DECLARE(end_needflags(void));
-DECLARE(make_flags_live(void));
-DECLARE(call_r_11(RR4 r, W4 out1, RR4 in1, IMM osize, IMM isize));
-DECLARE(call_r_02(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2));
-DECLARE(readmem_new(RR4 address, W4 dest, IMM offset, IMM size, W4 tmp));
-DECLARE(writemem_new(RR4 address, RR4 source, IMM offset, IMM size, W4 tmp));
-DECLARE(forget_about(W4 r));
-DECLARE(nop(void));
-
-DECLARE(f_forget_about(FW r));
-DECLARE(fmov_pi(FW r));
-DECLARE(fmov_log10_2(FW r));
-DECLARE(fmov_log2_e(FW r));
-DECLARE(fmov_loge_2(FW r));
-DECLARE(fmov_1(FW r));
-DECLARE(fmov_0(FW r));
-DECLARE(fmov_rm(FW r, MEMR m));
-DECLARE(fmov_mr(MEMW m, FR r));
-DECLARE(fmovi_rm(FW r, MEMR m));
-DECLARE(fmovi_mrb(MEMW m, FR r, double *bounds));
-DECLARE(fmovs_rm(FW r, MEMR m));
-DECLARE(fmovs_mr(MEMW m, FR r));
-DECLARE(fcuts_r(FRW r));
-DECLARE(fcut_r(FRW r));
-DECLARE(fmov_ext_mr(MEMW m, FR r));
-DECLARE(fmov_ext_rm(FW r, MEMR m));
-DECLARE(fmov_rr(FW d, FR s));
-DECLARE(fldcw_m_indexed(RR4 index, IMM base));
-DECLARE(ftst_r(FR r));
-DECLARE(dont_care_fflags(void));
-DECLARE(fsqrt_rr(FW d, FR s));
-DECLARE(fabs_rr(FW d, FR s));
-DECLARE(frndint_rr(FW d, FR s));
-DECLARE(fgetexp_rr(FW d, FR s));
-DECLARE(fgetman_rr(FW d, FR s));
-DECLARE(fsin_rr(FW d, FR s));
-DECLARE(fcos_rr(FW d, FR s));
-DECLARE(ftan_rr(FW d, FR s));
-DECLARE(fsincos_rr(FW d, FW c, FR s));
-DECLARE(fscale_rr(FRW d, FR s));
-DECLARE(ftwotox_rr(FW d, FR s));
-DECLARE(fetox_rr(FW d, FR s));
-DECLARE(fetoxM1_rr(FW d, FR s));
-DECLARE(ftentox_rr(FW d, FR s));
-DECLARE(flog2_rr(FW d, FR s));
-DECLARE(flogN_rr(FW d, FR s));
-DECLARE(flogNP1_rr(FW d, FR s));
-DECLARE(flog10_rr(FW d, FR s));
-DECLARE(fasin_rr(FW d, FR s));
-DECLARE(facos_rr(FW d, FR s));
-DECLARE(fatan_rr(FW d, FR s));
-DECLARE(fatanh_rr(FW d, FR s));
-DECLARE(fsinh_rr(FW d, FR s));
-DECLARE(fcosh_rr(FW d, FR s));
-DECLARE(ftanh_rr(FW d, FR s));
-DECLARE(fneg_rr(FW d, FR s));
-DECLARE(fadd_rr(FRW d, FR s));
-DECLARE(fsub_rr(FRW d, FR s));
-DECLARE(fmul_rr(FRW d, FR s));
-DECLARE(frem_rr(FRW d, FR s));
-DECLARE(frem1_rr(FRW d, FR s));
-DECLARE(fdiv_rr(FRW d, FR s));
-DECLARE(fcmp_rr(FR d, FR s));
-DECLARE(fflags_into_flags(W2 tmp));
-
 extern int failure;
 #define FAIL(x) do { failure|=x; } while (0)
 
diff --git a/jit/compemu_midfunc_x86.h b/jit/compemu_midfunc_x86.h
index ba80727f..549c3b73 100644
--- a/jit/compemu_midfunc_x86.h
+++ b/jit/compemu_midfunc_x86.h
@@ -31,5 +31,218 @@
  *
  */
 
+/* What we expose to the outside */
+DECLARE_MIDFUNC(bt_l_ri(RR4 r, IMM i));
+DECLARE_MIDFUNC(bt_l_rr(RR4 r, RR4 b));
+DECLARE_MIDFUNC(btc_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(btc_l_rr(RW4 r, RR4 b));
+DECLARE_MIDFUNC(bts_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(bts_l_rr(RW4 r, RR4 b));
+DECLARE_MIDFUNC(btr_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(btr_l_rr(RW4 r, RR4 b));
+DECLARE_MIDFUNC(mov_l_rm(W4 d, IMM s));
+DECLARE_MIDFUNC(call_r(RR4 r));
+DECLARE_MIDFUNC(sub_l_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(mov_l_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(mov_w_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(mov_b_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(rol_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(rol_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(rol_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(rol_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(rol_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(rol_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(shll_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(shll_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(shll_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(ror_b_ri(RR1 r, IMM i));
+DECLARE_MIDFUNC(ror_w_ri(RR2 r, IMM i));
+DECLARE_MIDFUNC(ror_l_ri(RR4 r, IMM i));
+DECLARE_MIDFUNC(ror_l_rr(RR4 d, RR1 r));
+DECLARE_MIDFUNC(ror_w_rr(RR2 d, RR1 r));
+DECLARE_MIDFUNC(ror_b_rr(RR1 d, RR1 r));
+DECLARE_MIDFUNC(shrl_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(shrl_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(shrl_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(shra_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(shra_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(shra_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(shll_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(shll_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(shll_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(shrl_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(shrl_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(shrl_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(shra_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(shra_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(shra_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(setcc(W1 d, IMM cc));
+DECLARE_MIDFUNC(setcc_m(IMM d, IMM cc));
+DECLARE_MIDFUNC(cmov_b_rr(RW1 d, RR1 s, IMM cc));
+DECLARE_MIDFUNC(cmov_w_rr(RW2 d, RR2 s, IMM cc));
+DECLARE_MIDFUNC(cmov_l_rr(RW4 d, RR4 s, IMM cc));
+DECLARE_MIDFUNC(setzflg_l(RW4 r));
+DECLARE_MIDFUNC(cmov_l_rm(RW4 d, IMM s, IMM cc));
+DECLARE_MIDFUNC(bsf_l_rr(W4 d, RR4 s));
+DECLARE_MIDFUNC(pop_m(IMM d));
+DECLARE_MIDFUNC(push_m(IMM d));
+DECLARE_MIDFUNC(pop_l(W4 d));
+DECLARE_MIDFUNC(push_l_i(IMM i));
+DECLARE_MIDFUNC(push_l(RR4 s));
+DECLARE_MIDFUNC(clear_16(RW4 r));
+DECLARE_MIDFUNC(clear_8(RW4 r));
+DECLARE_MIDFUNC(sign_extend_16_rr(W4 d, RR2 s));
+DECLARE_MIDFUNC(sign_extend_8_rr(W4 d, RR1 s));
+DECLARE_MIDFUNC(zero_extend_16_rr(W4 d, RR2 s));
+DECLARE_MIDFUNC(zero_extend_8_rr(W4 d, RR1 s));
+DECLARE_MIDFUNC(imul_64_32(RW4 d, RW4 s));
+DECLARE_MIDFUNC(mul_64_32(RW4 d, RW4 s));
+DECLARE_MIDFUNC(imul_32_32(RW4 d, RR4 s));
 DECLARE_MIDFUNC(mul_32_32(RW4 d, RR4 s));
+DECLARE_MIDFUNC(mov_b_rr(W1 d, RR1 s));
+DECLARE_MIDFUNC(mov_w_rr(W2 d, RR2 s));
+DECLARE_MIDFUNC(mov_l_rrm_indexed(W4 d, RR4 baser, RR4 index));
+DECLARE_MIDFUNC(mov_w_rrm_indexed(W2 d, RR4 baser, RR4 index));
+DECLARE_MIDFUNC(mov_b_rrm_indexed(W1 d, RR4 baser, RR4 index));
+DECLARE_MIDFUNC(mov_l_mrr_indexed(RR4 baser, RR4 index, RR4 s));
+DECLARE_MIDFUNC(mov_w_mrr_indexed(RR4 baser, RR4 index, RR2 s));
+DECLARE_MIDFUNC(mov_b_mrr_indexed(RR4 baser, RR4 index, RR1 s));
+DECLARE_MIDFUNC(mov_l_rm_indexed(W4 d, IMM base, RR4 index));
+DECLARE_MIDFUNC(mov_l_rR(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_rR(W2 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_rR(W1 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_l_brR(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_brR(W2 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_brR(W1 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_l_Ri(RR4 d, IMM i, IMM offset));
+DECLARE_MIDFUNC(mov_w_Ri(RR4 d, IMM i, IMM offset));
+DECLARE_MIDFUNC(mov_b_Ri(RR4 d, IMM i, IMM offset));
+DECLARE_MIDFUNC(mov_l_Rr(RR4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_Rr(RR4 d, RR2 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_Rr(RR4 d, RR1 s, IMM offset));
+DECLARE_MIDFUNC(lea_l_brr(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(lea_l_brr_indexed(W4 d, RR4 s, RR4 index, IMM factor, IMM offset));
+DECLARE_MIDFUNC(mov_l_bRr(RR4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_bRr(RR4 d, RR2 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_bRr(RR4 d, RR1 s, IMM offset));
+DECLARE_MIDFUNC(mid_bswap_32(RW4 r));
+DECLARE_MIDFUNC(mid_bswap_16(RW2 r));
+DECLARE_MIDFUNC(mov_l_rr(W4 d, RR4 s));
+DECLARE_MIDFUNC(mov_l_mr(IMM d, RR4 s));
+DECLARE_MIDFUNC(mov_w_mr(IMM d, RR2 s));
+DECLARE_MIDFUNC(mov_w_rm(W2 d, IMM s));
+DECLARE_MIDFUNC(mov_b_mr(IMM d, RR1 s));
+DECLARE_MIDFUNC(mov_b_rm(W1 d, IMM s));
+DECLARE_MIDFUNC(mov_l_ri(W4 d, IMM s));
+DECLARE_MIDFUNC(mov_w_ri(W2 d, IMM s));
+DECLARE_MIDFUNC(mov_b_ri(W1 d, IMM s));
+DECLARE_MIDFUNC(add_l_mi(IMM d, IMM s) );
+DECLARE_MIDFUNC(add_w_mi(IMM d, IMM s) );
+DECLARE_MIDFUNC(add_b_mi(IMM d, IMM s) );
+DECLARE_MIDFUNC(test_l_ri(RR4 d, IMM i));
+DECLARE_MIDFUNC(test_l_rr(RR4 d, RR4 s));
+DECLARE_MIDFUNC(test_w_rr(RR2 d, RR2 s));
+DECLARE_MIDFUNC(test_b_rr(RR1 d, RR1 s));
+DECLARE_MIDFUNC(and_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(and_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(and_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(and_b(RW1 d, RR1 s));
 DECLARE_MIDFUNC(or_l_rm(RW4 d, IMM s));
+DECLARE_MIDFUNC(or_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(or_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(or_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(or_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(adc_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(adc_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(adc_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(add_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(add_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(add_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(sub_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(sub_w_ri(RW2 d, IMM i));
+DECLARE_MIDFUNC(sub_b_ri(RW1 d, IMM i));
+DECLARE_MIDFUNC(add_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(add_w_ri(RW2 d, IMM i));
+DECLARE_MIDFUNC(add_b_ri(RW1 d, IMM i));
+DECLARE_MIDFUNC(sbb_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(sbb_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(sbb_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(sub_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(sub_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(sub_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(cmp_l(RR4 d, RR4 s));
+DECLARE_MIDFUNC(cmp_l_ri(RR4 r, IMM i));
+DECLARE_MIDFUNC(cmp_w(RR2 d, RR2 s));
+DECLARE_MIDFUNC(cmp_b(RR1 d, RR1 s));
+DECLARE_MIDFUNC(xor_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(xor_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(xor_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(live_flags(void));
+DECLARE_MIDFUNC(dont_care_flags(void));
+DECLARE_MIDFUNC(duplicate_carry(void));
+DECLARE_MIDFUNC(restore_carry(void));
+DECLARE_MIDFUNC(start_needflags(void));
+DECLARE_MIDFUNC(end_needflags(void));
+DECLARE_MIDFUNC(make_flags_live(void));
+DECLARE_MIDFUNC(call_r_11(RR4 r, W4 out1, RR4 in1, IMM osize, IMM isize));
+DECLARE_MIDFUNC(call_r_02(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2));
+DECLARE_MIDFUNC(readmem_new(RR4 address, W4 dest, IMM offset, IMM size, W4 tmp));
+DECLARE_MIDFUNC(writemem_new(RR4 address, RR4 source, IMM offset, IMM size, W4 tmp));
+DECLARE_MIDFUNC(forget_about(W4 r));
+DECLARE_MIDFUNC(nop(void));
+
+DECLARE_MIDFUNC(f_forget_about(FW r));
+DECLARE_MIDFUNC(fmov_pi(FW r));
+DECLARE_MIDFUNC(fmov_log10_2(FW r));
+DECLARE_MIDFUNC(fmov_log2_e(FW r));
+DECLARE_MIDFUNC(fmov_loge_2(FW r));
+DECLARE_MIDFUNC(fmov_1(FW r));
+DECLARE_MIDFUNC(fmov_0(FW r));
+DECLARE_MIDFUNC(fmov_rm(FW r, MEMR m));
+DECLARE_MIDFUNC(fmov_mr(MEMW m, FR r));
+DECLARE_MIDFUNC(fmovi_rm(FW r, MEMR m));
+DECLARE_MIDFUNC(fmovi_mrb(MEMW m, FR r, double *bounds));
+DECLARE_MIDFUNC(fmovs_rm(FW r, MEMR m));
+DECLARE_MIDFUNC(fmovs_mr(MEMW m, FR r));
+DECLARE_MIDFUNC(fcuts_r(FRW r));
+DECLARE_MIDFUNC(fcut_r(FRW r));
+DECLARE_MIDFUNC(fmov_ext_mr(MEMW m, FR r));
+DECLARE_MIDFUNC(fmov_ext_rm(FW r, MEMR m));
+DECLARE_MIDFUNC(fmov_rr(FW d, FR s));
+DECLARE_MIDFUNC(fldcw_m_indexed(RR4 index, IMM base));
+DECLARE_MIDFUNC(ftst_r(FR r));
+DECLARE_MIDFUNC(dont_care_fflags(void));
+DECLARE_MIDFUNC(fsqrt_rr(FW d, FR s));
+DECLARE_MIDFUNC(fabs_rr(FW d, FR s));
+DECLARE_MIDFUNC(frndint_rr(FW d, FR s));
+DECLARE_MIDFUNC(fgetexp_rr(FW d, FR s));
+DECLARE_MIDFUNC(fgetman_rr(FW d, FR s));
+DECLARE_MIDFUNC(fsin_rr(FW d, FR s));
+DECLARE_MIDFUNC(fcos_rr(FW d, FR s));
+DECLARE_MIDFUNC(ftan_rr(FW d, FR s));
+DECLARE_MIDFUNC(fsincos_rr(FW d, FW c, FR s));
+DECLARE_MIDFUNC(fscale_rr(FRW d, FR s));
+DECLARE_MIDFUNC(ftwotox_rr(FW d, FR s));
+DECLARE_MIDFUNC(fetox_rr(FW d, FR s));
+DECLARE_MIDFUNC(fetoxM1_rr(FW d, FR s));
+DECLARE_MIDFUNC(ftentox_rr(FW d, FR s));
+DECLARE_MIDFUNC(flog2_rr(FW d, FR s));
+DECLARE_MIDFUNC(flogN_rr(FW d, FR s));
+DECLARE_MIDFUNC(flogNP1_rr(FW d, FR s));
+DECLARE_MIDFUNC(flog10_rr(FW d, FR s));
+DECLARE_MIDFUNC(fasin_rr(FW d, FR s));
+DECLARE_MIDFUNC(facos_rr(FW d, FR s));
+DECLARE_MIDFUNC(fatan_rr(FW d, FR s));
+DECLARE_MIDFUNC(fatanh_rr(FW d, FR s));
+DECLARE_MIDFUNC(fsinh_rr(FW d, FR s));
+DECLARE_MIDFUNC(fcosh_rr(FW d, FR s));
+DECLARE_MIDFUNC(ftanh_rr(FW d, FR s));
+DECLARE_MIDFUNC(fneg_rr(FW d, FR s));
+DECLARE_MIDFUNC(fadd_rr(FRW d, FR s));
+DECLARE_MIDFUNC(fsub_rr(FRW d, FR s));
+DECLARE_MIDFUNC(fmul_rr(FRW d, FR s));
+DECLARE_MIDFUNC(frem_rr(FRW d, FR s));
+DECLARE_MIDFUNC(frem1_rr(FRW d, FR s));
+DECLARE_MIDFUNC(fdiv_rr(FRW d, FR s));
+DECLARE_MIDFUNC(fcmp_rr(FR d, FR s));
+DECLARE_MIDFUNC(fflags_into_flags(W2 tmp));