From: Toni Wilen Date: Wed, 12 Jul 2017 18:37:37 +0000 (+0300) Subject: More MMU updates. X-Git-Tag: 3600~163 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=087d43d7333e8559d0056e522d9625156ab754c4;p=francis%2Fwinuae.git More MMU updates. --- diff --git a/cpummu.cpp b/cpummu.cpp index 980cbb6a..547275af 100644 --- a/cpummu.cpp +++ b/cpummu.cpp @@ -53,9 +53,10 @@ int mmu060_state; uae_u16 mmu_opcode; bool mmu_restart; static bool locked_rmw_cycle; +bool rmw_cycle; static bool ismoves; bool mmu_ttr_enabled, mmu_ttr_enabled_ins, mmu_ttr_enabled_data; -int mmu_atc_ways; +int mmu_atc_ways[2]; int way_random; int mmu040_movem; @@ -351,7 +352,7 @@ static ALWAYS_INLINE int mmu_get_fc(bool super, bool data) return (super ? 4 : 0) | (data ? 1 : 2); } -void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, bool rmw, uae_u32 status, bool nonmmu) +void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size,uae_u32 status, bool nonmmu) { if (currprefs.mmu_model == 68040) { uae_u16 ssw = 0; @@ -414,7 +415,6 @@ void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, bool if (locked_rmw_cycle) { ssw |= MMU_SSW_LK; ssw &= ~MMU_SSW_RW; - locked_rmw_cycle = false; #if MMUDEBUGMISC > 0 write_log (_T("040 MMU_SSW_LK!\n")); #endif @@ -461,23 +461,24 @@ void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, bool fslw |= MMU_FSLW_IO | MMU_FSLW_MA; // extension word } } - if (rmw) { + if (rmw_cycle) { fslw |= MMU_FSLW_W | MMU_FSLW_R; } if (locked_rmw_cycle) { fslw |= MMU_FSLW_LK; - locked_rmw_cycle = false; write_log (_T("060 MMU_FSLW_LK!\n")); } fslw |= status; regs.mmu_fslw = fslw; #if MMUDEBUG > 0 - write_log(_T("BF: fc=%d w=%d s=%d log=%08x ssw=%08x rmw=%d PC=%08x INS=%04X\n"), fc, write, 1 << size, addr, fslw, rmw, m68k_getpc(), mmu_opcode); + write_log(_T("BF: fc=%d w=%d s=%d log=%08x ssw=%08x rmw=%d PC=%08x INS=%04X\n"), fc, write, 1 << size, addr, fslw, rmw_cycle, m68k_getpc(), mmu_opcode); #endif } + rmw_cycle = false; + locked_rmw_cycle = false; regs.mmu_fault_addr = addr; flush_shortcut_cache(); @@ -554,24 +555,35 @@ int mmu_match_ttr(uaecptr addr, bool super, bool data) return res; } -void mmu_bus_error_ttr_write_fault(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool rmw) +void mmu_bus_error_ttr_write_fault(uaecptr addr, bool super, bool data, uae_u32 val, int size) { uae_u32 status = 0; if (currprefs.mmu_model == 68060) { status |= MMU_FSLW_TTR; } - mmu_bus_error(addr, val, mmu_get_fc (super, data), true, size, false, status, false); + mmu_bus_error(addr, val, mmu_get_fc (super, data), true, size, status, false); } -int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool rmw) +int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size) { int res = TTR_NO_MATCH; if (mmu_ttr_enabled) { res = mmu_match_ttr(addr, super, data); } if (res == TTR_NO_WRITE || (res == TTR_NO_MATCH && !regs.mmu_enabled && (regs.tcr & MMU_TCR_DWO))) - mmu_bus_error_ttr_write_fault(addr, super, data, val, size, rmw); + mmu_bus_error_ttr_write_fault(addr, super, data, val, size); + return res; +} + +int mmu_match_ttr_maybe_write(uaecptr addr, bool super, bool data, int size, bool write) +{ + int res = TTR_NO_MATCH; + if (mmu_ttr_enabled) { + res = mmu_match_ttr(addr, super, data); + } + if (write && ((res == TTR_NO_WRITE) || (res == TTR_NO_MATCH && !regs.mmu_enabled && (regs.tcr & MMU_TCR_DWO)))) + mmu_bus_error_ttr_write_fault(addr, super, data, 0, size); return res; } @@ -735,7 +747,36 @@ static bool mmu_fill_atc(uaecptr addr, bool super, uae_u32 tag, bool write, stru return (*status != MMU_FSLW_TWE); // FIXME: find a better way to report bus error during table search } -uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size, bool rmw) +static void mmu_add_cache(uaecptr addr, uaecptr phys, bool super, bool data, bool write) +{ + if (!data) { +#if MMU_IPAGECACHE + uae_u32 laddr = (addr & mmu_pagemaski) | (super ? 1 : 0); + atc_last_ins_laddr = laddr; + atc_last_ins_paddr = phys; +#else + ; +#endif +#if MMU_DPAGECACHE + } else { + uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); + uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); + if (write) { + if (idx2 < MMUFASTCACHE_ENTRIES - 1) { + atc_data_cache_write[idx2].log = idx1; + atc_data_cache_write[idx2].phys = phys; + } + } else { + if (idx2 < MMUFASTCACHE_ENTRIES - 1) { + atc_data_cache_read[idx2].log = idx1; + atc_data_cache_read[idx2].phys = phys; + } + } +#endif + } +} + +uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size) { int way, i, index, way_invalid; struct mmu_atc_line *l; @@ -748,70 +789,52 @@ uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool wri index=(addr & 0x0000F000)>>12; way_invalid = ATC_WAYS; way_random++; + way = mmu_atc_ways[data]; for (i = 0; i < ATC_WAYS; i++) { - way = mmu_atc_ways; // if we have this l = &mmu_atc_array[data][index][way]; - if (l->valid && tag == l->tag) { + if (l->valid) { + if (tag == l->tag) { atc_retry: - // check if we need to cause a page fault - if (((l->status&(MMU_MMUSR_W|MMU_MMUSR_S|MMU_MMUSR_R))!=MMU_MMUSR_R)) { - if (((l->status&MMU_MMUSR_W) && write) || - ((l->status&MMU_MMUSR_S) && !super) || - !(l->status&MMU_MMUSR_R)) { - - if ((l->status&MMU_MMUSR_S) && !super) - status |= MMU_FSLW_SP; - if ((l->status&MMU_MMUSR_W) && write) - status |= MMU_FSLW_WP; - - mmu_bus_error(addr, val, mmu_get_fc(super, data), write, size, rmw, status, false); - return 0; // never reach, bus error longjumps out of the function + // check if we need to cause a page fault + if (((l->status&(MMU_MMUSR_W|MMU_MMUSR_S|MMU_MMUSR_R))!=MMU_MMUSR_R)) { + if (((l->status&MMU_MMUSR_W) && write) || + ((l->status&MMU_MMUSR_S) && !super) || + !(l->status&MMU_MMUSR_R)) { + + if ((l->status&MMU_MMUSR_S) && !super) + status |= MMU_FSLW_SP; + if ((l->status&MMU_MMUSR_W) && write) + status |= MMU_FSLW_WP; + + mmu_bus_error(addr, val, mmu_get_fc(super, data), write, size, status, false); + return 0; // never reach, bus error longjumps out of the function + } } - } - // if first write to this page initiate table search to set M bit (but modify this slot) - if (!(l->status&MMU_MMUSR_M) && write) { - way_invalid = way; - break; - } -#if MMU_DPAGECACHE - uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | regs.s; - uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); -#endif - if (!data) { -#if MMU_IPAGECACHE - uae_u32 laddr = (addr & mmu_pagemaski) | (super ? 1 : 0); - atc_last_ins_laddr = laddr; - atc_last_ins_paddr = l->phys; -#else - ; -#endif -#if MMU_DPAGECACHE - } else if (write) { - if (idx2 < MMUFASTCACHE_ENTRIES - 1) { - atc_data_cache_write[idx2].log = idx1; - atc_data_cache_write[idx2].phys = l->phys; + // if first write to this page initiate table search to set M bit (but modify this slot) + if (!(l->status&MMU_MMUSR_M) && write) { + way_invalid = way; + break; } + + // save way for next access (likely in same page) + mmu_atc_ways[data] = way; + + mmu_add_cache(addr, l->phys, super, data, write); + + // return translated addr + return l->phys | (addr & mmu_pagemask); } else { - if (idx2 < MMUFASTCACHE_ENTRIES - 1) { - atc_data_cache_read[idx2].log = idx1; - atc_data_cache_read[idx2].phys = l->phys; - } -#endif + way_invalid = way; } - // return translated addr - return l->phys | (addr & mmu_pagemask); - } else { - way_invalid = way; } - mmu_atc_ways++; - mmu_atc_ways %= ATC_WAYS; + way++; + way %= ATC_WAYS; } // no entry found, we need to create a new one, first find an atc line to replace way_random %= ATC_WAYS; - mmu_atc_ways = (way_invalid < ATC_WAYS) ? way_invalid : way_random; - way = mmu_atc_ways; + way = (way_invalid < ATC_WAYS) ? way_invalid : way_random; // then initiate table search and create a new entry l = &mmu_atc_array[data][index][way]; @@ -820,9 +843,6 @@ atc_retry: // and retry the ATC search way_random++; goto atc_retry; - - // never reach - return 0; } static void misalignednotfirst(uaecptr addr) @@ -842,14 +862,14 @@ static void misalignednotfirstcheck(uaecptr addr) misalignednotfirst (addr); } -uae_u16 REGPARAM2 mmu_get_word_unaligned(uaecptr addr, bool data, bool rmw) +uae_u16 REGPARAM2 mmu_get_word_unaligned(uaecptr addr, bool data) { uae_u16 res; - res = (uae_u16)mmu_get_byte(addr, data, sz_word, rmw) << 8; + res = (uae_u16)mmu_get_byte(addr, data, sz_word) << 8; SAVE_EXCEPTION; TRY(prb) { - res |= mmu_get_byte(addr + 1, data, sz_word, rmw); + res |= mmu_get_byte(addr + 1, data, sz_word); RESTORE_EXCEPTION; } CATCH(prb) { @@ -860,15 +880,15 @@ uae_u16 REGPARAM2 mmu_get_word_unaligned(uaecptr addr, bool data, bool rmw) return res; } -uae_u32 REGPARAM2 mmu_get_long_unaligned(uaecptr addr, bool data, bool rmw) +uae_u32 REGPARAM2 mmu_get_long_unaligned(uaecptr addr, bool data) { uae_u32 res; if (likely(!(addr & 1))) { - res = (uae_u32)mmu_get_word(addr, data, sz_long, rmw) << 16; + res = (uae_u32)mmu_get_word(addr, data, sz_long) << 16; SAVE_EXCEPTION; TRY(prb) { - res |= mmu_get_word(addr + 2, data, sz_long, rmw); + res |= mmu_get_word(addr + 2, data, sz_long); RESTORE_EXCEPTION; } CATCH(prb) { @@ -877,12 +897,12 @@ uae_u32 REGPARAM2 mmu_get_long_unaligned(uaecptr addr, bool data, bool rmw) THROW_AGAIN(prb); } ENDTRY } else { - res = (uae_u32)mmu_get_byte(addr, data, sz_long, rmw) << 8; + res = (uae_u32)mmu_get_byte(addr, data, sz_long) << 8; SAVE_EXCEPTION; TRY(prb) { - res = (res | mmu_get_byte(addr + 1, data, sz_long, rmw)) << 8; - res = (res | mmu_get_byte(addr + 2, data, sz_long, rmw)) << 8; - res |= mmu_get_byte(addr + 3, data, sz_long, rmw); + res = (res | mmu_get_byte(addr + 1, data, sz_long)) << 8; + res = (res | mmu_get_byte(addr + 2, data, sz_long)) << 8; + res |= mmu_get_byte(addr + 3, data, sz_long); RESTORE_EXCEPTION; } CATCH(prb) { @@ -964,18 +984,18 @@ static uae_u32 REGPARAM2 mmu_get_lrmw_long_unaligned(uaecptr addr) return res; } -void REGPARAM2 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data, bool rmw) +void REGPARAM2 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data) { SAVE_EXCEPTION; TRY(prb) { if (likely(!(addr & 1))) { - mmu_put_word(addr, val >> 16, data, sz_long, rmw); - mmu_put_word(addr + 2, val, data, sz_long, rmw); + mmu_put_word(addr, val >> 16, data, sz_long); + mmu_put_word(addr + 2, val, data, sz_long); } else { - mmu_put_byte(addr, val >> 24, data, sz_long, rmw); - mmu_put_byte(addr + 1, val >> 16, data, sz_long, rmw); - mmu_put_byte(addr + 2, val >> 8, data, sz_long, rmw); - mmu_put_byte(addr + 3, val, data, sz_long, rmw); + mmu_put_byte(addr, val >> 24, data, sz_long); + mmu_put_byte(addr + 1, val >> 16, data, sz_long); + mmu_put_byte(addr + 2, val >> 8, data, sz_long); + mmu_put_byte(addr + 3, val, data, sz_long); } RESTORE_EXCEPTION; } @@ -987,12 +1007,12 @@ void REGPARAM2 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data, bool } ENDTRY } -void REGPARAM2 mmu_put_word_unaligned(uaecptr addr, uae_u16 val, bool data, bool rmw) +void REGPARAM2 mmu_put_word_unaligned(uaecptr addr, uae_u16 val, bool data) { SAVE_EXCEPTION; TRY(prb) { - mmu_put_byte(addr, val >> 8, data, sz_word, rmw); - mmu_put_byte(addr + 1, val, data, sz_word, rmw); + mmu_put_byte(addr, val >> 8, data, sz_word); + mmu_put_byte(addr + 1, val, data, sz_word); RESTORE_EXCEPTION; } CATCH(prb) { @@ -1158,7 +1178,7 @@ void mmu_get_move16(uaecptr addr, uae_u32 *v, bool data, int size) addr &= ~15; if ((!mmu_ttr_enabled || mmu_match_ttr(addr,super,data) == TTR_NO_MATCH) && regs.mmu_enabled) { - addr = mmu_translate(addr, 0, super, data, false, size, false); + addr = mmu_translate(addr, 0, super, data, false, size); } for (int i = 0; i < 4; i++) { v[i] = phys_get_long(addr + i * 4); @@ -1170,8 +1190,8 @@ void mmu_put_move16(uaecptr addr, uae_u32 *val, bool data, int size) bool super = regs.s != 0; addr &= ~15; - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,data,val[0],size,false) == TTR_NO_MATCH) && regs.mmu_enabled) { - addr = mmu_translate(addr, val[0], super, data, true, size, false); + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,data,val[0],size) == TTR_NO_MATCH) && regs.mmu_enabled) { + addr = mmu_translate(addr, val[0], super, data, true, size); } for (int i = 0; i < 4; i++) { phys_put_long(addr + i * 4, val[i]); @@ -1219,45 +1239,32 @@ void REGPARAM2 mmu_op_real(uae_u32 opcode, uae_u16 extra) #if MMUINSDEBUG > 0 write_log(_T("PTEST%c (A%d) %08x DFC=%d\n"), write ? 'W' : 'R', regno, addr, regs.dfc); #endif - if (!currprefs.mmu_ec) { - mmu_flush_atc(addr, super, true); - SAVE_EXCEPTION; - TRY(prb) { - struct mmu_atc_line *l; - bool data = (regs.dfc & 3) != 2; - - if (mmu_match_ttr(addr,super,data)!=TTR_NO_MATCH) { - regs.mmusr = MMU_MMUSR_T | MMU_MMUSR_R; - } else { - int way; - uae_u32 index; - uae_u32 status; - uae_u32 tag = ((super ? 0x80000000 : 0x00000000) | (addr >> 1)) & mmu_tagmask; - if (mmu_pagesize_8k) - index=(addr & 0x0001E000)>>13; - else - index=(addr & 0x0000F000)>>12; - - for (way = 0; way < ATC_WAYS; way++) { - if (!mmu_atc_array[data][index][way].valid) - break; - } - if (way >= ATC_WAYS) { - way = way_random % ATC_WAYS; - } - l=&mmu_atc_array[data][index][way]; - - if (mmu_fill_atc(addr, super, tag, write, l, &status)) { - regs.mmusr = l->phys | l->status; - } else { - regs.mmusr = MMU_MMUSR_B; - } - } - } - CATCH(prb) { + mmu_flush_atc(addr, super, true); + bool data = (regs.dfc & 3) != 2; + int ttr_match = mmu_match_ttr(addr,super,data); + if (ttr_match != TTR_NO_MATCH) { + if (ttr_match == TTR_NO_WRITE && write) { regs.mmusr = MMU_MMUSR_B; - } ENDTRY - RESTORE_EXCEPTION; + } else { + regs.mmusr = MMU_MMUSR_T | MMU_MMUSR_R; + } + } else if (!currprefs.mmu_ec) { + int way; + uae_u32 index; + uae_u32 tag = ((super ? 0x80000000 : 0x00000000) | (addr >> 1)) & mmu_tagmask; + uae_u32 status = 0; + if (mmu_pagesize_8k) + index=(addr & 0x0001E000)>>13; + else + index=(addr & 0x0000F000)>>12; + for (way = 0; way < ATC_WAYS; way++) { + if (!mmu_atc_array[data][index][way].valid) + break; + } + if (way >= ATC_WAYS) { + way = way_random % ATC_WAYS; + } + regs.mmusr = mmu_fill_atc(addr, super, tag, write, &mmu_atc_array[data][index][way], &status); #if MMUINSDEBUG > 0 write_log(_T("PTEST result: mmusr %08x\n"), regs.mmusr); #endif @@ -1273,12 +1280,12 @@ void REGPARAM2 mmu_op_real(uae_u32 opcode, uae_u16 extra) write_log(_T("PLPA%c param: %08x\n"), write ? 'W' : 'R', addr); #endif if (write) - ttr = mmu_match_ttr_write(addr, super, data, 0, 1, false); + ttr = mmu_match_ttr_write(addr, super, data, 0, 1); else ttr = mmu_match_ttr(addr,super,data); if (ttr == TTR_NO_MATCH) { if (!currprefs.mmu_ec) { - m68k_areg (regs, regno) = mmu_translate(addr, 0, super, data, write, 1, false); + m68k_areg (regs, regno) = mmu_translate(addr, 0, super, data, write, 1); } } #if MMUINSDEBUG > 0 @@ -1470,18 +1477,18 @@ void uae_mmu_put_lrmw (uaecptr addr, uae_u32 v, int size, int type) { locked_rmw_cycle = true; if (size == sz_byte) { - mmu_put_byte(addr, v, true, sz_byte, true); + mmu_put_byte(addr, v, true, sz_byte); } else if (size == sz_word) { if (unlikely(is_unaligned(addr, 2))) { - mmu_put_word_unaligned(addr, v, true, true); + mmu_put_word_unaligned(addr, v, true); } else { - mmu_put_word(addr, v, true, sz_word, true); + mmu_put_word(addr, v, true, sz_word); } } else { if (unlikely(is_unaligned(addr, 4))) - mmu_put_long_unaligned(addr, v, true, true); + mmu_put_long_unaligned(addr, v, true); else - mmu_put_long(addr, v, true, sz_long, true); + mmu_put_long(addr, v, true, sz_long); } locked_rmw_cycle = false; } diff --git a/debug.cpp b/debug.cpp index 507ada06..742e26ca 100644 --- a/debug.cpp +++ b/debug.cpp @@ -294,7 +294,11 @@ uae_u32 get_byte_debug (uaecptr addr) if (currprefs.mmu_model == 68030) { v = mmu030_get_generic (addr, debug_mmu_mode, sz_byte, sz_byte, 0); } else { - v = mmu_get_user_byte (addr, regs.s != 0, (debug_mmu_mode & 1) ? true : false, false, sz_byte); + if (debug_mmu_mode & 1) { + v = mmu_get_iword(addr, sz_byte); + } else { + v = mmu_get_user_byte (addr, regs.s != 0, false, sz_byte); + } } } CATCH(p) { } ENDTRY @@ -314,7 +318,11 @@ uae_u32 get_word_debug (uaecptr addr) if (currprefs.mmu_model == 68030) { v = mmu030_get_generic (addr, debug_mmu_mode, sz_word, sz_word, 0); } else { - v = mmu_get_user_word (addr, regs.s != 0, (debug_mmu_mode & 1) ? true : false, false, sz_word); + if (debug_mmu_mode & 1) { + v = mmu_get_iword(addr, sz_word); + } else { + v = mmu_get_user_word (addr, regs.s != 0, false, sz_word); + } } } CATCH(p) { } ENDTRY @@ -334,7 +342,11 @@ uae_u32 get_long_debug (uaecptr addr) if (currprefs.mmu_model == 68030) { v = mmu030_get_generic (addr, debug_mmu_mode, sz_long, sz_long, 0); } else { - v = mmu_get_user_long (addr, regs.s != 0, (debug_mmu_mode & 1) ? true : false, false, sz_long); + if (debug_mmu_mode & 1) { + v = mmu_get_ilong(addr, sz_long); + } else { + v = mmu_get_user_long (addr, regs.s != 0, false, sz_long); + } } } CATCH(p) { } ENDTRY @@ -372,7 +384,7 @@ static int safe_addr (uaecptr addr, int size) regs.s = (debug_mmu_mode & 4) != 0; TRY(p) { if (currprefs.mmu_model >= 68040) - addr = mmu_translate (addr, regs.s != 0, (debug_mmu_mode & 1), false); + addr = mmu_translate (addr, 0, regs.s != 0, (debug_mmu_mode & 1), false, size); else addr = mmu030_translate (addr, regs.s != 0, (debug_mmu_mode & 1), false); } CATCH(p) { @@ -3776,6 +3788,8 @@ static void memory_map_dump_3(UaeMemoryMap *map, int log) if (a1 != &dummy_bank) { for (int m = 0; m < mirrored2; m++) { + if (map->num_regions >= UAE_MEMORY_REGIONS_MAX) + break; UaeMemoryRegion *r = &map->regions[map->num_regions]; r->start = (j << 16) + bankoffset + region_size * m; r->size = region_size; @@ -5575,13 +5589,13 @@ static bool debug_line (TCHAR *input) console_out_f (_T("S%dD%d="), super, data); TRY(prb) { if (currprefs.mmu_model >= 68040) - addrp = mmu_translate (addrl, super, data, false); + addrp = mmu_translate (addrl, 0, super, data, false, sz_long); else addrp = mmu030_translate (addrl, super, data, false); console_out_f (_T("%08X"), addrp); TRY(prb2) { if (currprefs.mmu_model >= 68040) - addrp = mmu_translate (addrl, super, data, true); + addrp = mmu_translate (addrl, 0, super, data, true, sz_long); else addrp = mmu030_translate (addrl, super, data, true); console_out_f (_T(" RW")); diff --git a/include/cpummu.h b/include/cpummu.h index ac9688bf..a7cde2d0 100644 --- a/include/cpummu.h +++ b/include/cpummu.h @@ -62,6 +62,7 @@ extern int mmu_pageshift, mmu_pageshift1m; extern uae_u16 mmu_opcode; extern bool mmu_restart; extern bool mmu_ttr_enabled, mmu_ttr_enabled_ins, mmu_ttr_enabled_data; +extern bool rmw_cycle; extern void mmu_dump_tables(void); @@ -165,27 +166,28 @@ extern struct mmu_atc_line mmu_atc_array[ATC_TYPE][ATC_SLOTS][ATC_WAYS]; extern void mmu_tt_modified(void); extern int mmu_match_ttr_ins(uaecptr addr, bool super); extern int mmu_match_ttr(uaecptr addr, bool super, bool data); -extern void mmu_bus_error_ttr_write_fault(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool rmw); -extern int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool rmw); -extern uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size, bool rmw); +extern void mmu_bus_error_ttr_write_fault(uaecptr addr, bool super, bool data, uae_u32 val, int size); +extern int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size); +extern int mmu_match_ttr_maybe_write(uaecptr addr, bool super, bool data, int size, bool write); +extern uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size); extern uae_u32 REGPARAM3 mmu060_get_rmw_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM; extern void REGPARAM3 mmu060_put_rmw_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM; -extern uae_u16 REGPARAM3 mmu_get_word_unaligned(uaecptr addr, bool data, bool rmw) REGPARAM; -extern uae_u32 REGPARAM3 mmu_get_long_unaligned(uaecptr addr, bool data, bool rmw) REGPARAM; +extern uae_u16 REGPARAM3 mmu_get_word_unaligned(uaecptr addr, bool data) REGPARAM; +extern uae_u32 REGPARAM3 mmu_get_long_unaligned(uaecptr addr, bool data) REGPARAM; extern uae_u32 REGPARAM3 mmu_get_ilong_unaligned(uaecptr addr) REGPARAM; -extern void REGPARAM3 mmu_put_word_unaligned(uaecptr addr, uae_u16 val, bool data, bool rmw) REGPARAM; -extern void REGPARAM3 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data, bool rmw) REGPARAM; +extern void REGPARAM3 mmu_put_word_unaligned(uaecptr addr, uae_u16 val, bool data) REGPARAM; +extern void REGPARAM3 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data) REGPARAM; extern void mmu_make_transparent_region(uaecptr baseaddr, uae_u32 size, int datamode); #define FC_DATA (regs.s ? 5 : 1) #define FC_INST (regs.s ? 6 : 2) -extern void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, bool rmw, uae_u32 status, bool nonmmu); +extern void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, uae_u32 status, bool nonmmu); extern uae_u32 REGPARAM3 sfc_get_long(uaecptr addr) REGPARAM; extern uae_u16 REGPARAM3 sfc_get_word(uaecptr addr) REGPARAM; @@ -264,7 +266,7 @@ static ALWAYS_INLINE uae_u32 mmu_get_ilong(uaecptr addr, int size) mmu_ins_miss++; #endif #endif - addr = mmu_translate(addr, 0, regs.s!=0, false, false, size, false); + addr = mmu_translate(addr, 0, regs.s!=0, false, false, size); #if MMU_IPAGECACHE } #endif @@ -286,7 +288,7 @@ static ALWAYS_INLINE uae_u16 mmu_get_iword(uaecptr addr, int size) mmu_ins_miss++; #endif #endif - addr = mmu_translate(addr, 0, regs.s!=0, false, false, size, false); + addr = mmu_translate(addr, 0, regs.s!=0, false, false, size); #if MMU_IPAGECACHE } #endif @@ -295,7 +297,7 @@ static ALWAYS_INLINE uae_u16 mmu_get_iword(uaecptr addr, int size) } -static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, bool data, int size, bool rmw) +static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, bool data, int size) { if ((!mmu_ttr_enabled || mmu_match_ttr(addr,regs.s!=0,data) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE @@ -311,7 +313,7 @@ static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, bool data, int size, boo mmu_data_read_miss++; #endif #endif - addr = mmu_translate(addr, 0, regs.s!=0, data, false, size, rmw); + addr = mmu_translate(addr, 0, regs.s!=0, data, false, size); #if MMU_DPAGECACHE } #endif @@ -319,7 +321,7 @@ static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, bool data, int size, boo return phys_get_long(addr); } -static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, bool data, int size, bool rmw) +static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, bool data, int size) { if ((!mmu_ttr_enabled || mmu_match_ttr(addr,regs.s!=0,data) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE @@ -335,7 +337,7 @@ static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, bool data, int size, boo mmu_data_read_miss++; #endif #endif - addr = mmu_translate(addr, 0, regs.s!=0, data, false, size, rmw); + addr = mmu_translate(addr, 0, regs.s!=0, data, false, size); #if MMU_DPAGECACHE } #endif @@ -343,7 +345,7 @@ static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, bool data, int size, boo return phys_get_word(addr); } -static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, bool data, int size, bool rmw) +static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, bool data, int size) { if ((!mmu_ttr_enabled || mmu_match_ttr(addr,regs.s!=0,data) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE @@ -359,7 +361,7 @@ static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, bool data, int size, bool mmu_data_read_miss++; #endif #endif - addr = mmu_translate(addr, 0, regs.s!=0, data, false, size, rmw); + addr = mmu_translate(addr, 0, regs.s!=0, data, false, size); #if MMU_DPAGECACHE } #endif @@ -367,9 +369,9 @@ static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, bool data, int size, bool return phys_get_byte(addr); } -static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, bool data, int size, bool rmw) +static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, bool data, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,regs.s!=0,data,val,size,rmw) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,regs.s!=0,data,val,size) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | regs.s; uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -383,7 +385,7 @@ static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, bool data, int mmu_data_write_miss++; #endif #endif - addr = mmu_translate(addr, val, regs.s!=0, data, true, size, rmw); + addr = mmu_translate(addr, val, regs.s!=0, data, true, size); #if MMU_DPAGECACHE } #endif @@ -391,9 +393,9 @@ static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, bool data, int phys_put_long(addr, val); } -static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, bool data, int size, bool rmw) +static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, bool data, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,regs.s!=0,data,val,size,rmw) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,regs.s!=0,data,val,size) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | regs.s; uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -407,7 +409,7 @@ static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, bool data, int mmu_data_write_miss++; #endif #endif - addr = mmu_translate(addr, val, regs.s!=0, data, true, size, rmw); + addr = mmu_translate(addr, val, regs.s!=0, data, true, size); #if MMU_DPAGECACHE } #endif @@ -415,9 +417,9 @@ static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, bool data, int phys_put_word(addr, val); } -static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, bool data, int size, bool rmw) +static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, bool data, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,regs.s!=0,data,val,size,rmw) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,regs.s!=0,data,val,size) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | regs.s; uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -431,7 +433,7 @@ static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, bool data, int mmu_data_write_miss++; #endif #endif - addr = mmu_translate(addr, val, regs.s!=0, data, true, size, rmw); + addr = mmu_translate(addr, val, regs.s!=0, data, true, size); #if MMU_DPAGECACHE } #endif @@ -441,7 +443,7 @@ static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, bool data, int static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool write, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr(addr,super,true) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_maybe_write(addr,super,true,size,write) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -455,7 +457,7 @@ static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool wr mmu_data_read_miss++; #endif #endif - addr = mmu_translate(addr, 0, super, true, write, size, false); + addr = mmu_translate(addr, 0, super, true, write, size); #if MMU_DPAGECACHE } #endif @@ -465,7 +467,7 @@ static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool wr static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool write, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr(addr,super,true) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_maybe_write(addr,super,true,size,write) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -479,7 +481,7 @@ static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool wr mmu_data_read_miss++; #endif #endif - addr = mmu_translate(addr, 0, super, true, write, size, false); + addr = mmu_translate(addr, 0, super, true, write, size); #if MMU_DPAGECACHE } #endif @@ -489,7 +491,7 @@ static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool wr static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool write, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr(addr,super,true) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_maybe_write(addr,super,true,size,write) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -503,7 +505,7 @@ static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool wri mmu_data_read_miss++; #endif #endif - addr = mmu_translate(addr, 0, super, true, write, size, false); + addr = mmu_translate(addr, 0, super, true, write, size); #if MMU_DPAGECACHE } #endif @@ -513,7 +515,7 @@ static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool wri static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool super, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,true,val,size,false) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,true,val,size) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -527,7 +529,7 @@ static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool supe mmu_data_write_miss++; #endif #endif - addr = mmu_translate(addr, val, super, true, true, size, false); + addr = mmu_translate(addr, val, super, true, true, size); #if MMU_DPAGECACHE } #endif @@ -537,7 +539,7 @@ static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool supe static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool super, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,true,val,size,false) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,true,val,size) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -551,7 +553,7 @@ static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool supe mmu_data_write_miss++; #endif #endif - addr = mmu_translate(addr, val, super, true, true, size, false); + addr = mmu_translate(addr, val, super, true, true, size); #if MMU_DPAGECACHE } #endif @@ -561,7 +563,7 @@ static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool supe static ALWAYS_INLINE void mmu_put_user_byte(uaecptr addr, uae_u8 val, bool super, int size) { - if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,true,val,size,false) == TTR_NO_MATCH) && regs.mmu_enabled) { + if ((!mmu_ttr_enabled || mmu_match_ttr_write(addr,super,true,val,size) == TTR_NO_MATCH) && regs.mmu_enabled) { #if MMU_DPAGECACHE uae_u32 idx1 = ((addr & mmu_pagemaski) >> mmu_pageshift1m) | (super ? 1 : 0); uae_u32 idx2 = idx1 & (MMUFASTCACHE_ENTRIES - 1); @@ -575,7 +577,7 @@ static ALWAYS_INLINE void mmu_put_user_byte(uaecptr addr, uae_u8 val, bool super mmu_data_write_miss++; #endif #endif - addr = mmu_translate(addr, val, super, true, true, size, false); + addr = mmu_translate(addr, val, super, true, true, size); #if MMU_DPAGECACHE } #endif @@ -659,43 +661,43 @@ static ALWAYS_INLINE uae_u16 uae_mmu040_get_ibyte(uaecptr addr) uae_u16 result = uae_mmu040_getc_iword(addr & ~1); return (addr & 1) ? result & 0xFF : result >> 8; #else - return mmu_get_byte(addr, false, sz_byte, false); + return mmu_get_byte(addr, false, sz_byte); #endif } static ALWAYS_INLINE uae_u32 uae_mmu040_get_long(uaecptr addr) { if (unlikely(is_unaligned(addr, 4))) - return mmu_get_long_unaligned(addr, true, false); - return mmu_get_long(addr, true, sz_long, false); + return mmu_get_long_unaligned(addr, true); + return mmu_get_long(addr, true, sz_long); } static ALWAYS_INLINE uae_u16 uae_mmu040_get_word(uaecptr addr) { if (unlikely(is_unaligned(addr, 2))) - return mmu_get_word_unaligned(addr, true, false); - return mmu_get_word(addr, true, sz_word, false); + return mmu_get_word_unaligned(addr, true); + return mmu_get_word(addr, true, sz_word); } static ALWAYS_INLINE uae_u8 uae_mmu040_get_byte(uaecptr addr) { - return mmu_get_byte(addr, true, sz_byte, false); + return mmu_get_byte(addr, true, sz_byte); } static ALWAYS_INLINE void uae_mmu040_put_word(uaecptr addr, uae_u16 val) { if (unlikely(is_unaligned(addr, 2))) - mmu_put_word_unaligned(addr, val, true, false); + mmu_put_word_unaligned(addr, val, true); else - mmu_put_word(addr, val, true, sz_word, false); + mmu_put_word(addr, val, true, sz_word); } static ALWAYS_INLINE void uae_mmu040_put_byte(uaecptr addr, uae_u8 val) { - mmu_put_byte(addr, val, true, sz_byte, false); + mmu_put_byte(addr, val, true, sz_byte); } static ALWAYS_INLINE void uae_mmu040_put_long(uaecptr addr, uae_u32 val) { if (unlikely(is_unaligned(addr, 4))) - mmu_put_long_unaligned(addr, val, true, false); + mmu_put_long_unaligned(addr, val, true); else - mmu_put_long(addr, val, true, sz_long, false); + mmu_put_long(addr, val, true, sz_long); } @@ -711,23 +713,23 @@ static ALWAYS_INLINE uae_u16 uae_mmu060_get_iword(uaecptr addr) } static ALWAYS_INLINE uae_u16 uae_mmu060_get_ibyte(uaecptr addr) { - return mmu_get_byte(addr, false, sz_byte, false); + return mmu_get_byte(addr, false, sz_byte); } -static ALWAYS_INLINE uae_u32 uae_mmu060_get_long(uaecptr addr, bool rmw) +static ALWAYS_INLINE uae_u32 uae_mmu060_get_long(uaecptr addr) { if (unlikely(is_unaligned(addr, 4))) - return mmu_get_long_unaligned(addr, true, rmw); - return mmu_get_long(addr, true, sz_long, rmw); + return mmu_get_long_unaligned(addr, true); + return mmu_get_long(addr, true, sz_long); } -static ALWAYS_INLINE uae_u16 uae_mmu060_get_word(uaecptr addr, bool rmw) +static ALWAYS_INLINE uae_u16 uae_mmu060_get_word(uaecptr addr) { if (unlikely(is_unaligned(addr, 2))) - return mmu_get_word_unaligned(addr, true, rmw); - return mmu_get_word(addr, true, sz_word, rmw); + return mmu_get_word_unaligned(addr, true); + return mmu_get_word(addr, true, sz_word); } -static ALWAYS_INLINE uae_u8 uae_mmu060_get_byte(uaecptr addr, bool rmw) +static ALWAYS_INLINE uae_u8 uae_mmu060_get_byte(uaecptr addr) { - return mmu_get_byte(addr, true, sz_byte, rmw); + return mmu_get_byte(addr, true, sz_byte); } static ALWAYS_INLINE void uae_mmu_get_move16(uaecptr addr, uae_u32 *val) { @@ -735,23 +737,23 @@ static ALWAYS_INLINE void uae_mmu_get_move16(uaecptr addr, uae_u32 *val) mmu_get_move16(addr, val, true, 16); } -static ALWAYS_INLINE void uae_mmu060_put_long(uaecptr addr, uae_u32 val, bool rmw) +static ALWAYS_INLINE void uae_mmu060_put_long(uaecptr addr, uae_u32 val) { if (unlikely(is_unaligned(addr, 4))) - mmu_put_long_unaligned(addr, val, true, rmw); + mmu_put_long_unaligned(addr, val, true); else - mmu_put_long(addr, val, true, sz_long, rmw); + mmu_put_long(addr, val, true, sz_long); } -static ALWAYS_INLINE void uae_mmu060_put_word(uaecptr addr, uae_u16 val, bool rmw) +static ALWAYS_INLINE void uae_mmu060_put_word(uaecptr addr, uae_u16 val) { if (unlikely(is_unaligned(addr, 2))) - mmu_put_word_unaligned(addr, val, true, rmw); + mmu_put_word_unaligned(addr, val, true); else - mmu_put_word(addr, val, true, sz_word, rmw); + mmu_put_word(addr, val, true, sz_word); } -static ALWAYS_INLINE void uae_mmu060_put_byte(uaecptr addr, uae_u8 val, bool rmw) +static ALWAYS_INLINE void uae_mmu060_put_byte(uaecptr addr, uae_u8 val) { - mmu_put_byte(addr, val, true, sz_byte, rmw); + mmu_put_byte(addr, val, true, sz_byte); } static ALWAYS_INLINE void uae_mmu_put_move16(uaecptr addr, uae_u32 *val) { @@ -787,27 +789,27 @@ STATIC_INLINE uae_u32 get_long_mmu040 (uaecptr addr) // normal 060 STATIC_INLINE void put_byte_mmu060 (uaecptr addr, uae_u32 v) { - uae_mmu060_put_byte (addr, v, false); + uae_mmu060_put_byte (addr, v); } STATIC_INLINE void put_word_mmu060 (uaecptr addr, uae_u32 v) { - uae_mmu060_put_word (addr, v, false); + uae_mmu060_put_word (addr, v); } STATIC_INLINE void put_long_mmu060 (uaecptr addr, uae_u32 v) { - uae_mmu060_put_long (addr, v, false); + uae_mmu060_put_long (addr, v); } STATIC_INLINE uae_u32 get_byte_mmu060 (uaecptr addr) { - return uae_mmu060_get_byte (addr, false); + return uae_mmu060_get_byte (addr); } STATIC_INLINE uae_u32 get_word_mmu060 (uaecptr addr) { - return uae_mmu060_get_word (addr, false); + return uae_mmu060_get_word (addr); } STATIC_INLINE uae_u32 get_long_mmu060 (uaecptr addr) { - return uae_mmu060_get_long (addr, false); + return uae_mmu060_get_long (addr); } STATIC_INLINE void get_move16_mmu (uaecptr addr, uae_u32 *v) @@ -847,27 +849,42 @@ STATIC_INLINE uae_u32 get_lrmw_long_mmu060 (uaecptr addr) // normal rmw 060 STATIC_INLINE void put_rmw_byte_mmu060 (uaecptr addr, uae_u32 v) { - uae_mmu060_put_byte (addr, v, true); + rmw_cycle = true; + uae_mmu060_put_byte (addr, v); + rmw_cycle = false; } STATIC_INLINE void put_rmw_word_mmu060 (uaecptr addr, uae_u32 v) { - uae_mmu060_put_word (addr, v, true); + rmw_cycle = true; + uae_mmu060_put_word (addr, v); + rmw_cycle = false; } STATIC_INLINE void put_rmw_long_mmu060 (uaecptr addr, uae_u32 v) { - uae_mmu060_put_long (addr, v, true); + rmw_cycle = true; + uae_mmu060_put_long (addr, v); + rmw_cycle = false; } STATIC_INLINE uae_u32 get_rmw_byte_mmu060 (uaecptr addr) { - return uae_mmu060_get_byte (addr, true); + rmw_cycle = true; + uae_u32 v = uae_mmu060_get_byte (addr); + rmw_cycle = false; + return v; } STATIC_INLINE uae_u32 get_rmw_word_mmu060 (uaecptr addr) { - return uae_mmu060_get_word (addr, true); + rmw_cycle = true; + uae_u32 v = uae_mmu060_get_word (addr); + rmw_cycle = false; + return v; } STATIC_INLINE uae_u32 get_rmw_long_mmu060 (uaecptr addr) { - return uae_mmu060_get_long (addr, true); + rmw_cycle = true; + uae_u32 v = uae_mmu060_get_long (addr); + rmw_cycle = false; + return v; } // locked rmw 040 STATIC_INLINE void put_lrmw_byte_mmu040 (uaecptr addr, uae_u32 v) diff --git a/newcpu.cpp b/newcpu.cpp index 0995c212..4686ea22 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -4807,7 +4807,7 @@ static void opcodedebug (uae_u32 pc, uae_u16 opcode, bool full) ; fault = 0; TRY(prb) { - addr = mmu_translate (pc, 0, (regs.mmu_ssw & 4) ? 1 : 0, 0, 0, sz_word, false); + addr = mmu_translate (pc, 0, (regs.mmu_ssw & 4) ? 1 : 0, 0, 0, sz_word); } CATCH (prb) { fault = 1; } ENDTRY @@ -7699,7 +7699,7 @@ void exception2 (uaecptr addr, bool read, int size, uae_u32 fc) uae_u32 flags = size == 1 ? MMU030_SSW_SIZE_B : (size == 2 ? MMU030_SSW_SIZE_W : MMU030_SSW_SIZE_L); mmu030_page_fault (addr, read, flags, fc); } else { - mmu_bus_error (addr, 0, fc, read == false, size, false, 0, true); + mmu_bus_error (addr, 0, fc, read == false, size, 0, true); } } else { last_addr_for_exception_3 = m68k_getpc() + bus_error_offset;