From: Toni Wilen Date: Fri, 10 Jul 2020 18:27:24 +0000 (+0300) Subject: Use correct 68040/060 instruction cache bit. JIT loop mode should skip all tests... X-Git-Tag: 4900~352 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=14cdab894cfe65b26eb7fefd44b99b2a6ffed1b9;p=francis%2Fwinuae.git Use correct 68040/060 instruction cache bit. JIT loop mode should skip all tests that generate exception(s). --- diff --git a/cputest.cpp b/cputest.cpp index a1082580..3aaa4aa5 100644 --- a/cputest.cpp +++ b/cputest.cpp @@ -3856,9 +3856,6 @@ static void execute_ins(uaecptr endpc, uaecptr targetpc, struct instr *dp) } if (test_exception) { - if (feature_loop_mode) { - test_exception = -1; - } break; } @@ -4779,8 +4776,8 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi put_long(pc, 0xd6fc0000 | (1 << (i * 3))); pc += 4; } - // adda.w a3,a3 - put_word(pc, 0xd6cb); + // adda.l a3,a3 + put_word(pc, 0xd7cb); pc += 2; // negx.b d0 ; add.w d0,d0 put_long(pc, 0x4000d040); @@ -5332,6 +5329,10 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi } } + if (test_exception >= 2 && feature_loop_mode) { + skipped = 1; + } + if (feature_usp == 2) { // need exception 3 if (test_exception != 3) { diff --git a/cputest/main.c b/cputest/main.c index b19d83c5..3e30beb4 100644 --- a/cputest/main.c +++ b/cputest/main.c @@ -95,7 +95,7 @@ static uae_u32 cpustatearraystore[16]; static uae_u32 cpustatearraynew[] = { 0x00000005, // SFC 0x00000005, // DFC - 0x00000009, // CACR + 0x00000000, // CACR 0x00000000, // CAAR 0x00000000, // MSP }; @@ -472,6 +472,14 @@ static void start_test(void) } } } + if (cpu_lvl >= 4) { + // 68040/060 CACR (IE=1) + cpustatearraynew[2] = 0x00008000; + } else { + // 68020/30 CACR (CI=1,IE=1) + cpustatearraynew[2] = 0x00000009; + } + setcpu(cpu_lvl, cpustatearraynew, cpustatearraystore); } @@ -3320,7 +3328,7 @@ static int test_mnemo(const char *opcode) if (!absallocated) { test_memory = allocate_absolute(test_memory_addr, test_memory_size); if (!test_memory) { - printf("Couldn't allocate tmem area %08x-%08x\n", (uae_u32)test_memory_addr, test_memory_size); + printf("Couldn't allocate tmem area %08x-%08x\n", test_memory_addr, test_memory_addr + test_memory_size - 1); exit(0); } absallocated = test_memory; diff --git a/cputest/readme.txt b/cputest/readme.txt index 33d9391d..abcc34c8 100644 --- a/cputest/readme.txt +++ b/cputest/readme.txt @@ -10,7 +10,7 @@ Verifies: - All FPU registers (FP0-FP7, FPIAR, FPCR, FPSR) - Generated exception and stack frame contents (if any) - Memory writes, including stack modifications (if any) -- Loop mode for JIT testing. (generates , dbf dn,loop) +- Loop mode for JIT testing. (generates , store CCR state, dbf dn,loop) - Supports 68000, 68010, 68020, 68030 (only difference between 020 and 030 seems to be data cache and MMU), 68040 and 68060. - Cycle counts (68000/68010, Amiga only) @@ -39,7 +39,6 @@ Notes and limitations: - All tests that would halt or reset the CPU are skipped (RESET in supervisor mode, STOP parameter that would stop the CPU etc) - Single instruction test set will take long time to run on real 68000. Few minutes to much longer... - Undefined flags (for example DIV and CHK or 68000/010 bus address error) are also verified. It probably would be good idea to optionally filter them out. -- FPU testing is not yet fully implemented. - TAS test will return wrong results if test RAM region is not fully TAS read-modify-write special memory access compatible. - if 24-bit address space and high ram is enabled, tester can generate word or long accesses that wrap around. (For example: move.l $fffffe,d0) @@ -67,7 +66,7 @@ Cycle counting requires 100% accurate timing also for following instructions: 0xDFF006 is used for cycle counting = accuracy will be +-2 CPU cycles. 0xDFF006 behavior must be accurate. Currently only supported hardware for cycle counting is 7MHz 68000/68010 PAL Amiga with real Fast RAM. -FPU testing: (Work in progress) +FPU testing: 68040/060 FPU test hardware must not have any 68040/060 or MMU support libraries loaded. @@ -131,6 +130,12 @@ If mismatch is detected, opcode word(s), instruction disassembly, registers befo Change log: +10.07.2020 + +- 68020+ stack frame PC field was ignored. +- JIT loop mode tester improved. CCR is now checked after each test round. Almost all instructions supported. +- File names are now 8.3 compatible. + 31.05.2020 - 68010 bus error and byte size memory access: ignore bus error stack frame high byte of input and output buffers. Their contents depends on type of ALU operation, instruction type and probably more..