From: Toni Wilen Date: Fri, 9 Aug 2019 10:29:18 +0000 (+0300) Subject: MUL.L ,Dh-Dl: Dh should be updated last, Dh overwrites Dl if both are same regist... X-Git-Tag: 4300~161 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=2559e26974bbad15aee5b9f1e46914f4a2f011f5;p=francis%2Fwinuae.git MUL.L ,Dh-Dl: Dh should be updated last, Dh overwrites Dl if both are same register. Disassembly fixed (MULL.L -> MULS.L/MULU.L, DIV.L -> DIVS.L/DIVU.L) --- diff --git a/disasm.cpp b/disasm.cpp index 2f4c40c2..47e44e2e 100644 --- a/disasm.cpp +++ b/disasm.cpp @@ -1717,6 +1717,10 @@ void m68k_disasm_2 (TCHAR *buf, int bufsize, uaecptr pc, uaecptr *nextpc, int cn TCHAR *p; extra = get_word_debug(pc); pc += 2; + if (extra & 0x0800) // signed/unsigned + instrname[3] = 'S'; + else + instrname[3] = 'U'; pc = ShowEA(NULL, pc, opcode, dp->dreg, dp->dmode, dp->size, instrname, &seaddr2, safemode); p = instrname + _tcslen(instrname); if (extra & 0x0400) diff --git a/newcpu_common.cpp b/newcpu_common.cpp index 70446c9d..9784d5fd 100644 --- a/newcpu_common.cpp +++ b/newcpu_common.cpp @@ -1059,19 +1059,20 @@ bool m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra) SET_CFLG (0); if (extra & 0x400) { // 32 * 32 = 64 - m68k_dreg (regs, extra & 7) = (uae_u32)(a >> 32); + m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a; + m68k_dreg(regs, extra & 7) = (uae_u32)(a >> 32); SET_ZFLG(a == 0); SET_NFLG(a < 0); } else { // 32 * 32 = 32 uae_s32 b = (uae_s32)a; + m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a; if ((a & UVAL64(0xffffffff80000000)) != 0 && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000)) { SET_VFLG(1); } SET_ZFLG(b == 0); SET_NFLG(b < 0); } - m68k_dreg (regs, (extra >> 12) & 7) = (uae_u32)a; } else { /* unsigned */ uae_u64 a = (uae_u64)(uae_u32)m68k_dreg (regs, (extra >> 12) & 7); @@ -1081,19 +1082,20 @@ bool m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra) SET_CFLG (0); if (extra & 0x400) { // 32 * 32 = 64 - m68k_dreg (regs, extra & 7) = (uae_u32)(a >> 32); + m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a; + m68k_dreg(regs, extra & 7) = (uae_u32)(a >> 32); SET_ZFLG(a == 0); SET_NFLG(((uae_s64)a) < 0); } else { // 32 * 32 = 32 uae_s32 b = (uae_s32)a; + m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a; if ((a & UVAL64(0xffffffff00000000)) != 0) { SET_VFLG(1); } SET_ZFLG(b == 0); SET_NFLG(b < 0); } - m68k_dreg (regs, (extra >> 12) & 7) = (uae_u32)a; } #else if (extra & 0x800) {