From: Aleksey Demakov Date: Sat, 4 Nov 2006 14:57:10 +0000 (+0000) Subject: make comparison opcodes use three-address patterns X-Git-Tag: before.move.to.git~181 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=29c614b74452aaebba447fef8c62f88bc228cf81;p=francis%2Flibjit.git make comparison opcodes use three-address patterns --- diff --git a/ChangeLog b/ChangeLog index 0970924..1dbf7bd 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2006-11-04 Aleksey Demakov + + * jit/jit-rules-x86.ins: make comparison opcodes use three-address + patterns. + 2006-11-01 Aleksey Demakov * jit/jit-reg-alloc.c (commit_input_value, commit_output_value): diff --git a/jit/jit-rules-x86.ins b/jit/jit-rules-x86.ins index 97dd12b..10db6d4 100644 --- a/jit/jit-rules-x86.ins +++ b/jit/jit-rules-x86.ins @@ -1069,151 +1069,151 @@ JIT_OP_BR_IGE_UN: binary_branch * Comparison opcodes. */ -JIT_OP_IEQ: binary - [reg, immzero] -> { - x86_alu_reg_reg(inst, X86_OR, $1, $1); +JIT_OP_IEQ: + [=reg, reg, immzero] -> { + x86_alu_reg_reg(inst, X86_OR, $2, $2); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_EQ, 0); } -JIT_OP_INE: binary - [reg, immzero] -> { - x86_alu_reg_reg(inst, X86_OR, $1, $1); +JIT_OP_INE: + [=reg, reg, immzero] -> { + x86_alu_reg_reg(inst, X86_OR, $2, $2); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_NE, 0); } -JIT_OP_ILT: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_ILT: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 1); } -JIT_OP_ILT_UN: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_ILT_UN: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LT, 0); } -JIT_OP_ILE: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_ILE: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 1); } -JIT_OP_ILE_UN: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_ILE_UN: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_LE, 0); } -JIT_OP_IGT: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_IGT: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 1); } -JIT_OP_IGT_UN: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_IGT_UN: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GT, 0); } -JIT_OP_IGE: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_IGE: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 1); } -JIT_OP_IGE_UN: binary - [reg, imm] -> { - x86_alu_reg_imm(inst, X86_CMP, $1, $2); +JIT_OP_IGE_UN: + [=reg, reg, imm] -> { + x86_alu_reg_imm(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } - [reg, local] -> { - x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2); + [=reg, reg, local] -> { + x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); } - [reg, reg] -> { - x86_alu_reg_reg(inst, X86_CMP, $1, $2); + [=reg, reg, reg] -> { + x86_alu_reg_reg(inst, X86_CMP, $2, $3); inst = setcc_reg(inst, $1, X86_CC_GE, 0); }