From: Toni Wilen Date: Thu, 6 Oct 2022 19:07:35 +0000 (+0300) Subject: Separated two types of CPU emulation functions. (Returns value/returns void) X-Git-Tag: 41000~122 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=43bf50bef2a80fa5cef909799aaad58eab86a214;p=francis%2Fwinuae.git Separated two types of CPU emulation functions. (Returns value/returns void) --- diff --git a/gencpu.cpp b/gencpu.cpp index 440f8713..7dd8dfa4 100644 --- a/gencpu.cpp +++ b/gencpu.cpp @@ -71,7 +71,7 @@ static int pre_ipl; static int opcode_nextcopy; static int disable_noflags; static int do_always_dynamic_cycles; - +static int func_noret; #define GF_APDI 0x00001 #define GF_AD8R 0x00002 @@ -666,7 +666,7 @@ static void returncycles(int cycles) out("return 0;\n"); return; } - if (using_ce || using_ce020) { + if (func_noret) { #if 0 if (tail_ce020 == 0) out("regs.ce020memcycles -= 2 * cpucycleunit; /* T=0 */ \n"); @@ -697,7 +697,7 @@ static void returncycles(int cycles) static void write_return_cycles_none(void) { - if (using_ce || using_ce020) { + if (func_noret) { out("return;\n"); } else { out("return 0;\n"); @@ -9484,29 +9484,43 @@ static void generate_one_opcode (int rp, const char *extra) char *name = ua (lookuptab[idx].name); if (generate_stbl) { #ifdef NOFLAGS_SUPPORT_GENCPU - fprintf(stblfile, "{ %sop_%04x_%d%s_ff, %sop_%04x_%d%s_%s, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", - (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, opcode_last_postfix[rp], extra, - (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, opcode_last_postfix[rp], extra, cputbltmp[opcode].nf ? "nf" : "ff", - opcode, - cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + if (func_noret) { + fprintf(stblfile, "{ NULL, NULL, op_%04x_%d%s_ff, op_%04x_%d%s_%s, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, opcode_last_postfix[rp], extra, + opcode, opcode_last_postfix[rp], extra, cputbltmp[opcode].nf ? "nf" : "ff", + opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } else { + fprintf(stblfile, "{ op_%04x_%d%s_ff, op_%04x_%d%s_%s, NULL, NULL, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, opcode_last_postfix[rp], extra, + opcode, opcode_last_postfix[rp], extra, cputbltmp[opcode].nf ? "nf" : "ff", + opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } #else - fprintf(stblfile, "{ %sop_%04x_%d%s_ff, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", - (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, opcode_last_postfix[rp], extra, - opcode, - cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + if (func_noret) { + fprintf(stblfile, "{ NULL, op_%04x_%d%s_ff, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, opcode_last_postfix[rp], extra, opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } else { + fprintf(stblfile, "{ op_%04x_%d%s_ff, NULL, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, opcode_last_postfix[rp], extra, opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } #endif } xfree (name); return; } fprintf(headerfile, "extern %s op_%04x_%d%s_nf;\n", - (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix, extra); + func_noret ? "cpuop_func_noret" : "cpuop_func", opcode, postfix, extra); + fprintf(headerfile, "extern %s op_%04x_%d%s_ff;\n", - (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix, extra); + func_noret ? "cpuop_func_noret" : "cpuop_func", opcode, postfix, extra); out("/* %s */\n", outopcode (opcode)); if (i68000) out("#ifndef CPUEMU_68000_ONLY\n"); - out("%s REGPARAM2 op_%04x_%d%s_ff(uae_u32 opcode)\n{\n", (using_ce || using_ce020) ? "void" : "uae_u32", opcode, postfix, extra); + out("%s REGPARAM2 op_%04x_%d%s_ff(uae_u32 opcode)\n{\n", func_noret ? "void" : "uae_u32", opcode, postfix, extra); if ((using_simple_cycles || do_always_dynamic_cycles) && !using_nocycles) out("int count_cycles = 0;\n"); @@ -9620,16 +9634,29 @@ static void generate_one_opcode (int rp, const char *extra) if (i68000) fprintf(stblfile, "#ifndef CPUEMU_68000_ONLY\n"); #ifdef NOFLAGS_SUPPORT_GENCPU - fprintf(stblfile, "{ %sop_%04x_%d%s_ff, %sop_%04x_%d%s_%s, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", - (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, postfix, extra, - (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, postfix, extra, nfgenerated ? "nf" : "ff", - opcode, - cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + if (func_noret) { + fprintf(stblfile, "{ NULL, NULL, op_%04x_%d%s_ff, op_%04x_%d%s_%s, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, postfix, extra, + opcode, postfix, extra, nfgenerated ? "nf" : "ff", + opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } else { + fprintf(stblfile, "{ op_%04x_%d%s_ff, op_%04x_%d%s_%s, NULL, NULL, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, postfix, extra, + opcode, postfix, extra, nfgenerated ? "nf" : "ff", + opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } #else - fprintf(stblfile, "{ %sop_%04x_%d%s_ff, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", - (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, postfix, extra, - opcode, - cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + if (func_noret) { + fprintf(stblfile, "{ NULL, op_%04x_%d%s_ff, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, postfix, extra, opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } else { + fprintf(stblfile, "{ op_%04x_%d%s_ff, NULL, 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", + opcode, postfix, extra, opcode, + cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); + } #endif if (i68000) fprintf(stblfile, "#endif\n"); @@ -9945,6 +9972,7 @@ static void generate_cpu (int id, int mode) } do_always_dynamic_cycles = !using_simple_cycles && !using_prefetch && using_always_dynamic_cycles; + func_noret = using_ce || using_ce020; if (!using_indirect) using_indirect = using_ce || using_ce020 || using_prefetch_020 || id >= 50; diff --git a/include/newcpu.h b/include/newcpu.h index 1782cfc9..0f26f467 100644 --- a/include/newcpu.h +++ b/include/newcpu.h @@ -54,13 +54,17 @@ extern int fpp_movem_next[256]; extern int hardware_bus_error; -typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM; -typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM; +typedef uae_u32 REGPARAM3 cpuop_func(uae_u32) REGPARAM; +typedef void REGPARAM3 cpuop_func_noret(uae_u32) REGPARAM; struct cputbl { cpuop_func *handler_ff; #ifdef NOFLAGS_SUPPORT_GENCPU - cpuop_func *handler_nf; + cpuop_func_ret *handler_nf; +#endif + cpuop_func_noret *handler_ff_noret; +#ifdef NOFLAGS_SUPPORT_GENCPU + cpuop_func_ret *handler_nf_noret; #endif uae_u16 opcode; uae_s8 length; @@ -824,7 +828,8 @@ extern const struct cputbl op_smalltbl_55[]; extern const struct cputbl op_smalltbl_12[]; // prefetch extern const struct cputbl op_smalltbl_14[]; // CE -extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl"); +extern cpuop_func_noret *cpufunctbl_noret[65536] ASM_SYM_FOR_FUNC("cpufunctbl_noret"); +extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC("cpufunctbl"); #ifdef JIT extern void (*flush_icache)(int); diff --git a/jit/compemu.h b/jit/compemu.h index e43dfe64..53837d32 100644 --- a/jit/compemu.h +++ b/jit/compemu.h @@ -76,7 +76,7 @@ struct cpu_history { }; union cacheline { - cpuop_func* handler; + cpuop_func *handler; blockinfo_t * bi; }; diff --git a/newcpu.cpp b/newcpu.cpp index 539ef4bc..1034d357 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -116,6 +116,7 @@ int movem_index2[256]; int movem_next[256]; cpuop_func *cpufunctbl[65536]; +cpuop_func_noret *cpufunctbl_noret[65536]; cpuop_func *loop_mode_table[65536]; struct cputbl_data @@ -1783,12 +1784,16 @@ static uae_u32 opcode_swap(uae_u16 opcode) return do_byteswap_16(opcode); } -uae_u32 REGPARAM2 op_illg_1 (uae_u32 opcode) +uae_u32 REGPARAM2 op_illg_1(uae_u32 opcode) { opcode = opcode_swap(opcode); op_illg(opcode); return 4; } +void REGPARAM2 op_illg_1_noret(uae_u32 opcode) +{ + op_illg_1(opcode); +} uae_u32 REGPARAM2 op_unimpl_1 (uae_u32 opcode) { opcode = opcode_swap(opcode); @@ -1798,6 +1803,11 @@ uae_u32 REGPARAM2 op_unimpl_1 (uae_u32 opcode) op_unimpl(opcode); return 4; } +void REGPARAM2 op_unimpl_1_noret(uae_u32 opcode) +{ + op_unimpl_1(opcode); +} + // generic+direct, generic+direct+jit, generic+indirect, more compatible, cycle-exact, mmu, mmu+more compatible, mmu+mc+ce static const struct cputbl *cputbls[6][8] = @@ -1877,11 +1887,14 @@ static void build_cpufunctbl (void) abort (); } - for (opcode = 0; opcode < 65536; opcode++) + for (opcode = 0; opcode < 65536; opcode++) { cpufunctbl[opcode] = op_illg_1; - for (i = 0; tbl[i].handler_ff != NULL; i++) { + cpufunctbl_noret[opcode] = op_illg_1_noret; + } + for (i = 0; tbl[i].handler_ff != NULL || tbl[i].handler_ff_noret != NULL; i++) { opcode = tbl[i].opcode; cpufunctbl[opcode] = tbl[i].handler_ff; + cpufunctbl_noret[opcode] = tbl[i].handler_ff_noret; cpudatatbl[opcode].length = tbl[i].length; cpudatatbl[opcode].disp020[0] = tbl[i].disp020[0]; cpudatatbl[opcode].disp020[1] = tbl[i].disp020[1]; @@ -1891,9 +1904,10 @@ static void build_cpufunctbl (void) /* hack fpu to 68000/68010 mode */ if (currprefs.fpu_model && currprefs.cpu_model < 68020) { tbl = op_smalltbl_3; - for (i = 0; tbl[i].handler_ff != NULL; i++) { + for (i = 0; tbl[i].handler_ff != NULL || tbl[i].handler_ff_noret != NULL; i++) { if ((tbl[i].opcode & 0xfe00) == 0xf200) { cpufunctbl[tbl[i].opcode] = tbl[i].handler_ff; + cpufunctbl_noret[tbl[i].opcode] = tbl[i].handler_ff_noret; cpudatatbl[tbl[i].opcode].length = tbl[i].length; cpudatatbl[tbl[i].opcode].disp020[0] = tbl[i].disp020[0]; cpudatatbl[tbl[i].opcode].disp020[1] = tbl[i].disp020[1]; @@ -1904,7 +1918,6 @@ static void build_cpufunctbl (void) opcnt = 0; for (opcode = 0; opcode < 65536; opcode++) { - cpuop_func *f; struct instr *table = &table68k[opcode]; if (table->mnemo == i_ILLG) @@ -1918,6 +1931,7 @@ static void build_cpufunctbl (void) // generates unimplemented instruction exception. if (currprefs.int_no_unimplemented && table->unimpclev == 5) { cpufunctbl[opcode] = op_unimpl_1; + cpufunctbl_noret[opcode] = op_unimpl_1_noret; continue; } // remove unimplemented instruction that were removed in previous models, @@ -1926,10 +1940,12 @@ static void build_cpufunctbl (void) // clev=4: implemented in 68040 or later. unimpclev=5: not in 68060 if (table->unimpclev < 5 || (table->clev == 4 && table->unimpclev == 5)) { cpufunctbl[opcode] = op_illg_1; + cpufunctbl_noret[opcode] = op_illg_1_noret; continue; } } else { cpufunctbl[opcode] = op_illg_1; + cpufunctbl_noret[opcode] = op_illg_1_noret; continue; } } @@ -1944,10 +1960,10 @@ static void build_cpufunctbl (void) if (table->handler != -1) { int idx = table->handler; - f = cpufunctbl[idx]; - if (f == op_illg_1) + if (cpufunctbl[idx] == op_illg_1 || cpufunctbl_noret[idx] == op_illg_1_noret) abort (); - cpufunctbl[opcode] = f; + cpufunctbl[opcode] = cpufunctbl[idx]; + cpufunctbl_noret[opcode] = cpufunctbl_noret[idx]; memcpy(&cpudatatbl[opcode], &cpudatatbl[idx], sizeof(struct cputbl_data)); opcnt++; } @@ -4816,7 +4832,7 @@ static void m68k_run_1_ce (void) Exception (cputrace.state); } else if (cputrace.state == 1) { write_log (_T("CPU TRACE: %04X\n"), cputrace.opcode); - (*cpufunctbl[cputrace.opcode])(cputrace.opcode); + (*cpufunctbl_noret[cputrace.opcode])(cputrace.opcode); } } else { write_log (_T("CPU TRACE: STOPPED\n")); @@ -4871,7 +4887,7 @@ static void m68k_run_1_ce (void) record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, r->opcode); } - (*cpufunctbl[r->opcode])(r->opcode); + (*cpufunctbl_noret[r->opcode])(r->opcode); if (!regs.loop_mode) regs.ird = regs.opcode; regs.instruction_cnt++; @@ -5661,7 +5677,7 @@ insretry: } else { - (*cpufunctbl[regs.opcode])(regs.opcode); + (*cpufunctbl_noret[regs.opcode])(regs.opcode); wait_memory_cycles(); } @@ -5757,7 +5773,7 @@ static void m68k_run_3ce (void) debug_trainer_match(); } - (*cpufunctbl[r->opcode])(r->opcode); + (*cpufunctbl_noret[r->opcode])(r->opcode); if (r->spcflags) { if (do_specialties (0)) @@ -5804,7 +5820,7 @@ static void m68k_run_3p(void) debug_trainer_match(); } - (*cpufunctbl[r->opcode])(r->opcode); + (*cpufunctbl_noret[r->opcode])(r->opcode); cpu_cycles = 1 * CYCLE_UNIT; cycles = adjust_cycles(cpu_cycles); @@ -5865,7 +5881,7 @@ static void m68k_run_2ce (void) if (cputrace.state > 1) Exception (cputrace.state); else if (cputrace.state == 1) - (*cpufunctbl[cputrace.opcode])(cputrace.opcode); + (*cpufunctbl_noret[cputrace.opcode])(cputrace.opcode); } set_cpu_tracer (false); goto cont; @@ -5943,7 +5959,7 @@ static void m68k_run_2ce (void) debug_trainer_match(); } - (*cpufunctbl[r->opcode])(r->opcode); + (*cpufunctbl_noret[r->opcode])(r->opcode); wait_memory_cycles(); regs.instruction_cnt++;