From: Toni Wilen Date: Sun, 11 Jun 2017 16:11:20 +0000 (+0300) Subject: Rapidfire emulation and some Masoboshi updates. X-Git-Tag: 3500~8 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=4e20c4e27afa397559dbf1a2cf25fb61f2a51fdd;p=francis%2Fwinuae.git Rapidfire emulation and some Masoboshi updates. --- diff --git a/expansion.cpp b/expansion.cpp index a5d5f9dc..22f63a3f 100644 --- a/expansion.cpp +++ b/expansion.cpp @@ -4539,6 +4539,15 @@ const struct expansionromtype expansionroms[] = { 0, 0, 0, false, NULL, false, 0, comspec_settings }, + { + _T("rapidfire"), _T("RapidFire"), _T("DKB"), + ncr_rapidfire_init, NULL, rapidfire_add_scsi_unit, ROMTYPE_RAPIDFIRE, 0, 0, BOARD_AUTOCONFIG_Z2, false, + NULL, 0, + false, EXPANSIONTYPE_SCSI, + 2012, 16, 0, false, NULL, + true, 0, NULL, + { 0xd2, 0x0f ,0x00, 0x00, 0x07, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00 }, + }, { _T("dataflyerscsiplus"), _T("DataFlyer SCSI+"), _T("Expansion Systems"), dataflyer_init, NULL, dataflyer_add_scsi_unit, ROMTYPE_DATAFLYERP | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true, diff --git a/include/ncr9x_scsi.h b/include/ncr9x_scsi.h index 76666be1..f842e4e1 100644 --- a/include/ncr9x_scsi.h +++ b/include/ncr9x_scsi.h @@ -17,6 +17,7 @@ extern void ematrix_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct extern void multievolution_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc); extern void golemfast_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc); extern void scram5394_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc); +extern void rapidfire_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc); extern bool ncr_fastlane_autoconfig_init(struct autoconfig_info *aci); extern bool ncr_oktagon_autoconfig_init(struct autoconfig_info *aci); @@ -24,6 +25,7 @@ extern bool ncr_dkb_autoconfig_init(struct autoconfig_info *aci); extern bool ncr_ematrix_autoconfig_init(struct autoconfig_info *aci); extern bool ncr_multievolution_init(struct autoconfig_info *aci); extern bool ncr_scram5394_init(struct autoconfig_info *aci); +extern bool ncr_rapidfire_init(struct autoconfig_info *aci); extern void cpuboard_ncr9x_scsi_put(uaecptr, uae_u32); extern uae_u32 cpuboard_ncr9x_scsi_get(uaecptr); diff --git a/include/rommgr.h b/include/rommgr.h index d0230cae..f37f692d 100644 --- a/include/rommgr.h +++ b/include/rommgr.h @@ -150,6 +150,7 @@ extern int decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size); #define ROMTYPE_PMX 0x00100060 #define ROMTYPE_COMSPEC 0x00100061 #define ROMTYPE_MALIBU 0x00100062 +#define ROMTYPE_RAPIDFIRE 0x00100063 #define ROMTYPE_NOT 0x00800000 #define ROMTYPE_QUAD 0x01000000 diff --git a/ncr9x_scsi.cpp b/ncr9x_scsi.cpp index ec656cc1..ddcc24eb 100644 --- a/ncr9x_scsi.cpp +++ b/ncr9x_scsi.cpp @@ -99,15 +99,14 @@ struct ncr9x_state void (*irq_func)(struct ncr9x_state*); int led; uaecptr dma_ptr; + bool dma_on; int dma_cnt; - int dma_delay; - int dma_delay_val; uae_u8 states[16]; struct romconfig *rc; struct ncr9x_state **self_ptr; uae_u8 data; - bool data_valid; + bool data_valid_r, data_valid_w; void *eeprom; uae_u8 eeprom_data[512]; bool romisoddonly; @@ -165,6 +164,7 @@ static struct ncr9x_state *ncr_ematrix530_scsi; static struct ncr9x_state *ncr_multievolution_scsi; static struct ncr9x_state *ncr_golemfast_scsi[MAX_DUPLICATE_EXPANSION_BOARDS]; static struct ncr9x_state *ncr_scram5394_scsi[MAX_DUPLICATE_EXPANSION_BOARDS]; +static struct ncr9x_state *ncr_rapidfire_scsi[MAX_DUPLICATE_EXPANSION_BOARDS]; static struct ncr9x_state *ncr_units[MAX_NCR9X_UNITS + 1]; @@ -410,9 +410,9 @@ static int fake2_dma_read(void *opaque, uint8_t *buf, int len) { struct ncr9x_state *ncr = (struct ncr9x_state*)opaque; esp_dma_enable(ncr->devobject.lsistate, 0); - if (ncr->data_valid) { + if (ncr->data_valid_r) { *buf = ncr->data; - ncr->data_valid = false; + ncr->data_valid_r = false; } return 1; } @@ -420,9 +420,9 @@ static int fake2_dma_write(void *opaque, uint8_t *buf, int len) { struct ncr9x_state *ncr = (struct ncr9x_state*)opaque; esp_dma_enable(ncr->devobject.lsistate, 0); - if (!ncr->data_valid) { + if (!ncr->data_valid_w) { ncr->data = *buf; - ncr->data_valid = true; + ncr->data_valid_w = true; return 1; } return 0; @@ -430,6 +430,59 @@ static int fake2_dma_write(void *opaque, uint8_t *buf, int len) /* Following are true DMA */ +static int masoboshi_dma_read(void *opaque, uint8_t *buf, int len) +{ + struct ncr9x_state *ncr = (struct ncr9x_state*)opaque; + if (ncr->dma_on) { + while (len > 0) { + uae_u16 v = get_word(ncr->dma_ptr & ~1); + *buf++ = v >> 8; + len--; + if (len > 0) { + *buf++ = v; + len--; + } + ncr->dma_ptr += 2; + } + return -1; + } else { + esp_dma_enable(ncr->devobject.lsistate, 0); + if (ncr->data_valid_r) { + *buf = ncr->data; + ncr->data_valid_r = false; + } + return 1; + } +} +static int masoboshi_dma_write(void *opaque, uint8_t *buf, int len) +{ + struct ncr9x_state *ncr = (struct ncr9x_state*)opaque; + if (ncr->dma_on) { + while (len > 0) { + uae_u16 v; + v = *buf++; + len--; + v <<= 8; + if (len > 0) { + v |= *buf++; + len--; + } + put_word(ncr->dma_ptr & ~1, v); + ncr->dma_ptr += 2; + } + return -1; + } else { + esp_dma_enable(ncr->devobject.lsistate, 0); + if (!ncr->data_valid_w) { + ncr->data = *buf; + ncr->data_valid_w = true; + return 1; + } + return 0; + } +} + + static int fastlane_dma_read(void *opaque, uint8_t *buf, int len) { struct ncr9x_state *ncr = (struct ncr9x_state*)opaque; @@ -723,25 +776,12 @@ static void ncr9x_io_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val) } else if (isncr(ncr, ncr_masoboshi_scsi)) { - if (addr >= 0xf040 && addr < 0xf048) { - if (addr == 0xf040) - ncr->states[8] = 0; - if (addr == 0xf047) { - // dma start - if (val & 0x80) { - write_log(_T("MASOBOSHI DMA start %08x, %d\n"), ncr->dma_ptr, ncr->dma_cnt); - ncr->dma_delay = (ncr->dma_cnt / maxhpos) * 2; - ncr->dma_delay_val = -1; - } else { - ncr->dma_delay = 0; - } - } - return; - } - - // DMA LEN (words) - if (addr >= 0xf04a && addr < 0xf04c) { - if (addr == 0xf04a) { + if (addr >= 0xf000 && addr < 0xf800) + addr &= ~0x0700; + + // SCSI DMA LEN (words) + if (addr >= 0xf00a && addr < 0xf00c) { + if (addr == 0xf00a) { ncr->dma_cnt &= 0x00ff; ncr->dma_cnt |= val << 8; } else { @@ -751,9 +791,9 @@ static void ncr9x_io_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val) return; } - // DMA PTR - if (addr >= 0xf04c && addr < 0xf050) { - int shift = (addr - 0xf04c) * 8; + // SCSI DMA PTR + if (addr >= 0xf00c && addr < 0xf010) { + int shift = (3 - (addr - 0xf00c)) * 8; uae_u32 mask = 0xff << shift; ncr->dma_ptr &= ~mask; ncr->dma_ptr |= val << shift; @@ -761,27 +801,24 @@ static void ncr9x_io_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val) return; } - if (addr >= 0xf000 && addr <= 0xf007) { + if (addr >= 0xf000 && addr < 0xf008) { ncr->states[addr - 0xf000] = val; if (addr == 0xf000) { ncr->boardirqlatch = false; set_irq2_masoboshi(ncr); } -#if 0 + if (addr == 0xf007) { - ncr->intena = true;//(val & 8) == 0; - ncr9x_rethink(); - } -#endif -#if 0 - if (addr == 0xf047) { // dma start - if (val & 0x80) - ncr->states[2] = 0x80; - } - if (addr == 0xf040) { - ncr->states[2] = 0; + // scsi dma start + ncr->dma_on = false; + if (val & 0x80) { + write_log(_T("MASOBOSHI SCSI DMA %s start %08x, %d\n"), (ncr->states[5] & 0x80) ? _T("READ") : _T("WRITE"), ncr->dma_ptr, ncr->dma_cnt); + ncr->dma_on = true; + esp_dma_enable(ncr->devobject.lsistate, 1); + } else { + esp_dma_enable(ncr->devobject.lsistate, 0); + } } -#endif #if 0 write_log(_T("MASOBOSHI IO %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC); #endif @@ -789,18 +826,12 @@ static void ncr9x_io_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val) } if (addr >= MASOBOSHI_DMA_START && addr < MASOBOSHI_DMA_END) { - if (esp_reg_read(ncr->devobject.lsistate, ESP_RSTAT) & STAT_TC) { #if NCR_DEBUG > 2 - write_log(_T("MASOBOSHI DMA OVERFLOW %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC); + write_log(_T("MASOBOSHI DMA %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC); #endif - } else { - ncr->data = val; - ncr->data_valid = true; - esp_dma_enable(ncr->devobject.lsistate, 1); -#if NCR_DEBUG > 2 - write_log(_T("MASOBOSHI DMA %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC); -#endif - } + ncr->data = val; + ncr->data_valid_r = true; + esp_fake_dma_put(ncr->devobject.lsistate, val); return; } if (addr < MASOBOSHI_ESP_ADDR || addr >= MASOBOSHI_ESP_ADDR + 0x100) { @@ -823,7 +854,7 @@ static void ncr9x_io_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val) memcpy(oktagon_eeprom, ncr->eeprom_data + 0x100, 16); } else if (addr >= OKTAGON_DMA_START && addr < OKTAGON_DMA_END) { ncr->data = val; - ncr->data_valid = true; + ncr->data_valid_r = true; esp_dma_enable(ncr->devobject.lsistate, 1); return; } else if (addr == OKTAGON_INTENA) { @@ -949,6 +980,29 @@ static void ncr9x_io_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val) ncr->led = val; return; } + } else if (isncr(ncr, ncr_rapidfire_scsi)) { + reg_shift = 1; + if (addr == 0x10040) { + ncr->states[0] = val; + esp_dma_enable(ncr->devobject.lsistate, 1); + //write_log(_T("DKB IO PUT %02x %08x\n"), val & 0xff, M68K_GETPC); + return; + } + if (addr >= 0x10020 && addr < 0x10028) { + //write_log(_T("DKB PUT BYTE %02x\n"), val & 0xff); + if (ncr->fakedma_data_offset < ncr->fakedma_data_size) { + ncr->fakedma_data_buf[ncr->fakedma_data_offset++] = val; + if (ncr->fakedma_data_offset == ncr->fakedma_data_size) { + memcpy(ncr->fakedma_data_write_buffer, ncr->fakedma_data_buf, ncr->fakedma_data_size); + esp_fake_dma_done(ncr->devobject.lsistate); + } + } + return; + } + if (addr < 0x10000 || addr >= 0x10020) { + write_log(_T("DKB IO %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC); + return; + } } else if (ISCPUBOARD(BOARD_DKB, BOARD_DKB_SUB_12x0)) { if (addr == 0x10100) { ncr->states[0] = val; @@ -1073,35 +1127,31 @@ static uae_u32 ncr9x_io_bget(struct ncr9x_state *ncr, uaecptr addr) if (addr == MASOBOSHI_ESP_ADDR + 3 * 2 && (ncr->states[0] & 0x80)) return 2; - if (ncr->states[0] & 0x80) - ncr->states[0] &= ~0x80; - if (addr == 0xf040) { + if (addr >= 0xf000 && addr < 0xf800) + addr &= ~0x0700; - if (ncr->dma_delay > 0) { - if (vpos != ncr->dma_delay_val) { - ncr->dma_delay--; - ncr->dma_delay_val = vpos; - if (!ncr->dma_delay) { - ncr->states[8] = 0x80; - } - } - } - v = ncr->states[8]; - return v; - } + if (ncr->states[0] & 0x80) + ncr->states[0] &= ~0x80; - if (addr >= 0xf04c && addr < 0xf050) { - int shift = (addr - 0xf04c) * 8; + if (addr >= 0xf00c && addr < 0xf010) { + int shift = (3 - (addr - 0xf00c)) * 8; uae_u32 mask = 0xff << shift; if (addr == 0xf04f) - write_log(_T("MASOBOSHI DMA PTR READ = %08x %08x\n"), ncr->dma_ptr, M68K_GETPC); + write_log(_T("MASOBOSHI SCSI DMA PTR READ = %08x %08x\n"), ncr->dma_ptr, M68K_GETPC); return ncr->dma_ptr >> shift; } - if (addr >= 0xf048 && addr < 0xf04c) { - write_log(_T("MASOBOSHI DMA %08X GET %02x %08x\n"), addr, v, M68K_GETPC); + if (addr >= 0xf008 && addr < 0xf00c) { + if (addr == 0xf00b) + write_log(_T("MASOBOSHI SCSI DMA LEN READ = %04x %08x\n"), ncr->dma_cnt, v, M68K_GETPC); + if (addr == 0xf00a) + return ncr->dma_cnt >> 8; + if (addr == 0xf00b) + return ncr->dma_cnt >> 0; return v; } + + if (addr >= 0xf000 && addr <= 0xf007) { int idx = addr - 0xf000; if (addr == 0xf000) { @@ -1133,7 +1183,7 @@ static uae_u32 ncr9x_io_bget(struct ncr9x_state *ncr, uaecptr addr) if (addr >= MASOBOSHI_DMA_START && addr < MASOBOSHI_DMA_END) { esp_dma_enable(ncr->devobject.lsistate, 1); v = ncr->data; - ncr->data_valid = false; + ncr->data_valid_w = false; #if NCR_DEBUG > 2 write_log(_T("MASOBOSHI DMA %08X GET %02x %08x\n"), addr, v, M68K_GETPC); #endif @@ -1156,7 +1206,7 @@ static uae_u32 ncr9x_io_bget(struct ncr9x_state *ncr, uaecptr addr) } else if (addr >= OKTAGON_DMA_START && addr < OKTAGON_DMA_END) { esp_dma_enable(ncr->devobject.lsistate, 1); v = ncr->data; - ncr->data_valid = false; + ncr->data_valid_w = false; return v; } else if (addr == OKTAGON_INTENA) { return ncr->states[0]; @@ -1217,6 +1267,33 @@ static uae_u32 ncr9x_io_bget(struct ncr9x_state *ncr, uaecptr addr) } else if (addr >= CYBERSTORM_MK2_LED_OFFSET) { return ncr->led; } + } else if (isncr(ncr, ncr_rapidfire_scsi)) { + reg_shift = 1; + if (addr == 0x10040) { + uae_u8 v = 0; + if (ncr->chipirq || ncr->boardirq) + v |= 0x40; + if (ncr->fakedma_data_offset < ncr->fakedma_data_size) + v |= 0x80; + ncr->boardirq = false; + //write_log(_T("DKB IO GET %02x %08x\n"), v, M68K_GETPC); + return v; + } + if (addr >= 0x10020 && addr < 0x10028) { + //write_log(_T("DKB GET BYTE %02x %08x\n"), ncr->fakedma_data_buf[ncr->fakedma_data_offset], M68K_GETPC); + if (ncr->fakedma_data_offset >= ncr->fakedma_data_size) + return 0; + v = ncr->fakedma_data_buf[ncr->fakedma_data_offset++]; + if (ncr->fakedma_data_offset == ncr->fakedma_data_size) { + esp_fake_dma_done(ncr->devobject.lsistate); + //write_log(_T("DKB fake dma finished\n")); + } + return v; + } + if (addr < 0x10000 || addr >= 0x10020) { + write_log(_T("DKB IO GET %08x %08x\n"), addr, M68K_GETPC); + return 0; + } } else if (ISCPUBOARD(BOARD_DKB, BOARD_DKB_SUB_12x0)) { if (addr == 0x10100) { uae_u8 v = 0; @@ -1905,6 +1982,43 @@ bool ncr_scram5394_init(struct autoconfig_info *aci) return true; } +bool ncr_rapidfire_init(struct autoconfig_info *aci) +{ + const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_RAPIDFIRE); + + if (!aci->doinit) { + aci->autoconfigp = ert->autoconfig; + return true; + } + + struct ncr9x_state *ncr = getscsi(aci->rc); + if (!ncr) + return false; + + ncr->enabled = true; + memset (ncr->acmemory, 0xff, sizeof ncr->acmemory); + ncr->rom_start = 0; + ncr->rom_offset = 0; + ncr->rom_end = DKB_ROM_SIZE * 2; + ncr->io_start = 0x10000; + ncr->io_end = 0x20000; + ncr->bank = &ncr9x_bank_generic; + ncr->board_mask = 131071; + + ncr9x_reset_board(ncr); + + ncr->rom = xcalloc (uae_u8, DKB_ROM_SIZE * 2); + load_rom_rc(aci->rc, ROMTYPE_RAPIDFIRE, 32768, 0, ncr->rom, 65536, LOADROM_EVENONLY | LOADROM_FILL); + for (int i = 0; i < 16; i++) { + uae_u8 b = ert->autoconfig[i]; + ew(ncr, i * 4, b); + } + + aci->addrbank = ncr->bank; + return true; +} + + static void ncr9x_esp_scsi_init(struct ncr9x_state *ncr, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write, void (*irq_func)(struct ncr9x_state*), int mode) { ncr->board_mask = 0xffff; @@ -2022,7 +2136,7 @@ void oktagon_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romcon void masoboshi_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc) { ncr9x_add_scsi_unit(&ncr_masoboshi_scsi[ci->controller_type_unit], ch, ci, rc); - ncr9x_esp_scsi_init(ncr_masoboshi_scsi[ci->controller_type_unit], fake2_dma_read, fake2_dma_write, set_irq2_masoboshi, 0); + ncr9x_esp_scsi_init(ncr_masoboshi_scsi[ci->controller_type_unit], masoboshi_dma_read, masoboshi_dma_write, set_irq2_masoboshi, 0); } void ematrix_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc) @@ -2053,4 +2167,11 @@ void scram5394_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romco esp_dma_enable(ncr_scram5394_scsi[ci->controller_type_unit]->devobject.lsistate, 1); } +void rapidfire_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc) +{ + ncr9x_add_scsi_unit(&ncr_rapidfire_scsi[ci->controller_type_unit], ch, ci, rc); + ncr9x_esp_scsi_init(ncr_rapidfire_scsi[ci->controller_type_unit], fake_dma_read, fake_dma_write, set_irq2, 0); + esp_dma_enable(ncr_rapidfire_scsi[ci->controller_type_unit]->devobject.lsistate, 1); +} + #endif diff --git a/rommgr.cpp b/rommgr.cpp index 0972a4df..d51b234f 100644 --- a/rommgr.cpp +++ b/rommgr.cpp @@ -95,7 +95,7 @@ struct romdata *getromdatabypath (const TCHAR *path) return NULL; } -#define NEXT_ROM_ID 207 +#define NEXT_ROM_ID 208 #define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \ { _T("X"), 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, NULL, crc32, a, b, c, d, e }, @@ -382,6 +382,8 @@ static struct romdata roms[] = { { _T("DKB 12x0"), 1, 23, 1, 23, _T("DKB\0"), 32768, 112, 0, 0, ROMTYPE_CB_DKB12x0, 0, 0, NULL, 0xf3b2b0b3, 0x1d539593,0xb1d7514e,0xeb214ab3,0x433a97fc,0x8a010366, NULL, NULL }, + { _T("DKB Rapidfire v1.31"), 1, 31, 1, 31, _T("RAPIDFIRE\0"), 11284, 207, 0, 0, ROMTYPE_RAPIDFIRE, 0, 0, NULL, + 0x68725e50, 0xa66f8ef6,0x901e0e41,0xf8b72bba,0x12165788,0xa452cf01, NULL, NULL }, { _T("Fusion Forty"), 0, 0, 0, 0, _T("FUSIONFORTY\0"), 131072, 113, 0, 0, ROMTYPE_CB_FUSION, 0, 0, NULL, 0x48fcb5fd, 0x15674dac,0x90b6d8db,0xdda3a175,0x997184c2,0xa423d733, NULL, NULL }, ALTROMPN(113, 1, 1, 32768, ROMTYPE_QUAD | ROMTYPE_EVEN | ROMTYPE_8BIT, _T("U28"), 0x434a21a8, 0x472c1623, 0x02babd00, 0x7c1a77ff, 0x40dd12ab, 0x39c97f82) @@ -453,7 +455,7 @@ static struct romdata roms[] = { 0x1cfb0a0b, 0xc7275eda,0x547d6664,0x5c4eb7a0,0x3b5cef37,0xa498365a, NULL, NULL }, { _T("AlfaPower v8.3"), 8, 3, 8, 3, _T("ALFAPOWERPLUS\0"), 32768, 118, 0, 0, ROMTYPE_ALFAPLUS, 0, 0, NULL, 0xe8201bad, 0xdefea015,0x596fce32,0x11e84397,0x23046a31,0x5a7726dc, NULL, NULL }, - { _T("Masoboshi MC-702"), 2, 201, 2, 201, _T("MASOBOSHI\0"), 32768, 120, 0, 0, ROMTYPE_MASOBOSHI, 0, 0, NULL, + { _T("Masoboshi MC-702 v2.201"), 2, 201, 2, 201, _T("MASOBOSHI\0"), 32768, 120, 0, 0, ROMTYPE_MASOBOSHI, 0, 0, NULL, 0xcd99b98a, 0x3897e46a,0x66d5833f,0x849b8e81,0x30acb3cb,0x319a2fa0, NULL, NULL }, { _T("Roctec RocHard RH800C v1"), 1, 0, 1, 0, _T("ROCHARD\0"), 16384, 138, 0, 0, ROMTYPE_ROCHARD, 0, 0, NULL, 0x0e980aec, 0xbcafa14d,0xe80576cb,0xe3e0c638,0x1ca90379,0xe078a8bd, NULL, NULL },