From: Toni Wilen Date: Sat, 6 Sep 2014 11:26:02 +0000 (+0300) Subject: Memory bank subdivide support. X-Git-Tag: 3000~61 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=512f4d7cf4fe1c016bfb47332972fabeb68c87dd;p=francis%2Fwinuae.git Memory bank subdivide support. --- diff --git a/arcadia.cpp b/arcadia.cpp index bf379ee7..77642446 100644 --- a/arcadia.cpp +++ b/arcadia.cpp @@ -329,7 +329,7 @@ static addrbank arcadia_boot_bank = { arbb_lput, arbb_wput, arbb_bput, arbb_xlate, arbb_check, NULL, NULL, _T("Arcadia BIOS"), arbb_lget, arbb_wget, ABFLAG_ROM | ABFLAG_SAFE, - arbb_mask + NULL, arbb_mask }; static uae_u32 REGPARAM2 arb_lget (uaecptr addr) @@ -409,7 +409,7 @@ static addrbank arcadia_rom_bank = { arb_lput, arb_wput, arb_bput, arb_xlate, arb_check, NULL, NULL, _T("Arcadia Game ROM"), arb_lget, arb_wget, ABFLAG_ROM | ABFLAG_SAFE, - arb_mask + NULL, arb_mask }; diff --git a/cia.cpp b/cia.cpp index e7171e20..caa23d90 100644 --- a/cia.cpp +++ b/cia.cpp @@ -1600,7 +1600,7 @@ addrbank cia_bank = { cia_lget, cia_wget, cia_bget, cia_lput, cia_wput, cia_bput, default_xlate, default_check, NULL, NULL, _T("CIA"), - cia_lgeti, cia_wgeti, ABFLAG_IO, 0x3f01, 0xbfc000 + cia_lgeti, cia_wgeti, ABFLAG_IO, NULL, 0x3f01, 0xbfc000 }; // Gayle or Fat Gary does not enable CIA /CS lines if both CIAs are selected @@ -1902,7 +1902,7 @@ addrbank clock_bank = { clock_lget, clock_wget, clock_bget, clock_lput, clock_wput, clock_bput, default_xlate, default_check, NULL, NULL, _T("Battery backed up clock (none)"), - dummy_lgeti, dummy_wgeti, ABFLAG_IO, 0x3f, 0xd80000 + dummy_lgeti, dummy_wgeti, ABFLAG_IO, NULL, 0x3f, 0xd80000 }; static unsigned int clock_control_d; diff --git a/custom.cpp b/custom.cpp index a1bb0bf0..383a92c1 100644 --- a/custom.cpp +++ b/custom.cpp @@ -8268,7 +8268,7 @@ addrbank custom_bank = { custom_lget, custom_wget, custom_bget, custom_lput, custom_wput, custom_bput, default_xlate, default_check, NULL, NULL, _T("Custom chipset"), - custom_lgeti, custom_wgeti, ABFLAG_IO, 0x1ff, 0xdff000 + custom_lgeti, custom_wgeti, ABFLAG_IO, NULL, 0x1ff, 0xdff000 }; static uae_u32 REGPARAM2 custom_wgeti (uaecptr addr) diff --git a/debug.cpp b/debug.cpp index 2cdb1f86..cd2b1c01 100644 --- a/debug.cpp +++ b/debug.cpp @@ -2938,11 +2938,10 @@ static void memory_map_dump_3(UaeMemoryMap *map, int log) TCHAR size_ext; uae_u8 *caddr; TCHAR tmp[MAX_DPATH]; - const TCHAR *name = a1->name; - if (name == NULL) { - name = _T(""); - } + struct addrbank_sub *sb = a1->sub_banks; + int bankoffset = 0; + int region_size; k = j; caddr = dump_xlate (k << 16); @@ -2956,65 +2955,96 @@ static void memory_map_dump_3(UaeMemoryMap *map, int log) mirrored2 = mirrored; if (mirrored2 == 0) mirrored2 = 1; - size = (i - j) << (16 - 10); - size_out = size; - size_ext = 'K'; - if (j >= 256 && (size_out / mirrored2 >= 1024) && !((size_out / mirrored2) & 1023)) { - size_out /= 1024; - size_ext = 'M'; - } + + while (bankoffset < 65536) { + int bankoffset2 = bankoffset; + if (sb) { + uaecptr daddr; + if (!sb->bank) + break; + daddr = (j << 16) | bankoffset; + a1 = get_sub_bank(&daddr); + name = a1->name; + for (;;) { + bankoffset2++; + if (bankoffset2 >= 65536) + break; + daddr = (j << 16) | bankoffset2; + addrbank *dab = get_sub_bank(&daddr); + if (dab != a1) + break; + } + sb++; + size = (bankoffset2 - bankoffset) / 1024; + region_size = size * 1024; + } else { + size = (i - j) << (16 - 10); + region_size = ((i - j) << 16) / mirrored2; + } + + if (name == NULL) + name = _T(""); + + size_out = size; + size_ext = 'K'; + if (j >= 256 && (size_out / mirrored2 >= 1024) && !((size_out / mirrored2) & 1023)) { + size_out /= 1024; + size_ext = 'M'; + } #if 1 - _stprintf (txt, _T("%08X %7d%c/%d = %7d%c %s"), j << 16, size_out, size_ext, - mirrored, mirrored ? size_out / mirrored : size_out, size_ext, name); + _stprintf (txt, _T("%08X %7d%c/%d = %7d%c %s"), (j << 16) | bankoffset, size_out, size_ext, + mirrored, mirrored ? size_out / mirrored : size_out, size_ext, name); #endif - tmp[0] = 0; - if (a1->flags == ABFLAG_ROM && mirrored) { - TCHAR *p = txt + _tcslen (txt); - uae_u32 crc = get_crc32 (a1->xlateaddr(j << 16), (size * 1024) / mirrored); - struct romdata *rd = getromdatabycrc (crc); - _stprintf (p, _T(" (%08X)"), crc); - if (rd) { - tmp[0] = '='; - getromname (rd, tmp + 1); - _tcscat (tmp, _T("\n")); + tmp[0] = 0; + if (a1->flags == ABFLAG_ROM && mirrored) { + TCHAR *p = txt + _tcslen (txt); + uae_u32 crc = get_crc32 (a1->xlateaddr((j << 16) | bankoffset), (size * 1024) / mirrored); + struct romdata *rd = getromdatabycrc (crc); + _stprintf (p, _T(" (%08X)"), crc); + if (rd) { + tmp[0] = '='; + getromname (rd, tmp + 1); + _tcscat (tmp, _T("\n")); + } } - } - int region_size = ((i - j) << 16) / mirrored2; - for (int m = 0; m < mirrored2; m++) { - UaeMemoryRegion *r = &map->regions[map->num_regions]; - r->start = (j << 16) + region_size * m; - r->size = region_size; - r->flags = 0; - r->memory = NULL; - if (mirrored > 0) { - r->flags |= UAE_MEMORY_REGION_RAM; - r->memory = caddr; - } - /* just to make it easier to spot in debugger */ - r->alias = 0xffffffff; - if (m >= 0) { - r->alias = j << 16; - r->flags |= UAE_MEMORY_REGION_ALIAS | UAE_MEMORY_REGION_MIRROR; + for (int m = 0; m < mirrored2; m++) { + UaeMemoryRegion *r = &map->regions[map->num_regions]; + r->start = (j << 16) + bankoffset + region_size * m; + r->size = region_size; + r->flags = 0; + r->memory = NULL; + r->memory = dump_xlate((j << 16) | bankoffset); + if (r->memory) + r->flags |= UAE_MEMORY_REGION_RAM; + /* just to make it easier to spot in debugger */ + r->alias = 0xffffffff; + if (m >= 0) { + r->alias = j << 16; + r->flags |= UAE_MEMORY_REGION_ALIAS | UAE_MEMORY_REGION_MIRROR; + } + _stprintf(r->name, _T("%s"), name); + _stprintf(r->rom_name, _T("%s"), tmp); + map->num_regions += 1; } - _stprintf(r->name, _T("%s"), name); - _stprintf(r->rom_name, _T("%s"), tmp); - map->num_regions += 1; - } #if 1 - _tcscat (txt, _T("\n")); - if (log) - write_log (txt); - else - console_out (txt); - if (tmp[0]) { - if (log) - write_log (tmp); - else - console_out (tmp); - } + _tcscat (txt, _T("\n")); + if (log > 0) + write_log (txt); + else if (log == 0) + console_out (txt); + if (tmp[0]) { + if (log > 0) + write_log (tmp); + else if (log == 0) + console_out (tmp); + } #endif + if (!sb) + break; + bankoffset = bankoffset2; + } j = i; a1 = a2; } @@ -3024,7 +3054,7 @@ static void memory_map_dump_3(UaeMemoryMap *map, int log) void uae_memory_map(UaeMemoryMap *map) { - memory_map_dump_3(map, 0); + memory_map_dump_3(map, -1); } static void memory_map_dump_2 (int log) diff --git a/gayle.cpp b/gayle.cpp index c411da8a..a375708e 100644 --- a/gayle.cpp +++ b/gayle.cpp @@ -1779,11 +1779,6 @@ int gary_toenb; static void mbres_write (uaecptr addr, uae_u32 val, int size) { - if ((addr & 0xffff) >= 0x8000) { - dummy_put(addr, size, val); - return; - } - addr &= 0xffff; if (MBRES_LOG > 0) write_log (_T("MBRES_WRITE %08X=%08X (%d) PC=%08X S=%d\n"), addr, val, size, M68K_GETPC, regs.s); @@ -1807,9 +1802,6 @@ static uae_u32 mbres_read (uaecptr addr, int size) { uae_u32 v = 0; - if ((addr & 0xffff) >= 0x8000) - return dummy_get(addr, size, false); - addr &= 0xffff; if (1 || regs.s) { /* CPU FC = supervisor only (only newest ramsey/gary? never implemented?) */ @@ -1916,13 +1908,26 @@ static void REGPARAM2 mbres_bput (uaecptr addr, uae_u32 value) mbres_write (addr, value, 1); } -addrbank mbres_bank = { +static addrbank mbres_sub_bank = { mbres_lget, mbres_wget, mbres_bget, mbres_lput, mbres_wput, mbres_bput, default_xlate, default_check, NULL, NULL, _T("Motherboard Resources"), dummy_lgeti, dummy_wgeti, ABFLAG_IO }; +static struct addrbank_sub mbres_sub_banks[] = { + { &mbres_sub_bank, 0x0000 }, + { &dummy_bank, 0x8000 }, + { NULL } +}; + +addrbank mbres_bank = { + sub_bank_lget, sub_bank_wget, sub_bank_bget, + sub_bank_lput, sub_bank_wput, sub_bank_bput, + sub_bank_xlate, sub_bank_check, NULL, NULL, _T("Motherboard Resources"), + sub_bank_lgeti, sub_bank_wgeti, ABFLAG_IO, mbres_sub_banks +}; + void gayle_hsync (void) { int i; diff --git a/include/memory.h b/include/memory.h index 8723129f..6f647df9 100644 --- a/include/memory.h +++ b/include/memory.h @@ -94,12 +94,22 @@ typedef struct { /* for instruction opcode/operand fetches */ mem_get_func lgeti, wgeti; int flags; + struct addrbank_sub *sub_banks; uae_u32 mask; uae_u32 startmask; uae_u32 start; uae_u32 allocated; } addrbank; +struct addrbank_sub +{ + addrbank *bank; + uae_u32 offset; + uae_u32 suboffset; + uae_u32 mask; + uae_u32 maskval; +}; + #define CE_MEMBANK_FAST32 0 #define CE_MEMBANK_CHIP16 1 #define CE_MEMBANK_CHIP32 2 @@ -349,6 +359,19 @@ extern uae_u8 *REGPARAM3 default_xlate(uaecptr addr) REGPARAM; extern uae_u32 REGPARAM3 dummy_lgeti (uaecptr addr) REGPARAM; extern uae_u32 REGPARAM3 dummy_wgeti (uaecptr addr) REGPARAM; +/* sub bank support */ +extern uae_u32 REGPARAM3 sub_bank_lget (uaecptr) REGPARAM; +extern uae_u32 REGPARAM3 sub_bank_wget(uaecptr) REGPARAM; +extern uae_u32 REGPARAM3 sub_bank_bget(uaecptr) REGPARAM; +extern void REGPARAM3 sub_bank_lput(uaecptr, uae_u32) REGPARAM; +extern void REGPARAM3 sub_bank_wput(uaecptr, uae_u32) REGPARAM; +extern void REGPARAM3 sub_bank_bput(uaecptr, uae_u32) REGPARAM; +extern uae_u32 REGPARAM3 sub_bank_lgeti(uaecptr) REGPARAM; +extern uae_u32 REGPARAM3 sub_bank_wgeti(uaecptr) REGPARAM; +extern int REGPARAM3 sub_bank_check(uaecptr addr, uae_u32 size) REGPARAM; +extern uae_u8 *REGPARAM3 sub_bank_xlate(uaecptr addr) REGPARAM; +extern addrbank *get_sub_bank(uaecptr *addr); + #define bankindex(addr) (((uaecptr)(addr)) >> 16) extern addrbank *mem_banks[MEMORY_BANKS]; diff --git a/memory.cpp b/memory.cpp index c4ac72f9..02e10f3f 100644 --- a/memory.cpp +++ b/memory.cpp @@ -384,6 +384,80 @@ static uae_u32 REGPARAM2 ones_get (uaecptr addr) return 0xffffffff; } +addrbank *get_sub_bank(uaecptr *paddr) +{ + int i; + uaecptr addr = *paddr; + addrbank *ab = &get_mem_bank(addr); + struct addrbank_sub *sb = ab->sub_banks; + if (!sb) + return &dummy_bank; + for (i = 0; sb[i].bank; i++) { + int offset = addr & 65535; + if (offset < sb[i + 1].offset) { + uae_u32 mask = sb[i].mask; + uae_u32 maskval = sb[i].maskval; + if ((offset & mask) == maskval) { + *paddr = addr - sb[i].suboffset; + return sb[i].bank; + } + } + } + *paddr = addr - sb[i - 1].suboffset; + return sb[i - 1].bank; +} +uae_u32 REGPARAM3 sub_bank_lget (uaecptr addr) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->lget(addr); +} +uae_u32 REGPARAM3 sub_bank_wget(uaecptr addr) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->wget(addr); +} +uae_u32 REGPARAM3 sub_bank_bget(uaecptr addr) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->bget(addr); +} +void REGPARAM3 sub_bank_lput(uaecptr addr, uae_u32 v) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + ab->lput(addr, v); +} +void REGPARAM3 sub_bank_wput(uaecptr addr, uae_u32 v) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + ab->wput(addr, v); +} +void REGPARAM3 sub_bank_bput(uaecptr addr, uae_u32 v) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + ab->bput(addr, v); +} +uae_u32 REGPARAM3 sub_bank_lgeti(uaecptr addr) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->lgeti(addr); +} +uae_u32 REGPARAM3 sub_bank_wgeti(uaecptr addr) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->wgeti(addr); +} +int REGPARAM3 sub_bank_check(uaecptr addr, uae_u32 size) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->check(addr, size); +} +uae_u8 *REGPARAM3 sub_bank_xlate(uaecptr addr) REGPARAM +{ + addrbank *ab = get_sub_bank(&addr); + return ab->xlateaddr(addr); +} + + /* Chip memory */ static uae_u32 chipmem_full_mask; diff --git a/ncr9x_scsi.cpp b/ncr9x_scsi.cpp index 155dbcc4..132a0108 100644 --- a/ncr9x_scsi.cpp +++ b/ncr9x_scsi.cpp @@ -30,6 +30,7 @@ #include "qemuvga/queue.h" #include "qemuvga/scsi/scsi.h" #include "qemuvga/scsi/esp.h" +#include "gui.h" #define FASTLANE_BOARD_SIZE (2 * 16777216) #define FASTLANE_ROM_SIZE 32768 @@ -392,6 +393,9 @@ int32_t scsiesp_req_enqueue(SCSIRequest *req) { struct scsi_data *sd = (struct scsi_data*)req->dev->handle; + if (sd->device_type == UAEDEV_CD) + gui_flicker_led (LED_CD, sd->id, 1); + sd->data_len = 0; scsi_start_transfer(sd); scsi_emulate_analyze(sd); diff --git a/ncr_scsi.cpp b/ncr_scsi.cpp index 7a3a350f..e07b6bcb 100644 --- a/ncr_scsi.cpp +++ b/ncr_scsi.cpp @@ -28,6 +28,7 @@ #include "qemuvga/qemuuaeglue.h" #include "qemuvga/queue.h" #include "qemuvga/scsi/scsi.h" +#include "gui.h" #define BOARD_SIZE 16777216 #define IO_MASK 0xff @@ -249,6 +250,9 @@ int32_t scsi710_req_enqueue(SCSIRequest *req) { struct scsi_data *sd = (struct scsi_data*)req->dev->handle; + if (sd->device_type == UAEDEV_CD) + gui_flicker_led (LED_CD, sd->id, 1); + sd->data_len = 0; scsi_start_transfer (sd); scsi_emulate_analyze (sd); @@ -658,13 +662,39 @@ static addrbank ncr_bank_warpengine = { dummy_lgeti, dummy_wgeti, ABFLAG_IO }; -addrbank ncr_bank_cyberstorm = { +static addrbank ncr_bank_cs_scsi_ram = { + cs_lget, cs_wget, cs_bget, + cs_lput, cs_wput, cs_bput, + cyberstorm_scsi_ram_xlate, cyberstorm_scsi_ram_check, NULL, NULL, _T("CyberStorm SCSI RAM"), + cs_lget, cs_wget, ABFLAG_IO +}; +static addrbank ncr_bank_cs_scsi_io = { cs_lget, cs_wget, cs_bget, cs_lput, cs_wput, cs_bput, - cyberstorm_scsi_ram_xlate, cyberstorm_scsi_ram_check, NULL, NULL, _T("CyberStorm SCSI"), + default_xlate, default_check, NULL, NULL, _T("CyberStorm SCSI IO"), dummy_lgeti, dummy_wgeti, ABFLAG_IO }; +static struct addrbank_sub ncr_sub_bank_cs[] = { + { &ncr_bank_cs_scsi_io, 0x0000, 0x0000 }, + { &ncr_bank_cs_scsi_ram, 0x1000, 0x0000 }, + { &ncr_bank_cs_scsi_ram, 0x3000, 0x2000 }, + { &ncr_bank_cs_scsi_ram, 0x5000, 0x4000 }, + { &ncr_bank_cs_scsi_ram, 0x7000, 0x6000 }, + { &ncr_bank_cs_scsi_ram, 0x9000, 0x8000 }, + { &ncr_bank_cs_scsi_ram, 0xb000, 0xa000 }, + { &ncr_bank_cs_scsi_ram, 0xd000, 0xc000 }, + { &ncr_bank_cs_scsi_ram, 0xf000, 0xe000 }, + { NULL } +}; + +addrbank ncr_bank_cyberstorm = { + sub_bank_lget, sub_bank_wget, sub_bank_bget, + sub_bank_lput, sub_bank_wput, sub_bank_bput, + sub_bank_xlate, sub_bank_check, NULL, NULL, _T("CyberStorm SCSI"), + sub_bank_lgeti, sub_bank_wgeti, ABFLAG_IO, ncr_sub_bank_cs +}; + addrbank ncr_bank_blizzardppc = { bppc_lget, bppc_wget, bppc_bget, bppc_lput, bppc_wput, bppc_bput,