From: Toni Wilen Date: Sat, 21 Apr 2018 10:43:54 +0000 (+0300) Subject: 4000b4 X-Git-Tag: 4000~106 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=5723d45a866dd3ebcdaa3a02068b65195181660f;p=francis%2Fwinuae.git 4000b4 --- diff --git a/autoconf.cpp b/autoconf.cpp index 9e2b6bac..269501f7 100644 --- a/autoconf.cpp +++ b/autoconf.cpp @@ -372,7 +372,7 @@ void df(uae_u8 b, int len) uae_u8 dbg (uaecptr addr) { - addr -= rtarea_base; + addr &= 0xffff; return rtarea_bank.baseaddr[addr]; } diff --git a/flashrom.cpp b/flashrom.cpp index 4ce20c15..62defd7b 100644 --- a/flashrom.cpp +++ b/flashrom.cpp @@ -53,11 +53,15 @@ void eeprom93xx_write(void *eepromp, int eecs, int eesk, int eedi) uint16_t address = eeprom->address; uint8_t command = eeprom->command; - //write_log("CS=%u SK=%u DI=%u DO=%u, tick = %u\n", eecs, eesk, eedi, eedo, tick); +#if EEPROM_LOG + write_log("CS=%u SK=%u DI=%u DO=%u, tick = %u\n", eecs, eesk, eedi, eedo, tick); +#endif if (!eeprom->eecs && eecs) { /* Start chip select cycle. */ - //write_log("Cycle start, waiting for 1st start bit (0)\n"); +#if EEPROM_LOG + write_log("Cycle start, waiting for 1st start bit (0)\n"); +#endif tick = 0; command = 0x0; address = 0x0; @@ -97,11 +101,15 @@ void eeprom93xx_write(void *eepromp, int eecs, int eesk, int eedi) if (tick == 0) { /* Wait for 1st start bit. */ if (eedi == 0) { - //write_log("Got correct 1st start bit, waiting for 2nd start bit (1)\n"); +#if EEPROM_LOG + write_log("Got correct 1st start bit, waiting for 2nd start bit (1)\n"); +#endif tick++; } else { - //write_log("wrong 1st start bit (is 1, should be 0)\n"); +#if EEPROM_LOG + write_log("wrong 1st start bit (is 1, should be 0)\n"); +#endif tick = 2; //~ assert(!"wrong start bit"); } @@ -109,11 +117,16 @@ void eeprom93xx_write(void *eepromp, int eecs, int eesk, int eedi) else if (tick == 1) { /* Wait for 2nd start bit. */ if (eedi != 0) { - //write_log("Got correct 2nd start bit, getting command + address\n"); +#if EEPROM_LOG + write_log("Got correct 2nd start bit, getting command + address\n"); +#endif tick++; } else { - ;//write_log("1st start bit is longer than needed\n"); +#if EEPROM_LOG + + write_log("1st start bit is longer than needed\n"); +#endif } } else if (tick < 2 + 2) { @@ -129,7 +142,9 @@ void eeprom93xx_write(void *eepromp, int eecs, int eesk, int eedi) tick++; address = ((address << 1) | eedi); if (tick == 2 + 2 + eeprom->addrbits) { - //write_log("%s command, address = 0x%02x (value 0x%04x)\n", opstring[command], address, eeprom->contents[address]); +#if EEPROM_LOG + write_log("%s command, address = 0x%02x (value 0x%04x)\n", opstring[command], address, eeprom->contents[address]); +#endif if (command == 2) { eedo = 0; } @@ -138,17 +153,25 @@ void eeprom93xx_write(void *eepromp, int eecs, int eesk, int eedi) /* Command code in upper 2 bits of address. */ switch (address >> (eeprom->addrbits - 2)) { case 0: - //write_log("write disable command\n"); +#if EEPROM_LOG + write_log("write disable command\n"); +#endif eeprom->writeable = 0; break; case 1: - //write_log("write all command\n"); +#if EEPROM_LOG + write_log("write all command\n"); +#endif break; case 2: - //write_log("erase all command\n"); +#if EEPROM_LOG + write_log("erase all command\n"); +#endif break; case 3: - //write_log("write enable command\n"); +#if EEPROM_LOG + write_log("write enable command\n"); +#endif eeprom->writeable = 1; break; } @@ -170,7 +193,9 @@ void eeprom93xx_write(void *eepromp, int eecs, int eesk, int eedi) eeprom->data += eedi; } else { - ;//write_log("additional unneeded tick, not processed\n"); +#if EEPROM_LOG + write_log("additional unneeded tick, not processed\n"); +#endif } } /* Save status of EEPROM. */ @@ -186,7 +211,9 @@ uae_u16 eeprom93xx_read(void *eepromp) { eeprom93xx_eeprom_t *eeprom = (eeprom93xx_eeprom_t*)eepromp; /* Return status of pin DO (0 or 1). */ - //write_log("CS=%u DO=%u\n", eeprom->eecs, eeprom->eedo); +#if EEPROM_LOG + write_log("CS=%u DO=%u\n", eeprom->eecs, eeprom->eedo); +#endif return eeprom->eedo; } diff --git a/od-win32/resources/winuae.rc b/od-win32/resources/winuae.rc index fad27c7a..74b4e840 100644 --- a/od-win32/resources/winuae.rc +++ b/od-win32/resources/winuae.rc @@ -2100,8 +2100,8 @@ BEGIN IDS_PORT_AUTOFIRE_ALWAYS "Autofire (always)" IDS_PORT_AUTOFIRE_NO "No autofire" IDS_AUTOSCALE_INTEGER "Integer scaling" - IDS_SCREEN_VSYNC2_AUTOSWITCH "Low latency VS, 50/60Hz" - IDS_SCREEN_VSYNC2 "Low latency VSync" + IDS_SCREEN_VSYNC2_AUTOSWITCH "Lagless VS (BR), 50/60Hz" + IDS_SCREEN_VSYNC2 "Lagless VSync (Beamraced)" IDS_SCREEN_VSYNC_NONE "-" IDS_FILTEROVERLAYTYPE_MASKS "Masks" IDS_FILTEROVERLAYTYPE_OVERLAYS "Overlays" diff --git a/od-win32/win32.h b/od-win32/win32.h index 51358f35..78e7f5db 100644 --- a/od-win32/win32.h +++ b/od-win32/win32.h @@ -20,12 +20,12 @@ #define LANG_DLL_FULL_VERSION_MATCH 1 #if WINUAEPUBLICBETA -#define WINUAEBETA _T("3") +#define WINUAEBETA _T("4") #else #define WINUAEBETA _T("") #endif -#define WINUAEDATE MAKEBD(2018, 4, 18) +#define WINUAEDATE MAKEBD(2018, 4, 21) //#define WINUAEEXTRA _T("AmiKit Preview") //#define WINUAEEXTRA _T("Amiga Forever Edition") diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt index 40546bb7..3f70d583 100644 --- a/od-win32/winuaechangelog.txt +++ b/od-win32/winuaechangelog.txt @@ -1,9 +1,32 @@ -JIT Direct current rules are less complex now. It automatically switches off only in following situations: - - Accelerator mirrored maprom address space is not JIT Direct compatible. (CyberStorm, Blizzards etc) - - RTG VRAM is outside of reserved natmem space. Workaround: Move RTG in earlier position using Hardware info GUI panel. - Note that in 64-bit version RTG VRAM must be inside of reserved natmem space. (Outside = error message and return back to GUI) +Beta 4: + +- Show only every 10th frame in D3D11 warp mode. For some reason Present() blocks if rate is higher than current max monitor refresh rate, not even DXGI_PRESENT_ALLOW_TEARING or DXGI_PRESENT_DO_NOT_WAIT help. +- Normal windowed D3D11 vsync mode should work correctly again. +- Default WASAPI audio device now follows Windows default audio device if default gets changed and emulation is already running. +- Renamed new low latency vsync to official "Lagless VSYNC (Beamraced)". +- Flip first slice early, before vblank (Early flip won't cause tearing as long as it happens during last slice). This should fix tearing in topmost slice when flip gets delayed (which for some unknown reason seems to regularly happen if flipping is done during vblank). This change makes last debug color bar shorter which is normal. +- Use NtDelayExecution and ZwSetTimerResolution (if available) for sub 1ms delays in non-fastest possible CPU low latency vsync modes. +- Replaced FastLane ROM with full 32k dump. +- Emulated (partially) C-Ltd Kronos. +- Removed CDTV SCSI from Advanced Chipset. It is optional hardware module and should be only in Expansion panel. Old CDTV SCSI configured config files are still supported but this and future versions won't write old CDTV SCSI config file entry to config file anymore. + +C-Ltd Kronos: +- 5380 based SCSI controller with buffer RAM. +- Boot ROM added ("CLtd RomBoot 3.4, Copyright 1989, Wayne E. Miller") +- Boot ROM is only small driver loader from drive's custom partition table. +- SCSI settings are stored in 256 bit 93C06 serial EEPROM. EEPROM is emulated but data is static (boot enabled, SCSI ID=7) +- Install disk is MIA: Emulation is not yet complete, for example buffer RAM/fake DMA is not emulated. + +Beta 3: +- New low latency vsync should now work under Windows XP, D3D9 only. +- Added ICD AdSCSI ROM with icddisk.device v33.0 (unknown ROM version, most likely v2.0 or v2.1) and v34.0 (v2.2 ROM version) +- Added MacroSystem DraCo v1.3 Boot ROM. Set it as extended ROM, A3000 KS 3.1 as normal ROM. (Boots and hangs like Casablanca) +- Fixed MOVE16 debugger disassembly. +- Fixed HDF/directory harddrive unit number conflict (if directory was between HDFs in harddrives list) introduced in b1. +- Fixed randomly occurring timing issue. Reported refresh rate suddenly increased and it looked like warp mode was activated. +- Full-window mode is now supported in virtual multi monitor mode. Native mode window opens on selected monitor, next virtual monitor opens on following real monitor and so on (or on top of existing window if not enough real monitors) Beta 2: diff --git a/scsi.cpp b/scsi.cpp index 2fcf3365..b7dbfa1b 100644 --- a/scsi.cpp +++ b/scsi.cpp @@ -2321,7 +2321,7 @@ static void omti_bput(struct soft_scsi *scsi, int reg, uae_u8 v) omti_check_state(scsi); } -static int suprareg(struct soft_scsi *ncr, uaecptr addr, bool write) +static int supra_reg(struct soft_scsi *ncr, uaecptr addr, bool write) { int reg = (addr & 0x0f) >> 1; if ((addr & 0x20) && ncr->subtype == 0) { @@ -2333,7 +2333,7 @@ static int suprareg(struct soft_scsi *ncr, uaecptr addr, bool write) return reg; } -static int stardrivereg(struct soft_scsi *ncr, uaecptr addr) +static int stardrive_reg(struct soft_scsi *ncr, uaecptr addr) { if ((addr & 0x0191) == 0x191) { // "dma" data in/out register @@ -2345,7 +2345,7 @@ static int stardrivereg(struct soft_scsi *ncr, uaecptr addr) return reg; } -static int cltdreg(struct soft_scsi *ncr, uaecptr addr) +static int cltd_reg(struct soft_scsi *ncr, uaecptr addr) { if (!(addr & 1)) { return -1; @@ -2354,7 +2354,7 @@ static int cltdreg(struct soft_scsi *ncr, uaecptr addr) return reg; } -static int protarreg(struct soft_scsi *ncr, uaecptr addr) +static int protar_reg(struct soft_scsi *ncr, uaecptr addr) { int reg = -1; if ((addr & 0x24) == 0x20) { @@ -2366,7 +2366,7 @@ static int protarreg(struct soft_scsi *ncr, uaecptr addr) return reg; } -static int add500reg(struct soft_scsi *ncr, uaecptr addr) +static int add500_reg(struct soft_scsi *ncr, uaecptr addr) { int reg = -1; if ((addr & 0x8048) == 0x8000) { @@ -2377,7 +2377,7 @@ static int add500reg(struct soft_scsi *ncr, uaecptr addr) return reg; } -static int adscsireg(struct soft_scsi *ncr, uaecptr addr, bool write) +static int adscsi_reg(struct soft_scsi *ncr, uaecptr addr, bool write) { int reg = -1; if ((addr == 0x38 || addr == 0x39) && !write) { @@ -2390,7 +2390,7 @@ static int adscsireg(struct soft_scsi *ncr, uaecptr addr, bool write) return reg; } -static int ptnexusreg(struct soft_scsi *ncr, uaecptr addr) +static int ptnexus_reg(struct soft_scsi *ncr, uaecptr addr) { int reg = -1; if ((addr & 0x8ff0) == 0) { @@ -2573,7 +2573,7 @@ static int dataflyerplus_reg(uaecptr addr) } // this is clone of trumpcardpro! -static int addhardreg(uaecptr addr) +static int addhard_reg(uaecptr addr) { if (addr & 1) return -1; @@ -2588,7 +2588,7 @@ static int addhardreg(uaecptr addr) return addr; } -static int emplantreg(uaecptr addr) +static int emplant_reg(uaecptr addr) { if (addr & 1) return -1; @@ -2601,7 +2601,7 @@ static int emplantreg(uaecptr addr) return addr; } -static int malibureg(uaecptr addr) +static int malibu_reg(uaecptr addr) { if ((addr & 0xc000) == 0x8000) return 8; // long read port @@ -2794,7 +2794,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if ((addr & 0xc000) == 0x4000) { v = ncr->rom[addr & 0x3fff]; } else { - reg = malibureg(addr); + reg = malibu_reg(addr); if (reg >= 0) { v = ncr5380_bget(ncr, reg); } @@ -2805,7 +2805,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if (addr & 0x8000) { v = ncr->rom[addr & 0x7fff]; } else { - reg = addhardreg(addr); + reg = addhard_reg(addr); if (reg >= 0) { if (reg == 8 && !ncr->dma_active) { v = 0; @@ -2820,7 +2820,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if ((addr & 0xf000) >= 0xc000) { v = ncr->rom[addr & 0x3fff]; } else { - reg = emplantreg(addr); + reg = emplant_reg(addr); if (reg == 8 && !ncr->dma_active) reg = -1; if (reg >= 0) { @@ -2888,7 +2888,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if (addresstype == 1) { v = ncr->rom[addr & 0x7fff]; } else if (addresstype == 0) { - reg = suprareg(ncr, addr, false); + reg = supra_reg(ncr, addr, false); if (reg >= 0) v = ncr5380_bget(ncr, reg); } @@ -2944,7 +2944,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if (addr < sizeof ncr->acmemory) { v = ncr->acmemory[addr]; } else { - reg = stardrivereg(ncr, addr); + reg = stardrive_reg(ncr, addr); if (reg >= 0) { v = ncr5380_bget(ncr, reg); } else if (addr == 0x104) { @@ -2961,7 +2961,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if (!ncr->configured && addr < sizeof ncr->acmemory) { v = ncr->acmemory[addr]; } else { - reg = cltdreg(ncr, addr); + reg = cltd_reg(ncr, addr); if (reg >= 0) v = ncr5380_bget(ncr, reg); } @@ -2974,7 +2974,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) } else if (addr & 0x8000) { v = ncr->rom[addr & 16383]; } else { - reg = ptnexusreg(ncr, addr); + reg = ptnexus_reg(ncr, addr); if (reg >= 0) { v = ncr5380_bget(ncr, reg); } else if (addr == 0x11) { @@ -3049,7 +3049,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) if (!ncr->configured) { v = ncr->acmemory[addr]; } else { - reg = protarreg(ncr, addr); + reg = protar_reg(ncr, addr); if (reg >= 0) { v = ncr5380_bget(ncr, reg); } @@ -3082,7 +3082,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) v = ncr->databuffer[0] >> 8; ncr->databuffer[0] <<= 8; } else { - reg = add500reg(ncr, addr); + reg = add500_reg(ncr, addr); if (reg >= 0) { v = ncr5380_bget(ncr, reg); } else if ((addr & 0x8049) == 0x8009) { @@ -3100,7 +3100,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) struct raw_scsi *rs = &ncr->rscsi; if (ncr->configured) - reg = adscsireg(ncr, addr, false); + reg = adscsi_reg(ncr, addr, false); if (reg >= 0) { v = ncr5380_bget(ncr, reg); } else { @@ -3349,7 +3349,7 @@ static uae_u32 ncr80_bget2(struct soft_scsi *ncr, uaecptr addr, int size) } #if NCR5380_DEBUG > 1 - if (1 || origaddr < 0x8000) + if (0 || origaddr < 0x8000) write_log(_T("GET %08x %02x %d %08x %d\n"), origaddr, v, reg, M68K_GETPC, regs.intmask); #endif @@ -3366,14 +3366,14 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si if (ncr->type == NCR5380_MALIBU) { - reg = malibureg(addr); + reg = malibu_reg(addr); if (reg >= 0) { ncr5380_bput(ncr, reg, val); } } else if (ncr->type == NCR5380_ADDHARD) { - reg = addhardreg(addr); + reg = addhard_reg(addr); if (reg >= 0) { if (reg == 8 && !ncr->dma_active) { ; @@ -3384,7 +3384,7 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si } else if (ncr->type == NCR5380_EMPLANT) { - reg = emplantreg(addr); + reg = emplant_reg(addr); if (reg == 8 && !ncr->dma_active) reg = -1; if (reg >= 0) { @@ -3437,7 +3437,7 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si addresstype = 0; } if (addresstype == 0) { - reg = suprareg(ncr, addr, true); + reg = supra_reg(ncr, addr, true); if (reg >= 0) ncr5380_bput(ncr, reg, val); } @@ -3467,14 +3467,14 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si } else if (ncr->type == NCR5380_STARDRIVE) { - reg = stardrivereg(ncr, addr); + reg = stardrive_reg(ncr, addr); if (reg >= 0) ncr5380_bput(ncr, reg, val); } else if (ncr->type == NCR5380_CLTD) { if (ncr->configured) { - reg = cltdreg(ncr, addr); + reg = cltd_reg(ncr, addr); if (reg >= 0) ncr5380_bput(ncr, reg, val); } @@ -3482,7 +3482,7 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si } else if (ncr->type == NCR5380_PTNEXUS) { if (ncr->configured) { - reg = ptnexusreg(ncr, addr); + reg = ptnexus_reg(ncr, addr); if (reg >= 0) { ncr5380_bput(ncr, reg, val); } else if (addr == 0x11) { @@ -3526,7 +3526,7 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si } else if (ncr->type == NCR5380_PROTAR) { - reg = protarreg(ncr, addr); + reg = protar_reg(ncr, addr); if (reg >= 0) ncr5380_bput(ncr, reg, val); @@ -3536,7 +3536,7 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si struct raw_scsi *rs = &ncr->rscsi; ncr->databuffer_empty = true; } else { - reg = add500reg(ncr, addr); + reg = add500_reg(ncr, addr); if (reg >= 0) { ncr5380_bput(ncr, reg, val); } @@ -3545,7 +3545,7 @@ static void ncr80_bput2(struct soft_scsi *ncr, uaecptr addr, uae_u32 val, int si } else if (ncr->type == NCR5380_ADSCSI) { if (ncr->configured) - reg = adscsireg(ncr, addr, true); + reg = adscsi_reg(ncr, addr, true); if (reg >= 0) { ncr5380_bput(ncr, reg, val); }