From: Toni Wilen Date: Mon, 6 Oct 2014 15:52:34 +0000 (+0300) Subject: 2900b19 X-Git-Tag: 3000~27 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=7714430cbb635a4caecd60050f758967259ac6fd;p=francis%2Fwinuae.git 2900b19 --- diff --git a/a2091.cpp b/a2091.cpp index 04864dd0..3a7901d6 100644 --- a/a2091.cpp +++ b/a2091.cpp @@ -1398,6 +1398,12 @@ static uae_u32 dmac_read_word (struct wd_state *wd, uaecptr addr) if (wd->old_dmac) v = wd->dmac_wtc & 0xffff; break; + case 0x90: + v = wdscsi_getauxstatus(wd); + break; + case 0x92: + v = wdscsi_get(wd); + break; case 0xc0: v = 0xf8 | (1 << 0) | (1 << 1) | (1 << 2); // bits 0-2 = dip-switches break; @@ -1511,6 +1517,11 @@ static void dmac_write_word (struct wd_state *wd, uaecptr addr, uae_u32 b) case 0x8e: wd->dmac_dawr = b; break; + case 0x90: + wdscsi_sasr (wd, b); + break; + case 0x92: + wdscsi_put (wd, b); break; case 0xc2: case 0xc4: @@ -1837,6 +1848,14 @@ static void mbdmac_write_word (struct wd_state *wd, uae_u32 addr, uae_u32 val) case 0x3e: scsi_dmac_stop_dma (wd); break; + case 0x40: + case 0x48: + wd->sasr = val; + break; + case 0x42: + case 0x46: + wdscsi_put(wd, val); + break; } } @@ -1850,8 +1869,6 @@ static void mbdmac_write_byte (struct wd_state *wd, uae_u32 addr, uae_u32 val) { case 0x41: - wd->sasr = val; - break; case 0x49: wd->sasr = val; break; @@ -1917,6 +1934,14 @@ static uae_u32 mbdmac_read_word (struct wd_state *wd, uae_u32 addr) } v = 0; break; + case 0x40: + case 0x48: + v = wdscsi_getauxstatus(wd); + break; + case 0x42: + case 0x46: + v = wdscsi_get(wd); + break; } #if A3000_DEBUG_IO > 1 write_log (_T("DMAC_WREAD %08X=%04X PC=%X\n"), vaddr, v & 0xffff, M68K_GETPC); @@ -2329,9 +2354,10 @@ addrbank *a2091_init (int devnum) wd->rom_size = 16384; wd->rom_mask = wd->rom_size - 1; if (_tcscmp (currprefs.a2091rom.roms[0].romfile, _T(":NOROM"))) { - struct zfile *z = read_rom_name (devnum && currprefs.a2091rom.roms[1].romfile[0] ? currprefs.a2091rom.roms[1].romfile : currprefs.a2091rom.roms[0].romfile); + const TCHAR *romname = devnum && currprefs.a2091rom.roms[1].romfile[0] ? currprefs.a2091rom.roms[1].romfile : currprefs.a2091rom.roms[0].romfile; + struct zfile *z = read_rom_name (romname); if (!z) { - rl = getromlistbyids (roms); + rl = getromlistbyids (roms, romname); if (rl) { z = read_rom (rl->rd); } diff --git a/cd32_fmv.cpp b/cd32_fmv.cpp index d2942fe7..1aa2bba2 100644 --- a/cd32_fmv.cpp +++ b/cd32_fmv.cpp @@ -1505,7 +1505,7 @@ addrbank *cd32_fmv_init (uaecptr start) if (!z) { int ids[] = { 74, 23, -1 }; struct romdata *rd; - struct romlist *rl = getromlistbyids (ids); + struct romlist *rl = getromlistbyids (ids, NULL); if (rl) { rd = rl->rd; write_log (_T("CD32 FMV ROM %d.%d\n"), rd->ver, rd->rev); diff --git a/cfgfile.cpp b/cfgfile.cpp index 76df8ab4..fa37a77b 100644 --- a/cfgfile.cpp +++ b/cfgfile.cpp @@ -220,6 +220,7 @@ static const TCHAR *cpuboards[] = { _T("BlizzardPPC"), _T("WarpEngineA4000"), _T("TekMagic"), + _T("A2630"), NULL }; static const TCHAR *ppc_implementations[] = { @@ -5985,7 +5986,7 @@ static int bip_a1200 (struct uae_prefs *p, int config, int compa, int romcheck) p->cs_rtc = 0; if (config == 1) { p->fastmem_size = 0x400000; - p->cs_rtc = 2; + p->cs_rtc = 1; } set_68020_compa (p, compa, 0); p->cs_compatible = CP_A1200; @@ -6286,7 +6287,6 @@ int built_in_chipset_prefs (struct uae_prefs *p) p->cs_ciatodbug = true; break; case CP_A600: // A600 - p->cs_rtc = 1; p->cs_ide = IDE_A600A1200; p->cs_pcmcia = 1; p->cs_ksmirror_a8 = 1; diff --git a/cpuboard.cpp b/cpuboard.cpp index b4de8bb1..97eb0f27 100644 --- a/cpuboard.cpp +++ b/cpuboard.cpp @@ -150,6 +150,7 @@ static int flash_unlocked; static int csmk2_flashaddressing; static bool blizzardmaprom_bank_mapped, blizzardmaprom2_bank_mapped; static bool cpuboard_non_byte_ea; +static uae_u16 a2630_io; static bool ppc_irq_pending; @@ -249,6 +250,10 @@ static bool is_tekmagic(void) { return currprefs.cpuboard_type == BOARD_TEKMAGIC; } +static bool is_a2630(void) +{ + return currprefs.cpuboard_type == BOARD_A2630; +} DECLARE_MEMORY_FUNCTIONS(blizzardio); static addrbank blizzardio_bank = { @@ -460,6 +465,18 @@ static void REGPARAM2 blizzardmaprom_bput(uaecptr addr, uae_u32 b) MEMORY_CHECK(blizzardea); MEMORY_XLATE(blizzardea); +static void blizzardf0_slow(int size) +{ + if (is_blizzard() || is_blizzardppc() || is_blizzard2060()) { + if (size == 4) + regs.memory_waitstate_cycles += F0_WAITSTATES * 6; + else if (size == 2) + regs.memory_waitstate_cycles += F0_WAITSTATES * 3; + else + regs.memory_waitstate_cycles += F0_WAITSTATES * 1; + } +} + static int REGPARAM2 blizzarde8_check(uaecptr addr, uae_u32 size) { return 0; @@ -478,7 +495,7 @@ static uae_u32 REGPARAM2 blizzardf0_lget(uaecptr addr) //write_log(_T("F0 LONGGET %08x\n"), addr); - regs.memory_waitstate_cycles += F0_WAITSTATES * 6; + blizzardf0_slow(4); addr &= blizzardf0_bank.mask; m = (uae_u32 *)(blizzardf0_bank.baseaddr + addr); @@ -491,7 +508,7 @@ static uae_u32 REGPARAM2 blizzardf0_wget(uaecptr addr) #endif uae_u16 *m, v; - regs.memory_waitstate_cycles += F0_WAITSTATES * 3; + blizzardf0_slow(2); addr &= blizzardf0_bank.mask; m = (uae_u16 *)(blizzardf0_bank.baseaddr + addr); @@ -505,7 +522,7 @@ static uae_u32 REGPARAM2 blizzardf0_bget(uaecptr addr) #endif uae_u8 v; - regs.memory_waitstate_cycles += F0_WAITSTATES * 1; + blizzardf0_slow(1); if (is_csmk3() || is_blizzardppc()) { if (flash_unlocked) { @@ -530,21 +547,21 @@ static void REGPARAM2 blizzardf0_lput(uaecptr addr, uae_u32 b) #ifdef JIT special_mem |= S_WRITE; #endif - regs.memory_waitstate_cycles += F0_WAITSTATES * 6; + blizzardf0_slow(4); } static void REGPARAM2 blizzardf0_wput(uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif - regs.memory_waitstate_cycles += F0_WAITSTATES * 3; + blizzardf0_slow(2); } static void REGPARAM2 blizzardf0_bput(uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif - regs.memory_waitstate_cycles += F0_WAITSTATES * 1; + blizzardf0_slow(1); if (is_csmk3() || is_blizzardppc()) { if (flash_unlocked) { @@ -693,6 +710,30 @@ static void REGPARAM2 blizzarde8_wput(uaecptr addr, uae_u32 b) #ifdef JIT special_mem |= S_WRITE; #endif + if (is_a2630()) { + addr &= 65535; + if (addr == 0x0040) { + write_log(_T("A2630 write %04x\n"), b); + a2630_io = b; + // bit 0: unmap 0x000000 + // bit 1: unmap 0xf80000 + if (b & 2) { + map_banks(&kickmem_bank, 0xf80000 >> 16, 65536 >> 16, 0); + write_log(_T("A2630 boot rom unmapped\n")); + } + // bit 2: autoconfig region enable + if (b & 4) { + write_log(_T("A2630 Autoconfig enabled\n")); + expamem_next(NULL, NULL); + } + // bit 3: unknown + // bit 4: 68000 mode + if (b & 0x10) { + write_log(_T("A2630 68000 mode!\n")); + cpu_halt(4); + } + } + } } static void REGPARAM2 blizzarde8_bput(uaecptr addr, uae_u32 b) { @@ -1245,6 +1286,8 @@ void cpuboard_reset(void) io_reg[CSIII_REG_IPL_EMU] = 0x40; io_reg[CSIII_REG_LOCK] = 0x01; } + if (hardreset || is_keyboardreset()) + a2630_io = 0; flash_unlocked = 0; cpuboard_non_byte_ea = false; @@ -1305,7 +1348,18 @@ void cpuboard_init(void) cpuboard_size = currprefs.cpuboardmem1_size; - if (is_tekmagic()) { + if (is_a2630()) { + + blizzardf0_bank.start = 0x00f00000; + blizzardf0_bank.allocated = 131072; + blizzardf0_bank.mask = blizzardf0_bank.allocated - 1; + mapped_malloc(&blizzardf0_bank); + + blizzardea_bank.allocated = 65536; + blizzardea_bank.mask = blizzardea_bank.allocated - 1; + mapped_malloc(&blizzardea_bank); + + } else if (is_tekmagic()) { blizzardf0_bank.start = 0x00f00000; blizzardf0_bank.allocated = 131072; @@ -1450,6 +1504,14 @@ void cpuboard_init(void) } } +void cpuboard_overlay_override(void) +{ + if (!is_a2630()) + return; + if (!(a2630_io & 2)) + map_banks(&blizzardf0_bank, 0xf80000 >> 16, f0rom_size >> 16, 0); +} + void cpuboard_clear(void) { if (blizzardmaprom_bank.baseaddr) @@ -1479,10 +1541,12 @@ bool cpuboard_maprom(void) return true; } -bool cpuboard_08000000(struct uae_prefs *p) +int cpuboard_memorytype(struct uae_prefs *p) { switch (p->cpuboard_type) { + case 0: + return 0; case BOARD_BLIZZARD_2060: case BOARD_CSMK1: case BOARD_CSMK2: @@ -1490,21 +1554,22 @@ bool cpuboard_08000000(struct uae_prefs *p) case BOARD_CSPPC: case BOARD_WARPENGINE_A4000: case BOARD_TEKMAGIC: - return true; - } - return false; -} - -bool cpuboard_blizzardram(struct uae_prefs *p) -{ - switch (p->cpuboard_type) - { + return BOARD_MEMORY_HIGHMEM; + case BOARD_A2630: + return BOARD_MEMORY_Z2; case BOARD_BLIZZARD_1230_IV: case BOARD_BLIZZARD_1260: case BOARD_BLIZZARDPPC: - return true; + return BOARD_MEMORY_BLIZZARD; + default: + write_log(_T("Missing board type %d!\n"), p->cpuboard_type); + return BOARD_MEMORY_HIGHMEM; } - return false; +} + +void cpuboard_io_special_write(uaecptr addr, uae_u32 val) +{ + blizzarde8_wput(addr, val); } static void fixserial(uae_u8 *rom, int size) @@ -1587,7 +1652,7 @@ static struct zfile *flashfile_open(const TCHAR *name) static struct zfile *board_rom_open(int *roms, const TCHAR *name) { struct zfile *zf = NULL; - struct romlist *rl = getromlistbyids(roms); + struct romlist *rl = getromlistbyids(roms, name); if (rl) zf = read_rom(rl->rd); if (!zf && name) { @@ -1599,10 +1664,21 @@ static struct zfile *board_rom_open(int *roms, const TCHAR *name) return zf; } +static void ew(uae_u8 *p, int addr, uae_u8 value) +{ + if (addr == 00 || addr == 02 || addr == 0x40 || addr == 0x42) { + p[addr] = (value & 0xf0); + p[addr + 2] = (value & 0x0f) << 4; + } else { + p[addr] = ~(value & 0xf0); + p[addr + 2] = ~((value & 0x0f) << 4); + } +} + addrbank *cpuboard_autoconfig_init(void) { struct zfile *autoconfig_rom = NULL; - int roms[2], roms2[2]; + int roms[3], roms2[3]; bool autoconf = true; const TCHAR *defaultromname = NULL; const TCHAR *romname = currprefs.acceleratorromfile; @@ -1616,6 +1692,10 @@ addrbank *cpuboard_autoconfig_init(void) cpuboard_non_byte_ea = false; switch (currprefs.cpuboard_type) { + case BOARD_A2630: + roms[0] = 105; + roms[1] = 106; + break; case BOARD_BLIZZARD_1230_IV_SCSI: roms2[0] = 94; case BOARD_BLIZZARD_1230_IV: @@ -1658,7 +1738,7 @@ addrbank *cpuboard_autoconfig_init(void) return &expamem_null; } - struct romlist *rl = getromlistbyids(roms); + struct romlist *rl = getromlistbyids(roms, romname); if (!rl) { rd = getromdatabyids(roms); if (!rd) @@ -1707,7 +1787,11 @@ addrbank *cpuboard_autoconfig_init(void) protect_roms(false); cpuboard_non_byte_ea = true; - if (is_tekmagic()) { + if (is_a2630()) { + f0rom_size = 131072; + zfile_fread(blizzardf0_bank.baseaddr, 1, f0rom_size, autoconfig_rom); + autoconf = false; + } else if (is_tekmagic()) { earom_size = 65536; f0rom_size = 131072; zfile_fread(blizzardf0_bank.baseaddr, 1, f0rom_size, autoconfig_rom); @@ -1810,8 +1894,16 @@ addrbank *cpuboard_autoconfig_init(void) protect_roms(true); zfile_fclose(autoconfig_rom); - if (f0rom_size) - map_banks(&blizzardf0_bank, 0xf00000 >> 16, (f0rom_size > 262144 ? 262144 : f0rom_size) >> 16, 0); + if (f0rom_size) { + if (is_a2630()) { + if (!(a2630_io & 2)) + map_banks(&blizzardf0_bank, 0xf80000 >> 16, f0rom_size >> 16, 0); + if (!(a2630_io & 1)) + map_banks(&blizzardf0_bank, 0x000000 >> 16, f0rom_size >> 16, 0); + } else { + map_banks(&blizzardf0_bank, 0xf00000 >> 16, (f0rom_size > 262144 ? 262144 : f0rom_size) >> 16, 0); + } + } if (!autoconf) return &expamem_null; return &blizzarde8_bank; diff --git a/custom.cpp b/custom.cpp index 8072c19a..42515b58 100644 --- a/custom.cpp +++ b/custom.cpp @@ -8025,9 +8025,6 @@ void custom_reset (bool hardreset, bool keyboardreset) } gayle_reset (hardreset); -#ifdef AUTOCONFIG - expamem_reset (); -#endif a1000_reset (); DISK_reset (); CIA_reset (); @@ -8047,6 +8044,9 @@ void custom_reset (bool hardreset, bool keyboardreset) #endif #ifdef JIT compemu_reset (); +#endif +#ifdef AUTOCONFIG + expamem_reset (); #endif unset_special (~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)); diff --git a/expansion.cpp b/expansion.cpp index 4d04bfee..83f56fc4 100644 --- a/expansion.cpp +++ b/expansion.cpp @@ -200,7 +200,7 @@ bool expamem_z3hack(struct uae_prefs *p) if (regs.halted && ppc_state) return false; #endif - return p->jit_direct_compatible_memory || cpuboard_blizzardram(p); + return p->jit_direct_compatible_memory || cpuboard_memorytype(p) == BOARD_MEMORY_BLIZZARD; } /* Ugly hack for >2M chip RAM in single pool @@ -466,6 +466,10 @@ static uae_u32 REGPARAM2 expamem_wget (uaecptr addr) { if (expamem_bank_current && expamem_bank_current != &expamem_bank) return expamem_bank_current->wget(addr); + if (expamem_type() != zorroIII) { + if (expamem_bank_current && expamem_bank_current != &expamem_bank) + return expamem_bank_current->bget(addr) << 8; + } uae_u32 v = (expamem_bget (addr) << 8) | expamem_bget (addr + 1); write_log (_T("warning: READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC); return v; @@ -527,39 +531,61 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value) special_mem |= S_WRITE; #endif value &= 0xffff; + if ((addr & 0xff) == 0x40) { + if (currprefs.cpuboard_type == BOARD_A2630) { + /* ARGH! Word write to E80040 always goes to A2630 special IO address! */ + cpuboard_io_special_write(addr, value); + return; + } + } if (ecard >= cardno) return; if (expamem_type () != zorroIII) { - write_log (_T("warning: WRITE.W to address $%08x : value $%x\n"), addr, value); - } else { - switch (addr & 0xff) { - case 0x44: - if (expamem_type() == zorroIII) { - uaecptr addr; - expamem_hi = value & 0xff00; - addr = (expamem_hi | (expamem_lo >> 4)) << 16;; - if (!expamem_z3hack(&currprefs)) { - expamem_z3_pointer = addr; - } else { - if (addr != expamem_z3_pointer) { - put_word (regs.regs[11] + 0x20, expamem_z3_pointer >> 16); - put_word (regs.regs[11] + 0x28, expamem_z3_pointer >> 16); - } - } - expamem_board_pointer = expamem_z3_pointer; - } + write_log (_T("warning: WRITE.W to address $%08x : value $%x PC=%08x\n"), addr, value, M68K_GETPC); + } + switch (addr & 0xff) { + case 0x48: + // A2630 boot rom writes WORDs to Z2 boards! + if (expamem_type() == zorroII) { + expamem_hi = (value >> 8) & 0xff; + expamem_z2_pointer = (expamem_hi | (expamem_lo >> 4)) << 16; + expamem_board_pointer = expamem_z2_pointer; if (card_map[ecard]) { - expamem_next((*card_map[ecard])(), NULL); + expamem_next((*card_map[ecard]) (), NULL); return; } - break; - case 0x4c: - if (card_map[ecard]) { - expamem_next (NULL, NULL); + if (expamem_bank_current && expamem_bank_current != &expamem_bank) { + expamem_bank_current->bput(addr, value >> 8); return; } - break; } + break; + case 0x44: + if (expamem_type() == zorroIII) { + uaecptr addr; + expamem_hi = value & 0xff00; + addr = (expamem_hi | (expamem_lo >> 4)) << 16;; + if (!expamem_z3hack(&currprefs)) { + expamem_z3_pointer = addr; + } else { + if (addr != expamem_z3_pointer) { + put_word (regs.regs[11] + 0x20, expamem_z3_pointer >> 16); + put_word (regs.regs[11] + 0x28, expamem_z3_pointer >> 16); + } + } + expamem_board_pointer = expamem_z3_pointer; + } + if (card_map[ecard]) { + expamem_next((*card_map[ecard])(), NULL); + return; + } + break; + case 0x4c: + if (card_map[ecard]) { + expamem_next (NULL, NULL); + return; + } + break; } if (expamem_bank_current && expamem_bank_current != &expamem_bank) expamem_bank_current->wput(addr, value); @@ -696,7 +722,7 @@ static addrbank *expamem_map_cd32fmv (void) static addrbank *expamem_init_cd32fmv (void) { int ids[] = { 23, -1 }; - struct romlist *rl = getromlistbyids (ids); + struct romlist *rl = getromlistbyids (ids, NULL); struct romdata *rd; struct zfile *z; @@ -1014,10 +1040,12 @@ static addrbank *expamem_map_fastcard_2 (int boardnum) return ab; } +static const uae_u8 a2630_autoconfig[] = { 0xe7, 0x51, 0x40, 0x00, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + static addrbank *expamem_init_fastcard_2 (int boardnum) { - uae_u16 mid = (cfgfile_board_enabled(&currprefs.a2091rom) || currprefs.uae_hide) ? commodore : uae_id; - uae_u8 pid = (cfgfile_board_enabled(&currprefs.a2091rom) || currprefs.uae_hide) ? commodore_a2091_ram : (currprefs.maprom && !currprefs.cpuboard_type ? 1 : 81); + uae_u16 mid; + uae_u8 pid; uae_u8 type = add_memory | zorroII | (cfgfile_board_enabled(&currprefs.a2091rom) && !boardnum ? chainedconfig : 0); int allocated = boardnum ? fastmem2_bank.allocated : fastmem_bank.allocated; @@ -1039,6 +1067,21 @@ static addrbank *expamem_init_fastcard_2 (int boardnum) else if (allocated == 0x800000) type |= Z2_MEM_8MB; + if (currprefs.cpuboard_type == BOARD_A2630) { + for (int i = 1; i < 16; i++) + expamem_write(i * 4, a2630_autoconfig[i]); + type &= 7; + type |= a2630_autoconfig[0] & ~7; + expamem_write(0, type); + return NULL; + } else if (cfgfile_board_enabled(&currprefs.a2091rom) || currprefs.uae_hide) { + pid = commodore_a2091_ram; + mid = commodore; + } else { + pid = currprefs.maprom && !currprefs.cpuboard_type ? 1 : 81; + mid = uae_id; + } + expamem_write (0x00, type); expamem_write (0x08, care_addr); diff --git a/gfxboard.cpp b/gfxboard.cpp index 11d518f0..7312b8b8 100644 --- a/gfxboard.cpp +++ b/gfxboard.cpp @@ -1536,12 +1536,8 @@ static void REGPARAM2 gfxboard_bput_regs_autoconfig (uaecptr addr, uae_u32 b) } } -void gfxboard_reset (void) +void gfxboard_free(void) { - if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) { - board = &boards[currprefs.rtgmem_type - GFXBOARD_HARDWARE]; - gfxmem_bank.mask = currprefs.rtgmem_size - 1; - } if (vram) { gfxmem_bank.baseaddr = vramrealstart; mapped_free (&gfxmem_bank); @@ -1560,6 +1556,15 @@ void gfxboard_reset (void) gfxboard_vblank = false; gfxboard_intena = false; picassoiv_bank = 0; +} + +void gfxboard_reset (void) +{ + if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) { + board = &boards[currprefs.rtgmem_type - GFXBOARD_HARDWARE]; + gfxmem_bank.mask = currprefs.rtgmem_size - 1; + } + gfxboard_free(); if (board) { if (board->z3) gfxboard_bank_memory.wput = gfxboard_wput_mem_autoconfig; @@ -1754,7 +1759,12 @@ static uae_u32 REGPARAM2 gfxboards_bget_regs (uaecptr addr) if (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) { v = 0; if (addr == 0x404) { - v = 0x7c; // FLIFI revision + v = 0x70; // FLIFI revision + // FLIFI type in use + if (currprefs.chipset_mask & CSMASK_AGA) + v |= 4 | 8; + else + v |= 8; } else if (addr == 0x408) { v = gfxboard_vblank ? 0x80 : 0; } else if (p4z2 && addr >= 0x10000) { @@ -2107,7 +2117,7 @@ addrbank *gfxboard_init_memory (void) if (ISP4()) { int roms[] = { 91, -1 }; - struct romlist *rl = getromlistbyids (roms); + struct romlist *rl = getromlistbyids (roms, NULL); TCHAR path[MAX_DPATH]; fetch_rompath (path, sizeof path / sizeof (TCHAR)); diff --git a/include/cpuboard.h b/include/cpuboard.h index 5c52d166..5845668e 100644 --- a/include/cpuboard.h +++ b/include/cpuboard.h @@ -9,9 +9,10 @@ extern void cpuboard_clear(void); extern void cpuboard_vsync(void); extern void cpuboard_hsync(void); extern void cpuboard_rethink(void); -extern bool cpuboard_08000000(struct uae_prefs *p); -extern bool cpuboard_blizzardram(struct uae_prefs *p); +extern int cpuboard_memorytype(struct uae_prefs *p); extern bool is_ppc_cpu(struct uae_prefs *); +extern void cpuboard_io_special_write(uaecptr addr, uae_u32 val); +extern void cpuboard_overlay_override(void); extern bool ppc_interrupt(int new_m68k_ipl); @@ -20,6 +21,11 @@ extern uae_u32 cyberstorm_scsi_ram_get(uaecptr addr); extern int REGPARAM3 cyberstorm_scsi_ram_check(uaecptr addr, uae_u32 size) REGPARAM; extern uae_u8 *REGPARAM3 cyberstorm_scsi_ram_xlate(uaecptr addr) REGPARAM; +#define BOARD_MEMORY_Z2 1 +#define BOARD_MEMORY_Z3 2 +#define BOARD_MEMORY_HIGHMEM 3 +#define BOARD_MEMORY_BLIZZARD 4 + #define BOARD_BLIZZARD_1230_IV 1 #define BOARD_BLIZZARD_1230_IV_SCSI 2 #define BOARD_BLIZZARD_1260 3 @@ -32,6 +38,7 @@ extern uae_u8 *REGPARAM3 cyberstorm_scsi_ram_xlate(uaecptr addr) REGPARAM; #define BOARD_BLIZZARDPPC 10 #define BOARD_WARPENGINE_A4000 11 #define BOARD_TEKMAGIC 12 +#define BOARD_A2630 13 diff --git a/include/memory.h b/include/memory.h index a87c2b76..069c532b 100644 --- a/include/memory.h +++ b/include/memory.h @@ -26,7 +26,6 @@ bool init_shm (void); void free_shm (void); bool preinit_shm (void); extern bool canbang; -extern int candirect; #ifdef ADDRESS_SPACE_24BIT #define MEMORY_BANKS 256 @@ -73,7 +72,7 @@ enum { ABFLAG_UNK = 0, ABFLAG_RAM = 1, ABFLAG_ROM = 2, ABFLAG_ROMIN = 4, ABFLAG_IO = 8, ABFLAG_NONE = 16, ABFLAG_SAFE = 32, ABFLAG_INDIRECT = 64, ABFLAG_NOALLOC = 128, - ABFLAG_RTG = 256, ABFLAG_THREADSAFE = 512 + ABFLAG_RTG = 256, ABFLAG_THREADSAFE = 512, ABFLAG_DIRECTMAP = 1024 }; typedef struct { /* These ones should be self-explanatory... */ diff --git a/include/mmu_common.h b/include/mmu_common.h index f3effca4..6f061d2d 100644 --- a/include/mmu_common.h +++ b/include/mmu_common.h @@ -31,9 +31,9 @@ extern jmp_buf __exbuf; extern int __exvalue; #define TRY(DUMMY) __exvalue=setjmp(__exbuf); \ if (__exvalue==0) { __pushtry(&__exbuf); -#define CATCH(x) __poptry(); } else { fprintf(stderr,"Gotcha! %d %s in %d\n",__exvalue,__FILE__,__LINE__); +#define CATCH(x) __poptry(); } else {m68k_exception x=__exvalue; #define ENDTRY __poptry();} -#define THROW(x) if (__is_catched()) {fprintf(stderr,"Longjumping %s in %d\n",__FILE__,__LINE__);longjmp(__exbuf,x);} +#define THROW(x) if (__is_catched()) {longjmp(__exbuf,x);} #define THROW_AGAIN(var) if (__is_catched()) longjmp(*__poptry(),__exvalue) #define SAVE_EXCEPTION #define RESTORE_EXCEPTION diff --git a/include/newcpu.h b/include/newcpu.h index d21efe9e..e462332d 100644 --- a/include/newcpu.h +++ b/include/newcpu.h @@ -553,6 +553,7 @@ extern void m68k_do_rte (void); extern void protect_roms (bool); extern void unprotect_maprom (void); extern bool is_hardreset(void); +extern bool is_keyboardreset(void); extern void mmu_op (uae_u32, uae_u32); extern void mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr); diff --git a/include/rommgr.h b/include/rommgr.h index 608d91c4..b4c15f9e 100644 --- a/include/rommgr.h +++ b/include/rommgr.h @@ -84,7 +84,7 @@ extern struct romdata *getarcadiarombyname (const TCHAR *name); extern struct romlist **getromlistbyident (int ver, int rev, int subver, int subrev, const TCHAR *model, int romflags, bool all); extern void getromname (const struct romdata*, TCHAR*); extern struct romdata *getromdatabyname (const TCHAR*); -extern struct romlist *getromlistbyids (const int *ids); +extern struct romlist *getromlistbyids (const int *ids, const TCHAR *romname); extern struct romdata *getromdatabyids (const int *ids); extern void romwarning(const int *ids); extern struct romlist *getromlistbyromdata (const struct romdata *rd); diff --git a/include/uae/ppc.h b/include/uae/ppc.h index f05b9872..bcd1ef5b 100644 --- a/include/uae/ppc.h +++ b/include/uae/ppc.h @@ -36,6 +36,7 @@ void uae_ppc_cpu_lock(void); bool uae_ppc_cpu_unlock(void); void uae_ppc_emulate(void); void uae_ppc_reset(bool hardreset); +void uae_ppc_free(void); void uae_ppc_hsync_handler(void); void uae_ppc_wakeup(void); void ppc_map_banks(uae_u32, uae_u32, const TCHAR*, void*, bool); diff --git a/jit/compemu_support.cpp b/jit/compemu_support.cpp index 311a391d..982e1135 100644 --- a/jit/compemu_support.cpp +++ b/jit/compemu_support.cpp @@ -463,8 +463,6 @@ bool check_prefs_changed_comp (void) alloc_cache(); changed = 1; } - if (!candirect) - canbang = 0; // Turn off illegal-mem logging when using JIT... if(currprefs.cachesize) diff --git a/main.cpp b/main.cpp index 6ef37f82..582f54d7 100644 --- a/main.cpp +++ b/main.cpp @@ -309,7 +309,7 @@ void fixup_cpu (struct uae_prefs *p) if (p->cpu_cycle_exact) p->cpu_compatible = true; - if (cpuboard_blizzardram(p) && !p->comptrustbyte) { + if (cpuboard_memorytype(p) == BOARD_MEMORY_BLIZZARD && !p->comptrustbyte) { error_log(_T("JIT direct is not compatible with emulated Blizzard accelerator boards.")); p->comptrustbyte = 1; p->comptrustlong = 1; @@ -332,8 +332,10 @@ void fixup_prefs (struct uae_prefs *p) built_in_chipset_prefs (p); fixup_cpu (p); - if (cpuboard_08000000(p)) + if (cpuboard_memorytype(p) == BOARD_MEMORY_HIGHMEM) p->mbresmem_high_size = p->cpuboardmem1_size; + else if (cpuboard_memorytype(p) == BOARD_MEMORY_Z2) + p->fastmem_size = p->cpuboardmem1_size; if (((p->chipmem_size & (p->chipmem_size - 1)) != 0 && p->chipmem_size != 0x180000) || p->chipmem_size < 0x20000 @@ -952,10 +954,6 @@ void do_start_program (void) { if (quit_program == -UAE_QUIT) return; - if (!canbang && candirect < 0) - candirect = 0; - if (canbang && candirect < 0) - candirect = 1; /* Do a reset on startup. Whether this is elegant is debatable. */ inputdevice_updateconfig (&changed_prefs, &currprefs); if (quit_program >= 0) @@ -1030,6 +1028,10 @@ void do_leave_program (void) #ifdef WITH_LUA uae_lua_free (); #endif +#ifdef WITH_PPC + uae_ppc_free(); +#endif + gfxboard_free(); savestate_free (); memory_cleanup (); free_shm (); diff --git a/memory.cpp b/memory.cpp index 7f2a7d8c..16e110aa 100644 --- a/memory.cpp +++ b/memory.cpp @@ -38,7 +38,6 @@ #include "uae/ppc.h" bool canbang; -int candirect = -1; static bool rom_write_enabled; #ifdef JIT /* Set by each memory handler that does not simply access real memory. */ @@ -1732,6 +1731,8 @@ static void add_shmmaps (uae_u32 start, addrbank *what) shm_start = y; } +#define MAPPED_MALLOC_DEBUG 1 + bool mapped_malloc (addrbank *ab) { int id; @@ -1743,9 +1744,17 @@ bool mapped_malloc (addrbank *ab) ab->startmask = ab->start; if (!needmman () && (!rtgmem || currprefs.cpu_model < 68020)) { nocanbang (); - if (ab->flags & ABFLAG_NOALLOC) + ab->flags &= ~ABFLAG_DIRECTMAP; + if (ab->flags & ABFLAG_NOALLOC) { +#if MAPPED_MALLOC_DEBUG + write_log(_T("mapped_malloc noalloc %s\n"), ab->name); +#endif return true; + } ab->baseaddr = xcalloc (uae_u8, ab->allocated + 4); +#if MAPPED_MALLOC_DEBUG + write_log(_T("mapped_malloc nodirect %s %p\n"), ab->name, ab->baseaddr); +#endif return ab->baseaddr != NULL; } @@ -1777,6 +1786,10 @@ bool mapped_malloc (addrbank *ab) x->next->prev = x; shm_start = x; ab->baseaddr = x->native_address; + ab->flags |= ABFLAG_DIRECTMAP; +#if MAPPED_MALLOC_DEBUG + write_log(_T("mapped_malloc direct %s %p\n"), ab->name, ab->baseaddr); +#endif return ab->baseaddr != NULL; } if (recurse) @@ -1785,6 +1798,9 @@ bool mapped_malloc (addrbank *ab) recurse++; mapped_malloc (ab); recurse--; +#if MAPPED_MALLOC_DEBUG + write_log(_T("mapped_malloc indirect %s %p\n"), ab->name, ab->baseaddr); +#endif return ab->baseaddr != NULL; } @@ -2088,6 +2104,7 @@ void map_overlay (int chip) map_banks (rb, 0, size, 0x80000); } fill_ce_banks (); + cpuboard_overlay_override(); if (!isrestore () && valid_address (regs.pc, 4)) m68k_setpc_normal (m68k_getpc ()); } diff --git a/ncr9x_scsi.cpp b/ncr9x_scsi.cpp index f42435aa..94fe34dc 100644 --- a/ncr9x_scsi.cpp +++ b/ncr9x_scsi.cpp @@ -896,6 +896,7 @@ addrbank *ncr_fastlane_autoconfig_init(int devnum) { int roms[2]; struct ncr9x_state *ncr = &ncr_fastlane_scsi[devnum]; + const TCHAR *romname; xfree(ncr->rom); ncr->rom = NULL; @@ -917,9 +918,10 @@ addrbank *ncr_fastlane_autoconfig_init(int devnum) ncr9x_init (); ncr9x_reset_board(ncr); - struct zfile *z = read_rom_name (devnum && currprefs.fastlanerom.roms[1].romfile[0] ? currprefs.fastlanerom.roms[1].romfile : currprefs.fastlanerom.roms[0].romfile); + romname = devnum && currprefs.fastlanerom.roms[1].romfile[0] ? currprefs.fastlanerom.roms[1].romfile : currprefs.fastlanerom.roms[0].romfile; + struct zfile *z = read_rom_name (romname); if (!z) { - struct romlist *rl = getromlistbyids(roms); + struct romlist *rl = getromlistbyids(roms, romname); if (rl) { struct romdata *rd = rl->rd; z = read_rom (rd); @@ -964,6 +966,7 @@ addrbank *ncr_oktagon_autoconfig_init(int devnum) { int roms[2]; struct ncr9x_state *ncr = &ncr_oktagon2008_scsi[devnum]; + const TCHAR *romname; xfree(ncr->rom); ncr->rom = NULL; @@ -992,9 +995,10 @@ addrbank *ncr_oktagon_autoconfig_init(int devnum) ncr9x_init (); ncr9x_reset_board(ncr); - struct zfile *z = read_rom_name (devnum && currprefs.oktagonrom.roms[1].romfile[0] ? currprefs.oktagonrom.roms[1].romfile : currprefs.oktagonrom.roms[0].romfile); + romname = devnum && currprefs.oktagonrom.roms[1].romfile[0] ? currprefs.oktagonrom.roms[1].romfile : currprefs.oktagonrom.roms[0].romfile; + struct zfile *z = read_rom_name (romname); if (!z) { - struct romlist *rl = getromlistbyids(roms); + struct romlist *rl = getromlistbyids(roms, romname); if (rl) { struct romdata *rd = rl->rd; z = read_rom (rd); diff --git a/ncr_scsi.cpp b/ncr_scsi.cpp index d3db8fb0..631d3158 100644 --- a/ncr_scsi.cpp +++ b/ncr_scsi.cpp @@ -802,7 +802,7 @@ addrbank *ncr710_warpengine_autoconfig_init(void) ncr->io_start = WARP_ENGINE_IO_OFFSET; ncr->io_end = WARP_ENGINE_IO_END; - struct romlist *rl = getromlistbyids(roms); + struct romlist *rl = getromlistbyids(roms, NULL); if (rl) { struct romdata *rd = rl->rd; z = read_rom (rd); @@ -836,6 +836,7 @@ addrbank *ncr710_a4091_autoconfig_init (int devnum) { struct ncr_state *ncr = ncra4091[devnum]; int roms[3]; + const TCHAR *romname; xfree(ncr->rom); ncr->rom = NULL; @@ -858,9 +859,10 @@ addrbank *ncr710_a4091_autoconfig_init (int devnum) ncr710_init (); ncr710_reset_board(ncr); - struct zfile *z = read_rom_name (devnum && currprefs.a4091rom.roms[1].romfile[0] ? currprefs.a4091rom.roms[1].romfile : currprefs.a4091rom.roms[0].romfile); + romname = devnum && currprefs.a4091rom.roms[1].romfile[0] ? currprefs.a4091rom.roms[1].romfile : currprefs.a4091rom.roms[0].romfile; + struct zfile *z = read_rom_name (romname); if (!z) { - struct romlist *rl = getromlistbyids(roms); + struct romlist *rl = getromlistbyids(roms, romname); if (rl) { struct romdata *rd = rl->rd; z = read_rom (rd); diff --git a/newcpu.cpp b/newcpu.cpp index 836bd4f2..08e9fb37 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -4549,13 +4549,16 @@ static void exception2_handle (uaecptr addr, uaecptr fault) Exception (2); } -static bool cpu_hardreset; +static bool cpu_hardreset, cpu_keyboardreset; bool is_hardreset(void) { return cpu_hardreset; } - +bool is_keyboardreset(void) +{ + return cpu_keyboardreset; +} void m68k_go (int may_quit) { @@ -4590,7 +4593,7 @@ void m68k_go (int may_quit) if (quit_program > 0) { int restored = 0; - bool kbreset = quit_program == UAE_RESET_KEYBOARD; + cpu_keyboardreset = quit_program == UAE_RESET_KEYBOARD; cpu_hardreset = ((quit_program == UAE_RESET_HARD ? 1 : 0) | hardboot) != 0; if (quit_program == UAE_QUIT) @@ -4610,7 +4613,7 @@ void m68k_go (int may_quit) savestate_rewind (); #endif set_cycles (start_cycles); - custom_reset (cpu_hardreset != 0, kbreset); + custom_reset (cpu_hardreset != 0, cpu_keyboardreset); m68k_reset2 (cpu_hardreset != 0); if (cpu_hardreset) { memory_clear (); diff --git a/od-win32/fsdb_mywin32.cpp b/od-win32/fsdb_mywin32.cpp index d59cc99b..0d41aedb 100644 --- a/od-win32/fsdb_mywin32.cpp +++ b/od-win32/fsdb_mywin32.cpp @@ -785,11 +785,13 @@ void my_canonicalize_path(const TCHAR *path, TCHAR *out, int size) return; } v = GetLongPathName (path, tmp, sizeof tmp / sizeof (TCHAR)); - if (!v || v > sizeof tmp / sizeof (TCHAR)) { + if (v > sizeof tmp / sizeof (TCHAR)) { _tcsncpy (out, path, size); out[size - 1] = 0; return; } + if (!v) + _tcscpy(tmp, path); GetFullPathName(tmp, size, out, NULL); } diff --git a/od-win32/mman.cpp b/od-win32/mman.cpp index 561ad245..c8a206eb 100644 --- a/od-win32/mman.cpp +++ b/od-win32/mman.cpp @@ -29,7 +29,6 @@ uae_u8 *natmem_offset_allocated, *natmem_offset, *natmem_offset_end; static uae_u8 *p96mem_offset; static int p96mem_size; static uae_u32 p96base_offset; -static void *rtgmem_mapped_memory; static SYSTEM_INFO si; int maxmem; uae_u32 natmem_size; @@ -299,6 +298,8 @@ static int doinit_shm (void) int rounds = 0; ULONG z3rtgmem_size; + canbang = 1; + natmem_offset = natmem_offset_allocated; for (;;) { int lowround = 0; uae_u8 *blah = NULL; @@ -345,7 +346,7 @@ static int doinit_shm (void) set_expamem_z3_hack_override(false); z3offset = 0; - if ((changed_prefs.z3autoconfig_start == 0x10000000 || changed_prefs.z3autoconfig_start == 0x40000000) && !changed_prefs.force_0x10000000_z3 && !cpuboard_blizzardram(&changed_prefs)) { + if ((changed_prefs.z3autoconfig_start == 0x10000000 || changed_prefs.z3autoconfig_start == 0x40000000) && !changed_prefs.force_0x10000000_z3 && cpuboard_memorytype(&changed_prefs) != BOARD_MEMORY_BLIZZARD) { if (1 && natmem_size > 0x40000000 && natmem_size - 0x40000000 >= (totalsize - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align)) && changed_prefs.z3chipmem_size <= 512 * 1024 * 1024) { changed_prefs.z3autoconfig_start = currprefs.z3autoconfig_start = 0x40000000; z3offset += 0x40000000 - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align); @@ -456,16 +457,8 @@ void mapped_free (addrbank *ab) if (ab->baseaddr == NULL) return; - if (!currprefs.jit_direct_compatible_memory && !rtgmem) { - if (!(ab->flags & ABFLAG_NOALLOC)) { - xfree(ab->baseaddr); - ab->baseaddr = NULL; - } - return; - } - - if (ab->baseaddr == rtgmem_mapped_memory) - rtgmem_mapped_memory = NULL; + if (rtgmem) + write_log(_T("x")); if (ab->flags & ABFLAG_INDIRECT) { while(x) { @@ -485,6 +478,17 @@ void mapped_free (addrbank *ab) x = x->next; } ab->baseaddr = NULL; + ab->flags &= ~ABFLAG_DIRECTMAP; + write_log(_T("mapped_free indirect %s\n"), ab->name); + return; + } + + if (!(ab->flags & ABFLAG_DIRECTMAP)) { + if (!(ab->flags & ABFLAG_NOALLOC)) { + xfree(ab->baseaddr); + ab->baseaddr = NULL; + } + write_log(_T("mapped_free nondirect %s\n"), ab->name); return; } @@ -503,6 +507,7 @@ void mapped_free (addrbank *ab) x = x->next; } ab->baseaddr = NULL; + write_log(_T("mapped_free direct %s\n"), ab->name); } static key_t get_next_shmkey (void) @@ -627,7 +632,6 @@ void *shmat (addrbank *ab, int shmid, void *shmaddr, int shmflg) p96special = TRUE; shmaddr = natmem_offset + start; gfxmem_bank.start = start; - rtgmem_mapped_memory = shmaddr; if (start + currprefs.rtgmem_size < 10 * 1024 * 1024) size += BARRIER; } else if(!_tcscmp (shmids[shmid].name, _T("ramsey_low"))) { @@ -665,7 +669,6 @@ void *shmat (addrbank *ab, int shmid, void *shmaddr, int shmflg) p96special = TRUE; gfxmem_bank.start = p96mem_offset - natmem_offset; shmaddr = natmem_offset + gfxmem_bank.start; - rtgmem_mapped_memory = shmaddr; size += BARRIER; } else if(!_tcscmp (shmids[shmid].name, _T("bogo"))) { shmaddr=natmem_offset+0x00C00000; @@ -745,14 +748,14 @@ void *shmat (addrbank *ab, int shmid, void *shmaddr, int shmflg) result = virtualallocwithlock (shmaddr, size, MEM_COMMIT, PAGE_READWRITE); if (result == NULL) { result = (void*)-1; - error_log (_T("Memory %s failed to allocate: VA %08X - %08X %x (%dk). Error %d."), - shmids[shmid].name, + error_log (_T("Memory %s failed to allocate %p: VA %08X - %08X %x (%dk). Error %d."), + shmids[shmid].name, shmaddr, (uae_u8*)shmaddr - natmem_offset, (uae_u8*)shmaddr - natmem_offset + size, size, size >> 10, GetLastError ()); } else { shmids[shmid].attached = result; - write_log (_T("VA %08X - %08X %x (%dk) ok (%08X)%s\n"), - (uae_u8*)shmaddr - natmem_offset, (uae_u8*)shmaddr - natmem_offset + size, + write_log (_T("%p: VA %08X - %08X %x (%dk) ok (%08X)%s\n"), + shmaddr, (uae_u8*)shmaddr - natmem_offset, (uae_u8*)shmaddr - natmem_offset + size, size, size >> 10, shmaddr, p96special ? _T(" P96") : _T("")); } } @@ -773,7 +776,7 @@ void unprotect_maprom (void) continue; shm->maprom = -1; if (!VirtualProtect (shm->attached, shm->rosize, protect ? PAGE_READONLY : PAGE_READWRITE, &old)) { - write_log (_T("VP %08X - %08X %x (%dk) failed %d\n"), + write_log (_T("unprotect_maprom VP %08X - %08X %x (%dk) failed %d\n"), (uae_u8*)shm->attached - natmem_offset, (uae_u8*)shm->attached - natmem_offset + shm->size, shm->size, shm->size >> 10, GetLastError ()); } @@ -797,7 +800,7 @@ void protect_roms (bool protect) if (shm->maprom < 0 && protect) continue; if (!VirtualProtect (shm->attached, shm->rosize, protect ? PAGE_READONLY : PAGE_READWRITE, &old)) { - write_log (_T("VP %08X - %08X %x (%dk) failed %d\n"), + write_log (_T("protect_roms VP %08X - %08X %x (%dk) failed %d\n"), (uae_u8*)shm->attached - natmem_offset, (uae_u8*)shm->attached - natmem_offset + shm->size, shm->size, shm->size >> 10, GetLastError ()); } diff --git a/od-win32/win32.h b/od-win32/win32.h index 9fe2d480..83f74b0f 100644 --- a/od-win32/win32.h +++ b/od-win32/win32.h @@ -20,12 +20,12 @@ #define LANG_DLL_FULL_VERSION_MATCH 1 #if WINUAEPUBLICBETA -#define WINUAEBETA _T("18") +#define WINUAEBETA _T("19") #else #define WINUAEBETA _T("") #endif -#define WINUAEDATE MAKEBD(2014, 9, 28) +#define WINUAEDATE MAKEBD(2014, 10, 6) //#define WINUAEEXTRA _T("AmiKit Preview") //#define WINUAEEXTRA _T("Amiga Forever Edition") diff --git a/od-win32/win32gui.cpp b/od-win32/win32gui.cpp index df5f5cfd..90c45bee 100644 --- a/od-win32/win32gui.cpp +++ b/od-win32/win32gui.cpp @@ -1653,6 +1653,7 @@ static void show_rom_list (void) 18, -1, 19, -1, 74, 23, -1, -1, // CD32 FMV 91, -1, -2, // Picasso IV + 105, 106, -1, -1, // A2630 89, -1, -1, // 1230-IV 89, -1, 94, -1, -1, // 1230-IV SCSI 90, -1, -1, // 1260 @@ -1684,6 +1685,7 @@ static void show_rom_list (void) _T("CD32 Full Motion Video\0") _T("Picasso IV\0") + _T("A2620/A2630\0") _T("Blizzard 1230-IV\0Blizzard 1260\0") _T("Blizzard 1230-IV/SCSI\0Blizzard 1260/SCSI\0") _T("Blizzard 2060\0Warp Engine\0TekMagic 2040/2060\0") @@ -7397,8 +7399,10 @@ static void enable_for_memorydlg (HWND hDlg) int z3 = true; int mbram2 = z3; - if (cpuboard_08000000(&workprefs)) + if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_HIGHMEM) mbram2 = false; + if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_Z2) + fast = false; #ifndef AUTOCONFIG z3 = FALSE; @@ -7482,6 +7486,12 @@ static void values_to_memorydlg (HWND hDlg) SendDlgItemMessage (hDlg, IDC_CHIPMEM, TBM_SETPOS, TRUE, mem_size); SetDlgItemText (hDlg, IDC_CHIPRAM, memsize_names[msi_chip[mem_size]]); + if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_Z2) { + if (workprefs.cpuboardmem1_size > 8 * 1024 * 1024) + workprefs.cpuboardmem1_size = 8 * 1024 * 1024; + workprefs.fastmem_size = workprefs.cpuboardmem1_size; + } + mem_size = 0; switch (workprefs.fastmem_size) { case 0x00000000: mem_size = 0; break; @@ -7715,7 +7725,7 @@ static void values_to_memorydlg (HWND hDlg) SendDlgItemMessage (hDlg, IDC_MBMEM1, TBM_SETPOS, TRUE, mem_size); SetDlgItemText (hDlg, IDC_MBRAM1, memsize_names[msi_gfx[mem_size]]); - if (cpuboard_08000000(&workprefs)) + if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_HIGHMEM) workprefs.mbresmem_high_size = workprefs.cpuboardmem1_size; mem_size = 0; @@ -8240,6 +8250,7 @@ static INT_PTR CALLBACK MemoryDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARA SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard PPC")); SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Warp Engine")); SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Tek Magic")); + SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("A2620/A2630")); case WM_USER: workprefs.fastmem_autoconfig = ischecked (hDlg, IDC_FASTMEMAUTOCONFIG); @@ -9355,7 +9366,7 @@ static void values_from_cpudlg (HWND hDlg) } if (!workprefs.cachesize) setchecked (hDlg, IDC_JITENABLE, false); - if (oldcache == 0 && candirect && workprefs.cachesize > 0) + if (oldcache == 0 && workprefs.cachesize > 0) canbang = 1; #endif if (ischecked(hDlg, IDC_CPU_PPC)) { diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt index c21e8d35..80e8295d 100644 --- a/od-win32/winuaechangelog.txt +++ b/od-win32/winuaechangelog.txt @@ -18,6 +18,19 @@ Things that may happen in 2015: - restore only single input target to default. +Beta 19: + +- Restartarting and loading another config crashed if PPC or RTG without JIT direct was active. +- After restarting non-JIT config, JIT direct was not available (old restriction that should have been gone + few official releases ago) +- Added A2620/A2630 emulation and two rom images to rom scanner. (390282-06/390283-06 and 390282-07/390283-07) + Not JIT direct compatible. 68000 fall back mode causes HALT4 status. ROM special feature: right mouse button + at boot = enter boot menu, in boot menu shift+m and right mouse button: enter rom monitor. +- A590/A2091 word writes to DMAC WD SCSI byte registers and Z2 autoconfig registers supported. A2630 boot + rom likes to do word writes to byte-size registers. +- PicassoIV AGA flifi bit was set even when using non-AGA hardware. No functional changes. +- Fixed RTG hardware emulation crash in some situations when switching (fullscreen) modes. + Beta 18: - "Pause emulation when xyz" option remained forever stuck in pause mode if PPC CPU was active. diff --git a/ppc/ppc.cpp b/ppc/ppc.cpp index a16e34a4..b6571d65 100644 --- a/ppc/ppc.cpp +++ b/ppc/ppc.cpp @@ -191,7 +191,7 @@ static struct impl { ppc_cpu_reset_function reset; } impl; -static void load_dummy_implementation() +static void load_dummy_implementation(void) { write_log(_T("PPC: Loading dummy implementation\n")); memset(&impl, 0, sizeof(impl)); @@ -227,7 +227,7 @@ static void uae_patch_library_ppc(UAE_DLHANDLE handle) else write_log(_T("WARNING: uae_ppc_io_mem_write64 not set\n")); } -static bool load_qemu_implementation() +static bool load_qemu_implementation(void) { #ifdef WITH_QEMU_CPU write_log(_T("PPC: Loading QEmu implementation\n")); @@ -289,7 +289,7 @@ static bool load_qemu_implementation() #endif } -static bool load_pearpc_implementation() +static bool load_pearpc_implementation(void) { #ifdef WITH_PEARPC_CPU write_log(_T("PPC: Loading PearPC implementation\n")); @@ -311,7 +311,7 @@ static bool load_pearpc_implementation() #endif } -static void load_ppc_implementation() +static void load_ppc_implementation(void) { int impl = currprefs.ppc_implementation; if (impl == PPC_IMPLEMENTATION_AUTO || impl == PPC_IMPLEMENTATION_QEMU) { @@ -330,17 +330,17 @@ static void load_ppc_implementation() ppc_implementation = PPC_IMPLEMENTATION_DUMMY; } -static bool using_qemu() +static bool using_qemu(void) { return ppc_implementation == PPC_IMPLEMENTATION_QEMU; } -static bool using_pearpc() +static bool using_pearpc(void) { return ppc_implementation == PPC_IMPLEMENTATION_PEARPC; } -static void initialize() +static void initialize(void) { static bool initialized = false; if (initialized) { @@ -586,7 +586,7 @@ bool UAECALL uae_ppc_io_mem_write(uint32_t addr, uint32_t data, int size) } spinlock_post(locked); -#if PPC_ACCESS_LOG > 2 +#if PPC_ACCESS_LOG >= 2 write_log(_T("PPC write %08x = %08x %d\n"), addr, data, size); #endif @@ -634,7 +634,7 @@ bool UAECALL uae_ppc_io_mem_read(uint32_t addr, uint32_t *data, int size) write_log(_T("PPC io read %08x=%08x %d\n"), addr, v, size); } #endif -#if PPC_ACCESS_LOG > 2 +#if PPC_ACCESS_LOG >= 2 write_log(_T("PPC read %08x=%08x %d\n"), addr, v, size); #endif return true; @@ -643,6 +643,7 @@ bool UAECALL uae_ppc_io_mem_read(uint32_t addr, uint32_t *data, int size) bool UAECALL uae_ppc_io_mem_write64(uint32_t addr, uint64_t data) { bool locked = false; + while (ppc_thread_running && ppc_cpu_lock_state < 0 && ppc_state); locked = spinlock_pre(addr); @@ -650,7 +651,7 @@ bool UAECALL uae_ppc_io_mem_write64(uint32_t addr, uint64_t data) put_long(addr + 4, data & 0xffffffff); spinlock_post(locked); -#if PPC_ACCESS_LOG > 2 +#if PPC_ACCESS_LOG >= 2 write_log(_T("PPC mem write64 %08x = %08llx\n"), addr, data); #endif @@ -670,7 +671,7 @@ bool UAECALL uae_ppc_io_mem_read64(uint32_t addr, uint64_t *data) *data = ((uint64_t)v1 << 32) | v2; spinlock_post(locked); -#if PPC_ACCESS_LOG > 2 +#if PPC_ACCESS_LOG >= 2 write_log(_T("PPC mem read64 %08x = %08llx\n"), addr, *data); #endif @@ -736,6 +737,14 @@ void uae_ppc_reset(bool hardreset) ppc_state = PPC_STATE_INACTIVE; } +void uae_ppc_free(void) +{ + bool wasactive = ppc_state != PPC_STATE_INACTIVE; + uae_ppc_cpu_stop(); + if (wasactive && impl.map_memory) + impl.map_memory(NULL, 0); +} + void uae_ppc_cpu_lock(void) { // when called, lock was already set by other CPU @@ -797,6 +806,8 @@ void uae_ppc_crash(void) void uae_ppc_hsync_handler(void) { + if (ppc_state == PPC_STATE_INACTIVE) + return; if (using_pearpc()) { if (ppc_state != PPC_STATE_SLEEP) return; @@ -810,6 +821,8 @@ void uae_ppc_hsync_handler(void) void uae_ppc_pause(int pause) { + if (ppc_state == PPC_STATE_INACTIVE) + return; // FIXME: assert(uae_is_emulation_thread()) if (using_qemu()) { if (pause) { diff --git a/qemuvga/vga.cpp b/qemuvga/vga.cpp index 17ee8063..2b450fa6 100644 --- a/qemuvga/vga.cpp +++ b/qemuvga/vga.cpp @@ -1422,6 +1422,8 @@ static void vga_draw_text(VGACommonState *s, int full_update) vga_draw_glyph9 = vga_draw_glyph9_table[depth_index]; dest = surface_data(surface); + if (!dest) + return; linesize = surface_stride(surface); ch_attr_ptr = s->last_ch_attr; line = 0; @@ -1817,6 +1819,8 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) page_min = -1; page_max = 0; d = surface_data(surface); + if (!d) + return; linesize = surface_stride(surface); y1 = 0; for(y = 0; y < height; y++) { @@ -1906,6 +1910,8 @@ static void vga_draw_blank(VGACommonState *s, int full_update) } w = s->last_scr_width * surface_bytes_per_pixel(surface); d = surface_data(surface); + if (!d) + return; for(i = 0; i < s->last_scr_height; i++) { memset(d, val, w); d += surface_stride(surface); diff --git a/rommgr.cpp b/rommgr.cpp index 8be14897..c84a0268 100644 --- a/rommgr.cpp +++ b/rommgr.cpp @@ -93,7 +93,7 @@ struct romdata *getromdatabypath (const TCHAR *path) return NULL; } -#define NEXT_ROM_ID 105 +#define NEXT_ROM_ID 107 static struct romheader romheaders[] = { { _T("Freezer Cartridges"), 1 }, @@ -312,6 +312,14 @@ static struct romdata roms[] = { 0x9e9781d5, 0xf65b60d1,0x4300c50f,0x2ed17cf4,0x4dcfdef9,0x16697bc9, NULL, _T("tekmagic2060.rom") }, ALTROMPN(104, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0x888da4cf, 0x6ae85f3a, 0x65331ba4, 0xaaba67ae, 0x34763d70, 0x2bde0495) ALTROMPN(104, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0xaf1f47db, 0x28d5bed0, 0xbc517d46, 0x500e8159, 0x723e0b64, 0x4733c26a) + { _T("A2620/A2630 -07 ROM"), 0, 0, 0, 0, _T("A2620\0A2630\0"), 65536, 105, 0, 0, ROMTYPE_CPUBOARD, 0, 0, _T("390282-07/390283-07"), + 0x169d80e9, 0x41f518cb,0x41c1dc1f,0xcc6363832,0x0676af5,0x4969010c, NULL, NULL }, + ALTROMPN(105, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, _T("390282-07"), 0xf2904058, 0x33695119, 0x5fdf5d56, 0x095a696b, 0x0ba2641d, 0x334845df) + ALTROMPN(105, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, _T("390283-07"), 0xf697d458, 0x09fe260b, 0x03784e87, 0x3351dbec, 0x5146a455, 0x814383d1) + { _T("A2620/A2630 -06 ROM"), 0, 0, 0, 0, _T("A2620\0A2630\0"), 65536, 106, 0, 0, ROMTYPE_CPUBOARD, 0, 0, _T("390282-06/390283-06"), + 0xeb31fd9e, 0x2d6a5c68,0x1040f98d,0x7e63ad089,0x0da9e83,0x2b5c704d, NULL, NULL }, + ALTROMPN(106, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, _T("390282-06"), 0xd6ae582c, 0x47b3dea3, 0x31db76e6, 0x1380a3d6, 0x9f191657, 0xdd1cd4b3) + ALTROMPN(106, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, _T("390283-06"), 0xcd379634, 0x65e251e2, 0xf6961c8e, 0x33a86c3d, 0x01248f70, 0xa159823b) { _T("CyberStorm MK I 68040"), 0, 0, 0, 0, _T("CSMKI\0"), 32768, 95, 0, 0, ROMTYPE_CPUBOARD, 0, 0, NULL, 0, 0, 0, 0, 0, 0, NULL, _T("cyberstormmk1_040.rom") }, @@ -1028,14 +1036,29 @@ struct romlist *getromlistbyromdata (const struct romdata *rd) ids[0] = rd->id; ids[1] = 0; - return getromlistbyids(ids); + return getromlistbyids(ids, NULL); } -struct romlist *getromlistbyids (const int *ids) +struct romlist *getromlistbyids (const int *ids, const TCHAR *romname) { struct romdata *rd; int i, j; + i = 0; + if (romname) { + while (ids[i] >= 0) { + rd = getromdatabyid (ids[i]); + if (rd) { + for (j = 0; j < romlist_cnt; j++) { + if (rl[j].rd->id == rd->id) { + if (my_issamepath(rl[j].path, romname)) + return &rl[j]; + } + } + } + i++; + } + } i = 0; while (ids[i] >= 0) { rd = getromdatabyid (ids[i]);