From: Toni Wilen <twilen@winuae.net>
Date: Sat, 22 Feb 2020 19:23:20 +0000 (+0200)
Subject: 68010 prefetch bus error updates (AND.L, EOR.L, OR.L, LEA). Mask IF/DF combination... 
X-Git-Tag: 4400~113
X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=7728906d66a0c8fa510812f20d3d21a850b74102;p=francis%2Fwinuae.git

68010 prefetch bus error updates (AND.L, EOR.L, OR.L, LEA). Mask IF/DF combination in basicexc mode.
---

diff --git a/cputest/main.c b/cputest/main.c
index 2d058702..1972140a 100644
--- a/cputest/main.c
+++ b/cputest/main.c
@@ -1411,9 +1411,10 @@ static int compare_exception(uae_u8 *s1, uae_u8 *s2, int len, int domask, uae_u8
 		return memcmp(s1, s2, len);
 	} else {
 		for (int i = 0; i < len; i++) {
-			if (mask[i])
+			uae_u8 m = mask[i];
+			if (m == 0)
 				continue;
-			if (s1[i] != s2[i])
+			if ((s1[i] & m) != (s2[i] & m))
 				return 1;
 		}
 		return 0;
@@ -1603,6 +1604,7 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
 				break;
 			case 8: // 68010 bus/address error
 				{
+					uae_u16 ssw = (p[0] << 8) | p[1];
 					exc[8] = *p++;
 					exc[9] = *p++;
 					excrwp = ((exc[8] & 1) == 0) ? 1 : 0;
@@ -1628,6 +1630,9 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
 					sp[22] = sp[23] = 0;
 					if (basicexcept) {
 						exclen = 14;
+						mask_exception = 1;
+						memset(masked_exception, 0xff, sizeof(masked_exception));
+						masked_exception[8] = ~0x30;
 					} else {
 						// ignore undocumented data
 						exclen = 26;
@@ -1647,9 +1652,9 @@ static uae_u8 *validate_exception(struct registers *regs, uae_u8 *p, short excnu
 							// bus error read: cpu may still read the data, depends on hardware.
 							// ignore input buffer contents
 							mask_exception = 1;
-							memset(masked_exception, 0, sizeof(masked_exception));
-							masked_exception[20] = 1;
-							masked_exception[21] = 1;
+							memset(masked_exception, 0xff, sizeof(masked_exception));
+							masked_exception[20] = 0;
+							masked_exception[21] = 0;
 						}
 						alts = 3;
 					}
diff --git a/gencpu.cpp b/gencpu.cpp
index 571de5ae..ad196a0d 100644
--- a/gencpu.cpp
+++ b/gencpu.cpp
@@ -5112,12 +5112,20 @@ static void gen_opcode (unsigned int opcode)
 					if (cpu_level == 0) {
 						c += 2;
 					}
-					if (cpu_level == 1 && curi->smode == immi) {
+					if (cpu_level == 1 && curi->smode == imm) {
 						c += 2;
 					}
-					fill_prefetch_next_after(1, "ccr_68000_long_move_ae_LZN(src);\ndreg_68000_long_replace_low(dstreg, src);\n");
+					if (cpu_level == 1 && (curi->smode == imm || curi->smode == Dreg)) {
+						fill_prefetch_next_after(0, "m68k_dreg(regs, dstreg) = (src);\n");
+					} else {
+						fill_prefetch_next_after(1, "ccr_68000_long_move_ae_LZN(src);\ndreg_68000_long_replace_low(dstreg, src);\n");
+					}
 				} else {
-					fill_prefetch_next_after(1, "dreg_68000_long_replace_low(dstreg, src);\n");
+					if (cpu_level == 1) {
+						fill_prefetch_next_after(0, "m68k_dreg(regs, dstreg) = (src);\n");
+					} else {
+						fill_prefetch_next_after(1, "dreg_68000_long_replace_low(dstreg, src);\n");
+					}
 				}
 				loopmodeextra = 4;
 				next_level_000();
@@ -7128,10 +7136,15 @@ bccl_not68020:
 		if (curi->smode == Ad8r || curi->smode == PC8r)
 			addcycles000(2);
 		if (curi->smode == absl) {
-			strcpy(bus_error_code, "m68k_areg(regs, dstreg) = (m68k_areg(regs, dstreg) & 0x0000ffff) | (srca & 0xffff0000);\n");
-			strcpy(bus_error_code2, "m68k_areg(regs, dstreg) = (srca);\n");
+			if (cpu_level == 0) {
+				strcpy(bus_error_code, "m68k_areg(regs, dstreg) = (m68k_areg(regs, dstreg) & 0x0000ffff) | (srca & 0xffff0000);\n");
+				strcpy(bus_error_code2, "m68k_areg(regs, dstreg) = (srca);\n");
+			}
+			next_level_000();
 		}  else if (curi->smode != Ad8r && curi->smode != PC8r) {
-			strcpy(bus_error_code, "m68k_areg(regs, dstreg) = (srca);\n");
+			if (cpu_level == 0) {
+				strcpy(bus_error_code, "m68k_areg(regs, dstreg) = (srca);\n");
+			}
 		}
 		genamodedual(curi,
 			curi->smode, "srcreg", curi->size, "src", 0, GF_AA,