From: Toni Wilen <twilen@winuae.net>
Date: Sat, 3 Feb 2018 09:14:31 +0000 (+0200)
Subject: 68040/060 MMU register differences.
X-Git-Tag: 4000~215
X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=889fb353764f550c38ec7e1e163970954db02ae3;p=francis%2Fwinuae.git

68040/060 MMU register differences.
---

diff --git a/cpummu.cpp b/cpummu.cpp
index f7c30724..6bdf14b0 100644
--- a/cpummu.cpp
+++ b/cpummu.cpp
@@ -176,6 +176,7 @@ static void mmu_dump_table(const char * label, uaecptr root_ptr)
 	ULONG pagemask = (1 << page_size) - 1;
 	ULONG descmask = pagemask & ~(0x08 | 0x10); // mask out unused and M bits
 
+	root_ptr &= 0xfffffe00;
 	console_out_f(_T("MMU dump start. Root = %08x. Page = %d\n"), root_ptr, 1 << page_size);
 	totalpages = 1 << (32 - page_size);
 	startaddr = 0;
@@ -1468,10 +1469,14 @@ void REGPARAM2 mmu_reset(void)
 	mmu_set_funcs();
 }
 
-void REGPARAM2 mmu_set_tc(uae_u16 tc)
+uae_u16 REGPARAM2 mmu_set_tc(uae_u16 tc)
 {
-	if (currprefs.mmu_ec)
+	if (currprefs.mmu_ec) {
 		tc &= ~(0x8000 | 0x4000);
+		// at least 68EC040 always returns zero when TC is read.
+		if (currprefs.cpu_model == 68040)
+			tc = 0;
+	}
 
 	regs.mmu_enabled = (tc & 0x8000) != 0;
 	mmu_pagesize_8k = (tc & 0x4000) != 0;
@@ -1498,7 +1503,8 @@ void REGPARAM2 mmu_set_tc(uae_u16 tc)
 
 	mmu_flush_atc_all(true);
 
-	write_log(_T("%d MMU: enabled=%d page8k=%d PC=%08x\n"), currprefs.mmu_model, regs.mmu_enabled, mmu_pagesize_8k, m68k_getpc());
+	write_log(_T("%d MMU: TC=%04x enabled=%d page8k=%d PC=%08x\n"), tc, currprefs.mmu_model, regs.mmu_enabled, mmu_pagesize_8k, m68k_getpc());
+	return tc;
 }
 
 void REGPARAM2 mmu_set_super(bool super)
diff --git a/include/cpummu.h b/include/cpummu.h
index f7f306e7..7ff8f95d 100644
--- a/include/cpummu.h
+++ b/include/cpummu.h
@@ -225,7 +225,7 @@ extern void REGPARAM3 mmu_op_real(uae_u32 opcode, uae_u16 extra) REGPARAM;
 
 extern void REGPARAM3 mmu_reset(void) REGPARAM;
 extern void REGPARAM3 mmu_set_funcs(void) REGPARAM;
-extern void REGPARAM3 mmu_set_tc(uae_u16 tc) REGPARAM;
+extern uae_u16 REGPARAM3 mmu_set_tc(uae_u16 tc) REGPARAM;
 extern void REGPARAM3 mmu_set_super(bool super) REGPARAM;
 extern void REGPARAM3 mmu_flush_cache(void) REGPARAM;
 
diff --git a/newcpu.cpp b/newcpu.cpp
index 05d6acac..c5bbddbd 100644
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -4287,7 +4287,7 @@ void mmu_op (uae_u32 opcode, uae_u32 extra)
 		write_log (_T("PFLUSH\n"));
 #endif
 		return;
-	} else if ((opcode & 0x0FD8) == 0x548) {
+	} else if ((opcode & 0x0FD8) == 0x0548) {
 		if (currprefs.cpu_model < 68060) { /* PTEST not in 68060 */
 			/* PTEST */
 			int regno = opcode & 7;
@@ -4306,7 +4306,7 @@ void mmu_op (uae_u32 opcode, uae_u32 extra)
 #endif
 			return;
 		}
-	} else if ((opcode & 0x0FB8) == 0x588) {
+	} else if ((opcode & 0x0FB8) == 0x0588) {
 		/* PLPA */
 		if (currprefs.cpu_model == 68060) {
 			int regno = opcode & 7;
diff --git a/newcpu_common.cpp b/newcpu_common.cpp
index 9cd97e13..e0286ac1 100644
--- a/newcpu_common.cpp
+++ b/newcpu_common.cpp
@@ -131,7 +131,7 @@ int m68k_move2c (int regno, uae_u32 *regp)
 		case 3:
 			regs.tcr = *regp & (currprefs.cpu_model == 68060 ? 0xfffe : 0xc000);
 			if (currprefs.mmu_model)
-				mmu_set_tc (regs.tcr);
+				regs.tcr = mmu_set_tc (regs.tcr);
 			break;
 
 			/* no differences between 68040 and 68060 */
@@ -149,9 +149,9 @@ int m68k_move2c (int regno, uae_u32 *regp)
 		case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg (regs, 7) = regs.isp; break;
 			/* 68040 only */
 		case 0x805: regs.mmusr = *regp; break;
-			/* 68040/060 */
-		case 0x806: regs.urp = *regp & 0xfffffe00; break;
-		case 0x807: regs.srp = *regp & 0xfffffe00; break;
+			 /* 68040 stores all bits, 68060 zeroes low 9 bits */
+		case 0x806: regs.urp = *regp & (currprefs.cpu_model == 68060 ? 0xfffffe00 : 0xffffffff); break;
+		case 0x807: regs.srp = *regp & (currprefs.cpu_model == 68060 ? 0xfffffe00 : 0xffffffff); break;
 			/* 68060 only */
 		case 0x808:
 			{