From: Toni Wilen <twilen@winuae.net>
Date: Fri, 16 Sep 2016 14:34:10 +0000 (+0300)
Subject: FIFO status is max single byte in PIO mode.
X-Git-Tag: 3400~87
X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=8d05996a4856fd92119a82413700bc6f29104816;p=francis%2Fwinuae.git

FIFO status is max single byte in PIO mode.
---

diff --git a/qemuvga/esp.cpp b/qemuvga/esp.cpp
index 537ced2c..03109db6 100644
--- a/qemuvga/esp.cpp
+++ b/qemuvga/esp.cpp
@@ -584,6 +584,7 @@ uint64_t esp_reg_read(void *opaque, uint32_t saddr)
 						scsiesp_req_continue(s->current_req);
 						// set ti_size back to 1, last byte is now in FIFO.
 						s->ti_size = 1;
+						s->fifo_on = 1;
 					} else {
 						esp_raise_irq(s);
 					}
@@ -612,11 +613,15 @@ uint64_t esp_reg_read(void *opaque, uint32_t saddr)
         return old_val;
 	case ESP_RFLAGS:
 	{
-		int v;
-		if (s->ti_size >= 16)
-			v = 16;
-		else
-			v = s->ti_size;
+		int v = 0;
+		if (s->fifo_on) {
+			if (s->ti_size >= 16)
+				v = 16;
+			else
+				v = s->ti_size;
+		}
+		if (!s->dma && v > 1)
+			v = 1;
 		return v | (s->rregs[ESP_RSEQ] << 5);
 	}
 	case ESP_RES4: