From: Toni Wilen <twilen@winuae.net>
Date: Tue, 29 Oct 2019 17:59:37 +0000 (+0200)
Subject: Check out of bounds access before other checks. Always generate every CCR combination... 
X-Git-Tag: 4300~61
X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=95fceefc961ccfaf8b223b3a7a451182ef0ecba6;p=francis%2Fwinuae.git

Check out of bounds access before other checks. Always generate every CCR combination if "cc" instruction.
---

diff --git a/cputest.cpp b/cputest.cpp
index e5cfc736..606ba093 100644
--- a/cputest.cpp
+++ b/cputest.cpp
@@ -1371,7 +1371,7 @@ static void save_data(uae_u8 *dst, const TCHAR *dir)
 		fwrite(data, 1, 4, f);
 		pl(data, opcode_memory_start);
 		fwrite(data, 1, 4, f);
-		pl(data, (cpu_lvl << 16) | sr_undefined_mask | (addressing_mask == 0xffffffff ? 0x80000000 : 0) | ((feature_flag_mode & 1) << 30) | (feature_min_interrupt_mask << 20));
+		pl(data, (cpu_lvl << 16) | sr_undefined_mask | (addressing_mask == 0xffffffff ? 0x80000000 : 0) | (feature_min_interrupt_mask << 20));
 		fwrite(data, 1, 4, f);
 		pl(data, currprefs.fpu_model);
 		fwrite(data, 1, 4, f);
@@ -2345,9 +2345,9 @@ static void execute_ins(uae_u16 opc, uaecptr endpc, uaecptr targetpc, struct ins
 {
 	uae_u16 opw1 = (opcode_memory[2] << 8) | (opcode_memory[3] << 0);
 	uae_u16 opw2 = (opcode_memory[4] << 8) | (opcode_memory[5] << 0);
-	if (opc == 0xf23d
-		//&& opw1 == 0xee38
-		//&& opw2 == 0x504e
+	if (opc == 0x2191
+		&& opw1 == 0xdd12
+		&& opw2 == 0xf78c
 		)
 		printf("");
 	if (regs.sr & 0x2000)
@@ -2385,6 +2385,10 @@ static void execute_ins(uae_u16 opc, uaecptr endpc, uaecptr targetpc, struct ins
 
 		(*cpufunctbl[opc])(opc);
 
+		if (out_of_test_space) {
+			break;
+		}
+
 		// Supervisor mode and A7 was modified: skip this test round.
 		if (s && regs.regs[15] != a7) {
 			// but not if RTE
@@ -3205,7 +3209,8 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi
 						uae_u16 sr_mask = 0;
 
 						int maxflag = fpumode ? 256 : 32;
-						if (feature_flag_mode == 1) {
+						// if cc-instruction: always do full test
+						if (feature_flag_mode == 1 && !dp->ccuse) {
 							maxflag = fpumode ? 256 / 8 : 2;
 						}
 
@@ -3224,6 +3229,7 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi
 						if (extraccr) {
 							*dst++ = (uae_u8)extraccr;
 						}
+						*dst++ = (uae_u8)maxflag;
 
 						// Test every CPU CCR or FPU SR/rounding/precision combination
 						for (int ccr = 0; ccr < maxflag; ccr++) {
@@ -3251,7 +3257,7 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi
 								}
 								regs.fpiar = regs.pc;
 								// condition codes
-								if (feature_flag_mode == 0) {
+								if (maxflag >= 32) {
 									fpp_set_fpsr((ccr & 15) << 24);
 									// precision and rounding
 									fpp_set_fpcr((ccr >> 4) << 4);
@@ -3261,7 +3267,7 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi
 									fpp_set_fpcr((ccr >> 1) << 4);
 								}
 							}
-							if (feature_flag_mode == 0) {
+							if (maxflag >= 32) {
 								regs.sr = ccr | sr_mask;
 							} else {
 								regs.sr = ((ccr & 1) ? 31 : 0) | sr_mask;
diff --git a/cputest/cputest_defines.h b/cputest/cputest_defines.h
index 0eaa71f2..327c0b9d 100644
--- a/cputest/cputest_defines.h
+++ b/cputest/cputest_defines.h
@@ -1,5 +1,5 @@
 
-#define DATA_VERSION 5
+#define DATA_VERSION 6
 
 #define CT_FPREG 0
 #define CT_DREG 0
diff --git a/cputest/main.c b/cputest/main.c
index eae5dc00..075a4715 100644
--- a/cputest/main.c
+++ b/cputest/main.c
@@ -72,7 +72,6 @@ static int hmem_rom, lmem_rom;
 static uae_u8 *absallocated;
 static int cpu_lvl, fpu_model;
 static uae_u16 sr_undefined_mask;
-static int flag_mode;
 static int check_undefined_sr;
 static uae_u32 cpustatearraystore[16];
 static uae_u32 cpustatearraynew[] = {
@@ -1608,10 +1607,7 @@ static void process_test(uae_u8 *p)
 			if (extraccr & 8)
 				sr_mask |= 0x1000; // M
 
-			int maxccr = fpumode ? 256 : 32;
-			if (flag_mode) {
-				maxccr = fpumode ? 256 / 8 : 2;
-			}
+			int maxccr = *p++;
 			for (int ccr = 0;  ccr < maxccr; ccr++) {
 
 				regs.ssp = super_stack_memory - 0x80;
@@ -1624,7 +1620,7 @@ static void process_test(uae_u8 *p)
 #endif
 				xmemcpy(&test_regs, &regs, sizeof(struct registers));
 
-				if (flag_mode == 0) {
+				if (maxccr >= 32) {
 					test_regs.sr = ccr;
 				} else {
 					test_regs.sr = (ccr ? 31 : 0);
@@ -1632,7 +1628,7 @@ static void process_test(uae_u8 *p)
 				test_regs.sr |= sr_mask | (interrupt_mask << 8);
 				test_sr = test_regs.sr;
 				if (fpumode) {
-					if (flag_mode == 0) {
+					if (maxccr >= 32) {
 						test_regs.fpsr = (ccr & 15) << 24;
 						test_regs.fpcr = (ccr >> 4) << 4;
 					} else {
@@ -1793,7 +1789,6 @@ static int test_mnemo(const char *path, const char *opcode)
 	lvl = (gl(data) >> 16) & 15;
 	interrupt_mask = (gl(data) >> 20) & 7;
 	addressing_mask = (gl(data) & 0x80000000) ? 0xffffffff : 0x00ffffff;
-	flag_mode = (gl(data) >> 30) & 1;
 	sr_undefined_mask = gl(data) & 0xffff;
 	fread(data, 1, 4, f);
 	fpu_model = gl(data);