From: Toni Wilen Date: Thu, 31 Jul 2014 18:32:30 +0000 (+0300) Subject: 2820b8 X-Git-Tag: 3000~93 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=a10e6fcecd5079a9290b139a5c8787233a0cfca9;p=francis%2Fwinuae.git 2820b8 --- diff --git a/blitter.cpp b/blitter.cpp index bd987ac0..3e7c97de 100644 --- a/blitter.cpp +++ b/blitter.cpp @@ -37,7 +37,7 @@ int log_blitter = 0; #endif /* we must not change ce-mode while blitter is running.. */ -static int blitter_cycle_exact; +static int blitter_cycle_exact, immediate_blits; static int blt_statefile_type; uae_u16 bltcon0, bltcon1; @@ -409,7 +409,7 @@ static void blitter_interrupt (int hpos, int done) { if (blit_interrupt) return; - if (!done && (!currprefs.blitter_cycle_exact || currprefs.cpu_model >= 68030 || currprefs.cachesize || currprefs.m68k_speed < 0)) + if (!done && (!blitter_cycle_exact || immediate_blits || currprefs.cpu_model >= 68030 || currprefs.cachesize || currprefs.m68k_speed < 0)) return; blit_interrupt = 1; send_interrupt (6, 4 * CYCLE_UNIT); @@ -420,7 +420,7 @@ static void blitter_interrupt (int hpos, int done) static void blitter_done (int hpos) { ddat1use = ddat2use = 0; - bltstate = blit_startcycles == 0 || !currprefs.blitter_cycle_exact ? BLT_done : BLT_init; + bltstate = blit_startcycles == 0 || !blitter_cycle_exact || immediate_blits ? BLT_done : BLT_init; blitter_interrupt (hpos, 1); blitter_done_notify (hpos); markidlecycle (hpos); @@ -876,6 +876,10 @@ static void actually_do_blit (void) static void blitter_doit (void) { + if (blt_info.vblitsize == 0 || (blitline && blt_info.hblitsize != 2)) { + blitter_done (current_hpos()); + return; + } if (log_blitter) { if (!blitter_dontdo) actually_do_blit (); @@ -894,7 +898,7 @@ void blitter_handler (uae_u32 data) if (!dmaen (DMA_BLITTER)) { event2_newevent (ev2_blitter, 10, 0); blitter_stuck++; - if (blitter_stuck < 20000 || !currprefs.immediate_blits) + if (blitter_stuck < 20000 || !immediate_blits) return; /* gotta come back later. */ /* "free" blitter in immediate mode if it has been "stuck" ~3 frames * fixes some JIT game incompatibilities @@ -902,7 +906,7 @@ void blitter_handler (uae_u32 data) debugtest (DEBUGTEST_BLITTER, _T("force-unstuck!\n")); } blitter_stuck = 0; - if (blit_slowdown > 0 && !currprefs.immediate_blits) { + if (blit_slowdown > 0 && !immediate_blits) { event2_newevent (ev2_blitter, blit_slowdown, 0); blit_slowdown = -1; return; @@ -1099,6 +1103,14 @@ void decide_blitter (int hpos) { int hsync = hpos < 0; + if (immediate_blits) { + if (bltstate == BLT_done) + return; + if (dmaen (DMA_BLITTER)) + blitter_doit(); + return; + } + if (blit_startcycles > 0) do_startcycles (hpos); @@ -1238,7 +1250,7 @@ static void blitter_force_finish (void) odmacon = dmacon; dmacon |= DMA_MASTER | DMA_BLITTER; write_log (_T("forcing blitter finish\n")); - if (blitter_cycle_exact) { + if (blitter_cycle_exact && !immediate_blits) { int rounds = 10000; while (bltstate != BLT_done && rounds > 0) { memset (cycle_line, 0, sizeof cycle_line); @@ -1484,6 +1496,7 @@ static void do_blitter2 (int hpos, int copper) bltstate = BLT_done; blitter_cycle_exact = currprefs.blitter_cycle_exact; + immediate_blits = currprefs.immediate_blits; blt_info.got_cycle = 0; last_blitter_hpos = hpos + 1; blit_firstline_cycles = blit_first_cycle = get_cycles (); @@ -1550,7 +1563,14 @@ static void do_blitter2 (int hpos, int copper) bltstate = BLT_work; blit_maxcyclecounter = 0x7fffffff; + blit_waitcyclecounter = 0; + if (blitter_cycle_exact) { + if (immediate_blits) { + if (dmaen (DMA_BLITTER)) + blitter_doit (); + return; + } if (log_blitter & 8) { blitter_handler (0); } else { @@ -1575,9 +1595,8 @@ static void do_blitter2 (int hpos, int copper) if (dmaen (DMA_BLITTER)) { blt_info.got_cycle = 1; } - blit_waitcyclecounter = 0; - if (currprefs.immediate_blits) { + if (immediate_blits) { if (dmaen (DMA_BLITTER)) blitter_doit (); return; @@ -1602,14 +1621,14 @@ void blitter_check_start (void) return; blitter_start_init (); bltstate = BLT_work; - if (currprefs.immediate_blits) { + if (immediate_blits) { blitter_doit (); } } void do_blitter (int hpos, int copper) { - if (bltstate == BLT_done || !currprefs.blitter_cycle_exact) { + if (bltstate == BLT_done || !blitter_cycle_exact) { do_blitter2 (hpos, copper); return; } @@ -1682,7 +1701,7 @@ end:; void check_is_blit_dangerous (uaecptr *bplpt, int planes, int words) { blitter_dangerous_bpl = 0; - if (bltstate == BLT_done || !currprefs.blitter_cycle_exact) + if (bltstate == BLT_done || !blitter_cycle_exact) return; // too simple but better than nothing for (int i = 0; i < planes; i++) { diff --git a/cfgfile.cpp b/cfgfile.cpp index bb266ddf..fb3f85e4 100644 --- a/cfgfile.cpp +++ b/cfgfile.cpp @@ -3509,6 +3509,9 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH p->cpu_cycle_exact = p->blitter_cycle_exact = tmpbool; if (p->cpu_model >= 68020 && p->cachesize > 0) p->cpu_cycle_exact = p->blitter_cycle_exact = false; + // if old version and CE and fastest possible: set to approximate + if (p->config_version < ((2 << 16) | (8 << 8) | (2 << 0)) && p->m68k_speed < 0) + p->m68k_speed = 0; return 1; } diff --git a/cia.cpp b/cia.cpp index 1b36fff0..d36aa022 100644 --- a/cia.cpp +++ b/cia.cpp @@ -1327,7 +1327,7 @@ static void WriteCIAA (uae_u16 addr, uae_u8 val) val &= 0x7f; /* bit 7 is unused */ if ((val & 1) && !(ciaacra & 1)) ciaastarta = CIASTARTCYCLESCRA; - if ((val & 0x40) != (ciaacra & 0x40)) { + if (currprefs.cpuboard_type != 0 && (val & 0x40) != (ciaacra & 0x40)) { /* bleh, Phase5 CPU timed early boot key check fix.. */ if (m68k_getpc() >= 0xf00000 && m68k_getpc() < 0xf80000) check_keyboard(); diff --git a/custom.cpp b/custom.cpp index e1840668..37131ce5 100644 --- a/custom.cpp +++ b/custom.cpp @@ -6879,7 +6879,7 @@ static bool framewait (void) int clockadjust = 0; int vstb = vsynctimebase; - if (currprefs.m68k_speed < 0) { + if (currprefs.m68k_speed < 0 && !currprefs.cpu_cycle_exact) { #if 0 static uae_u32 prevtick; @@ -7688,7 +7688,7 @@ static void hsync_handler_post (bool onvsync) port_get_custom (1, out); } #endif - if (currprefs.m68k_speed < 0) { + if (currprefs.m68k_speed < 0 && !currprefs.cpu_cycle_exact) { if (is_last_line ()) { /* really last line, just run the cpu emulation until whole vsync time has been used */ if (currprefs.m68k_speed_throttle) { diff --git a/debug.cpp b/debug.cpp index 10572926..1ddf3805 100644 --- a/debug.cpp +++ b/debug.cpp @@ -2419,7 +2419,7 @@ static void memwatch_reset (void) } for (int i = 0; membank_stores[i].addr; i++) { struct membank_store *ms = &membank_stores[i]; - xfree (ms->newbank.name); + xfree ((char*)ms->newbank.name); memset (ms, 0, sizeof (struct membank_store)); ms->addr = NULL; } @@ -2911,7 +2911,7 @@ static void memory_map_dump_2 (int log) int k, mirrored, mirrored2, size, size_out; TCHAR size_ext; uae_u8 *caddr; - TCHAR *name; + const TCHAR *name; TCHAR tmp[MAX_DPATH]; name = a1->name; diff --git a/epsonprinter.cpp b/epsonprinter.cpp index 4d01f501..a5adcbff 100644 --- a/epsonprinter.cpp +++ b/epsonprinter.cpp @@ -528,7 +528,10 @@ static int selectfont(Bit16u style) if (curFont) { SelectObject (memHDC, curFont); int size = GetOutlineTextMetrics (memHDC, 0, NULL); - if (size > 0) { + if (size == 0) { + DeleteObject(curFont); + curFont = NULL; + } else { otm = (LPOUTLINETEXTMETRIC)xmalloc (uae_u8, size); GetOutlineTextMetrics (memHDC, size, otm); } diff --git a/expansion.cpp b/expansion.cpp index 4481b382..49ac9916 100644 --- a/expansion.cpp +++ b/expansion.cpp @@ -416,9 +416,9 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value) case 0x44: if (expamem_type () == zorroIII) { if (currprefs.jit_direct_compatible_memory) { - uae_u32 p2 = 0; + uae_u32 p2 = value; // +Bernd Roesch & Toni Wilen - if (expamem[0] & add_memory) { + if ((card_flags[ecard] & 2) && (expamem[0] & add_memory)) { // Z3 RAM expansion p2 = 0; while (!p2 && z3num < 2) { @@ -430,7 +430,7 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value) z3num++; } z3num++; - } else { + } else if (card_flags[ecard] & 4) { // Z3 P96 RAM if (gfxmem_bank.start & 0xff000000) p2 = gfxmem_bank.start >> 16; @@ -1236,6 +1236,12 @@ static bool mapped_malloc_dynamic (uae_u32 *currpsize, uae_u32 *changedpsize, ad return false; } +uaecptr expansion_startaddress(uaecptr addr, uae_u32 size) +{ + if (!currprefs.jit_direct_compatible_memory) + return (addr + size - 1) & ~(size - 1); + return addr; +} static void allocate_expamem (void) { @@ -1253,6 +1259,10 @@ static void allocate_expamem (void) z3chipmem_bank.start += 16 * 1024 * 1024; if (!currprefs.jit_direct_compatible_memory) z3fastmem_bank.start = 0x40000000; + if (currprefs.cpuboard_type == BOARD_WARPENGINE_A4000) { + z3fastmem_bank.start += 0x01000000; + z3fastmem_bank.start = expansion_startaddress(z3fastmem_bank.start, currprefs.z3fastmem_size); + } if (z3fastmem_bank.start == 0x10000000) { if (currprefs.mbresmem_high_size == 128 * 1024 * 1024) z3fastmem_bank.start += 16 * 1024 * 1024; @@ -1605,7 +1615,7 @@ void expamem_reset (void) #endif #ifdef PICASSO96 if (currprefs.rtgmem_type == GFXBOARD_UAE_Z2 && gfxmem_bank.baseaddr != NULL) { - card_flags[cardno] = 0; + card_flags[cardno] = 4; card_name[cardno] = _T("Z2RTG"); card_init[cardno] = expamem_init_gfxcard_z2; card_map[cardno++] = expamem_map_gfxcard; @@ -1613,7 +1623,7 @@ void expamem_reset (void) #endif #ifdef GFXBOARD if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && !gfxboard_is_z3 (currprefs.rtgmem_type)) { - card_flags[cardno] = 0; + card_flags[cardno] = 4; card_name[cardno] = _T("Gfxboard VRAM Zorro II"); card_init[cardno] = expamem_init_gfxboard_memory; card_map[cardno++] = NULL; @@ -1636,19 +1646,20 @@ void expamem_reset (void) if (currprefs.cpuboard_type == BOARD_WARPENGINE_A4000) { card_flags[cardno] = 1; card_name[cardno] = _T("Warp Engine"); - card_init[cardno++] = expamem_init_warpengine; + card_init[cardno] = expamem_init_warpengine; + card_map[cardno++] = NULL; } if (z3fastmem_bank.baseaddr != NULL) { z3num = 0; - card_flags[cardno] = 1; + card_flags[cardno] = 2 | 1; card_name[cardno] = _T("Z3Fast"); card_init[cardno] = expamem_init_z3fastmem; card_map[cardno++] = expamem_map_z3fastmem; if (currprefs.jit_direct_compatible_memory) map_banks (&z3fastmem_bank, z3fastmem_bank.start >> 16, currprefs.z3fastmem_size >> 16, z3fastmem_bank.allocated); if (z3fastmem2_bank.baseaddr != NULL) { - card_flags[cardno] = 1; + card_flags[cardno] = 2 | 1; card_name[cardno] = _T("Z3Fast2"); card_init[cardno] = expamem_init_z3fastmem2; card_map[cardno++] = expamem_map_z3fastmem2; @@ -1660,7 +1671,7 @@ void expamem_reset (void) map_banks (&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16, z3chipmem_bank.allocated); #ifdef PICASSO96 if (currprefs.rtgmem_type == GFXBOARD_UAE_Z3 && gfxmem_bank.baseaddr != NULL) { - card_flags[cardno] = 1; + card_flags[cardno] = 4 | 1; card_name[cardno] = _T("Z3RTG"); card_init[cardno] = expamem_init_gfxcard_z3; card_map[cardno++] = expamem_map_gfxcard; @@ -1668,7 +1679,7 @@ void expamem_reset (void) #endif #ifdef GFXBOARD if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_is_z3 (currprefs.rtgmem_type)) { - card_flags[cardno] = 0; + card_flags[cardno] = 4; card_name[cardno] = _T ("Gfxboard VRAM Zorro III"); card_init[cardno] = expamem_init_gfxboard_memory; card_map[cardno++] = NULL; diff --git a/gencpu.cpp b/gencpu.cpp index 4d6271b4..39e79caf 100644 --- a/gencpu.cpp +++ b/gencpu.cpp @@ -2560,7 +2560,7 @@ static void resetvars (void) dstw = "x_put_word"; srcb = "x_get_byte"; dstb = "x_put_byte"; - do_cycles = "do_cycles_ce000"; + do_cycles = "do_cycles_ce000_internal"; } else if (using_ce020 == 1) { /* x_ not used if it redirects to * get_word_ce020_prefetch() @@ -2577,7 +2577,7 @@ static void resetvars (void) dstw = "x_put_word"; srcb = "x_get_byte"; dstb = "x_put_byte"; - do_cycles = "do_cycles_ce020"; + do_cycles = "do_cycles_ce020_internal"; nextw = "next_iword_020ce"; nextl = "next_ilong_020ce"; } else if (using_ce020 == 2) { @@ -2594,7 +2594,7 @@ static void resetvars (void) dstw = "x_put_word"; srcb = "x_get_byte"; dstb = "x_put_byte"; - do_cycles = "do_cycles_ce020"; + do_cycles = "do_cycles_ce020_internal"; nextw = "next_iword_030ce"; nextl = "next_ilong_030ce"; } else if (using_ce020 == 3) { @@ -2611,7 +2611,7 @@ static void resetvars (void) dstw = "x_put_word"; srcb = "x_get_byte"; dstb = "x_put_byte"; - do_cycles = "do_cycles_ce020"; + do_cycles = "do_cycles_ce020_internal"; nextw = "next_iword_cache040"; nextl = "next_ilong_cache040"; } else if (using_prefetch_020) { diff --git a/include/autoconf.h b/include/autoconf.h index 30fb59d5..e8d635e6 100644 --- a/include/autoconf.h +++ b/include/autoconf.h @@ -94,6 +94,8 @@ extern void expansion_init (void); extern void expansion_cleanup (void); extern void expansion_clear (void); extern void expansion_autoconfig_put(int, uae_u8); +extern uaecptr expansion_startaddress(uaecptr addr, uae_u32 size); + extern void uaegfx_install_code (uaecptr); diff --git a/include/cpu_prefetch.h b/include/cpu_prefetch.h index 3c14ef3f..57e03a90 100644 --- a/include/cpu_prefetch.h +++ b/include/cpu_prefetch.h @@ -35,8 +35,10 @@ STATIC_INLINE uae_u32 get_long_020_prefetch (int o) #define CE020_COUNTCYCLES() // only for CPU internal cycles -STATIC_INLINE void do_cycles_ce020 (int clocks) +STATIC_INLINE void do_cycles_ce020_internal(int clocks) { + if (currprefs.m68k_speed < 0) + return; int cycs = clocks * cpucycleunit; if (regs.ce020memcycles > 0) { if (regs.ce020memcycles >= cycs) { @@ -243,6 +245,12 @@ STATIC_INLINE void put_word_prefetch (uaecptr addr, uae_u32 v) #ifdef CPUEMU_13 +STATIC_INLINE void do_cycles_ce000_internal(int clocks) +{ + if (currprefs.m68k_speed < 0) + return; + x_do_cycles (clocks * cpucycleunit); +} STATIC_INLINE void do_cycles_ce000 (int clocks) { x_do_cycles (clocks * cpucycleunit); diff --git a/include/events.h b/include/events.h index 413150d2..b4014d00 100644 --- a/include/events.h +++ b/include/events.h @@ -26,7 +26,9 @@ extern int event2_count; extern void compute_vsynctime (void); extern void init_eventtab (void); extern void do_cycles_ce (unsigned long cycles); +extern void do_cycles_ce_internal (unsigned long cycles); extern void do_cycles_ce020 (unsigned long cycles); +extern void do_cycles_ce020_interal (unsigned long cycles); extern void events_schedule (void); extern void do_cycles_slow (unsigned long cycles_to_add); extern void do_cycles_fast (unsigned long cycles_to_add); diff --git a/include/zfile.h b/include/zfile.h index f68c7707..7ca15e9d 100644 --- a/include/zfile.h +++ b/include/zfile.h @@ -6,7 +6,7 @@ * (c) 1996 Samuel Devulder */ -#ifndef_UAE_ZFILE_H +#ifndef UAE_ZFILE_H #define UAE_ZFILE_H struct zfile; diff --git a/main.cpp b/main.cpp index 0f377c05..6ccf77e3 100644 --- a/main.cpp +++ b/main.cpp @@ -284,10 +284,12 @@ void fixup_cpu (struct uae_prefs *p) p->m68k_speed = 0; #endif +#if 0 if (p->immediate_blits && p->blitter_cycle_exact) { error_log (_T("Cycle-exact and immediate blitter can't be enabled simultaneously.\n")); p->immediate_blits = false; } +#endif if (p->immediate_blits && p->waiting_blits) { error_log (_T("Immediate blitter and waiting blits can't be enabled simultaneously.\n")); p->waiting_blits = 0; diff --git a/ncr_scsi.cpp b/ncr_scsi.cpp index 8a0377a4..9a4d18e4 100644 --- a/ncr_scsi.cpp +++ b/ncr_scsi.cpp @@ -479,13 +479,18 @@ static void REGPARAM2 ncr_wput (struct ncr_state *ncr, uaecptr addr, uae_u32 w) case 0x44: // yes, this could be much better.. if (currprefs.jit_direct_compatible_memory) { - value = gfxmem_bank.start + ((currprefs.rtgmem_size + 0xffffff) & ~0xffffff); - if (value < 0x10000000) { + if (ncr == &ncr_we) { + // warp engine needs to be first value = 0x10000000; - if (value < z3fastmem_bank.start + currprefs.z3fastmem_size) - value = z3fastmem_bank.start + currprefs.z3fastmem_size; - if (value < z3fastmem2_bank.start + currprefs.z3fastmem2_size) - value = z3fastmem2_bank.start + currprefs.z3fastmem2_size; + } else { + value = gfxmem_bank.start + ((currprefs.rtgmem_size + 0xffffff) & ~0xffffff); + if (value < 0x10000000) { + value = 0x10000000; + if (value < z3fastmem_bank.start + currprefs.z3fastmem_size) + value = z3fastmem_bank.start + currprefs.z3fastmem_size; + if (value < z3fastmem2_bank.start + currprefs.z3fastmem2_size) + value = z3fastmem2_bank.start + currprefs.z3fastmem2_size; + } } if (value < 0x40000000 && max_z3fastmem >= 0x41000000) value = 0x40000000; diff --git a/newcpu.cpp b/newcpu.cpp index 06911a85..ee4fc137 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -2710,8 +2710,7 @@ static void m68k_reset2(bool hardreset) uae_u32 v; regs.spcflags = 0; - m68k_reset_delay = true; - set_special(SPCFLAG_CHECK); + m68k_reset_delay = 0; regs.ipl = regs.ipl_pin = 0; #ifdef SAVESTATE if (isrestore ()) { @@ -2732,6 +2731,9 @@ static void m68k_reset2(bool hardreset) else m68k_areg (regs, 7) = regs.usp; return; + } else { + m68k_reset_delay = currprefs.reset_delay; + set_special(SPCFLAG_CHECK); } #endif v = get_long (4); @@ -3185,7 +3187,6 @@ static int do_specialties (int cycles) if (m68k_reset_delay) { int vsynccnt = 60; int vsyncstate = -1; - m68k_reset_delay = 0; while (vsynccnt > 0 && !quit_program) { x_do_cycles(8 * CYCLE_UNIT); if (regs.spcflags & SPCFLAG_COPPER) @@ -3196,6 +3197,7 @@ static int do_specialties (int cycles) } } } + m68k_reset_delay = 0; unset_special(SPCFLAG_CHECK); } @@ -5885,7 +5887,7 @@ void cpureset (void) uae_u16 ins; addrbank *ab; - m68k_reset_delay = true; + m68k_reset_delay = currprefs.reset_delay; set_special(SPCFLAG_CHECK); send_internalevent(INTERNALEVENT_CPURESET); if ((currprefs.cpu_compatible || currprefs.cpu_cycle_exact) && currprefs.cpu_model <= 68020) { diff --git a/od-win32/mman.cpp b/od-win32/mman.cpp index 4e19aa0a..9c51348f 100644 --- a/od-win32/mman.cpp +++ b/od-win32/mman.cpp @@ -11,6 +11,7 @@ #include "options.h" #include "autoconf.h" #include "gfxboard.h" +#include "cpuboard.h" #include "win32.h" #if defined(NATMEM_OFFSET) @@ -341,7 +342,9 @@ static int doinit_shm (void) if ((changed_prefs.z3fastmem_start == 0x10000000 || changed_prefs.z3fastmem_start == 0x40000000) && !changed_prefs.force_0x10000000_z3) { if (natmem_size > 0x40000000 && natmem_size - 0x40000000 >= (totalsize - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align)) && changed_prefs.z3chipmem_size <= 512 * 1024 * 1024) { changed_prefs.z3fastmem_start = currprefs.z3fastmem_start = 0x40000000; - z3offset += 0x40000000 - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align); + z3offset += 0x40000000 - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align); + if (currprefs.cpuboard_type == BOARD_WARPENGINE_A4000) + z3offset += 0x01000000; } else { changed_prefs.z3fastmem_start = currprefs.z3fastmem_start = 0x10000000; } @@ -360,7 +363,15 @@ static int doinit_shm (void) p96mem_offset = natmem_offset + p96base_offset; } else { // calculate Z3 alignment (argh, I thought only Z2 needed this..) - p96base_offset = (0x40000000 + changed_prefs.z3fastmem_size + changed_prefs.rtgmem_size - 1) & ~(changed_prefs.rtgmem_size - 1); + uae_u32 addr = 0x40000000; + if (currprefs.cpuboard_type == BOARD_WARPENGINE_A4000) { + addr = expansion_startaddress(addr, 0x01000000); + addr += 0x01000000; + } + addr = expansion_startaddress(addr, changed_prefs.z3fastmem_size); + addr += changed_prefs.z3fastmem_size; + addr = expansion_startaddress(addr, changed_prefs.rtgmem_size); + p96base_offset = addr; // adjust p96mem_offset to beginning of natmem // by subtracting start of original p96mem_offset from natmem_offset if (p96base_offset >= 0x10000000) { diff --git a/od-win32/win32.h b/od-win32/win32.h index c7c0191a..cf28c2c7 100644 --- a/od-win32/win32.h +++ b/od-win32/win32.h @@ -20,12 +20,12 @@ #define LANG_DLL_FULL_VERSION_MATCH 1 #if WINUAEPUBLICBETA -#define WINUAEBETA _T("7") +#define WINUAEBETA _T("8") #else #define WINUAEBETA _T("") #endif -#define WINUAEDATE MAKEBD(2014, 7, 29) +#define WINUAEDATE MAKEBD(2014, 7, 31) //#define WINUAEEXTRA _T("AmiKit Preview") //#define WINUAEEXTRA _T("Amiga Forever Edition") diff --git a/od-win32/win32gui.cpp b/od-win32/win32gui.cpp index 59933650..6d890f76 100644 --- a/od-win32/win32gui.cpp +++ b/od-win32/win32gui.cpp @@ -6034,11 +6034,13 @@ static void enable_for_chipsetdlg (HWND hDlg) ew (hDlg, IDC_CYCLEEXACT, FALSE); #endif ew (hDlg, IDC_GENLOCK, full_property_sheet); +#if 0 ew (hDlg, IDC_BLITIMM, enable); if (enable == FALSE) { workprefs.immediate_blits = 0; CheckDlgButton (hDlg, IDC_BLITIMM, FALSE); } +#endif if (workprefs.immediate_blits && workprefs.waiting_blits) { workprefs.waiting_blits = 0; CheckDlgButton (hDlg, IDC_BLITWAIT, FALSE); @@ -6984,7 +6986,7 @@ static void values_from_chipsetdlg (HWND hDlg, UINT msg, WPARAM wParam, LPARAM l if (n) { if (workprefs.cpu_model == 68000) workprefs.cpu_compatible = 1; - if (workprefs.cpu_model <= 68020) + if (workprefs.cpu_model <= 68030) workprefs.m68k_speed = 0; workprefs.immediate_blits = 0; workprefs.gfx_framerate = 1; diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt index 6baf1b65..c0c33595 100644 --- a/od-win32/winuaechangelog.txt +++ b/od-win32/winuaechangelog.txt @@ -18,6 +18,17 @@ Things that may happen in 2015: - restore only single input target to default. +Beta 8: + +- When loading old config which has both cycle-exact and fastest possible enabled: disable fastest possible. + Previously this combination was invalid but some for some reason old configs can have both set. +- One second boot delay was always active, even when restoring statefile.. +- "Fastest possible" with cycle-exact now works as designed, removes all CPU internal processing cycles, only + affecs 68000, 68020 and 68030 models. (68040+ and 68030 MMU is always internally immediate). This should be + better option (uses less CPU time) than using MHz adjustment if you want fast CPU in cycle-exact mode. +- Immediate blitter is now selectable in cycle-exact modes. +- Some more Z3 autoconfig mapping tweaks. (Warp Engine..) + Beta 7: - NCR93C94/FAS216 SCSI emulation write didn't work correct and wrote corrupted data, fixed. Added also check