From: Klaus Treichel Date: Sun, 12 Sep 2010 15:25:28 +0000 (+0200) Subject: Remove the *eq_inv and *ne_inv float compare and branch opcodes because X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=bffafd0c9c868673df27bba1b3cc24a88e5faf1e;p=francis%2Flibjit.git Remove the *eq_inv and *ne_inv float compare and branch opcodes because they behave exactly the same as the corresponding opcodes without the _inv suffix. --- diff --git a/ChangeLog b/ChangeLog index 78bbc4a..e051067 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,26 @@ +2010-09-12 Klaus Treichel + + * config/jit-opcodes.ops: Remove the *eq_inv and *ne_inv float + compare a branch opcodes because they behave exactly the same as + the corresponding opcodes without the _INV suffix. + Add macros to map the removed opcodes to their counterparts without + the _INV suffix. + + * jit/jit-insn.c (jit_insn_to_not_bool): Replace the mappings + to *EQ_INV and *NE_INV by mappings to *EQ and *NE. + Remove the mappings for *EQ_INV and *NE_INV. + (jit_insn_branch_if): likwise + (jit_insn_branch_if_not): likewise + + * jit/jit-interp.c (_jit_run_function): Remove handling of + the *EQ_INV and *NE_INV opcodes. + + * jt/jit-rules-interp.c (_jit_gen_insn): Remove the *EQ_INV + and *NE_INV cases. + + * jit/jit-rules-x86-64.ins.c: Remove handling of the *EQ_INV and *NE_INV + opcodes. + 2010-08-10 Klaus Treichel * config/jit-opcodes.ops: Fix arg1 for the address_of opcode. diff --git a/config/jit-opcodes.ops b/config/jit-opcodes.ops index 7beb139..1637474 100644 --- a/config/jit-opcodes.ops +++ b/config/jit-opcodes.ops @@ -238,8 +238,6 @@ opcodes(JIT_OP_, "jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]") op_def("br_fle", <=) { op_type(branch), op_values(empty, float32, float32) } op_def("br_fgt", >) { op_type(branch), op_values(empty, float32, float32) } op_def("br_fge", >=) { op_type(branch), op_values(empty, float32, float32) } - op_def("br_feq_inv") { op_type(branch), op_values(empty, float32, float32) } - op_def("br_fne_inv") { op_type(branch), op_values(empty, float32, float32) } op_def("br_flt_inv") { op_type(branch), op_values(empty, float32, float32) } op_def("br_fle_inv") { op_type(branch), op_values(empty, float32, float32) } op_def("br_fgt_inv") { op_type(branch), op_values(empty, float32, float32) } @@ -250,8 +248,6 @@ opcodes(JIT_OP_, "jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]") op_def("br_dle", <=) { op_type(branch), op_values(empty, float64, float64) } op_def("br_dgt", >) { op_type(branch), op_values(empty, float64, float64) } op_def("br_dge", >=) { op_type(branch), op_values(empty, float64, float64) } - op_def("br_deq_inv") { op_type(branch), op_values(empty, float64, float64) } - op_def("br_dne_inv") { op_type(branch), op_values(empty, float64, float64) } op_def("br_dlt_inv") { op_type(branch), op_values(empty, float64, float64) } op_def("br_dle_inv") { op_type(branch), op_values(empty, float64, float64) } op_def("br_dgt_inv") { op_type(branch), op_values(empty, float64, float64) } @@ -262,8 +258,6 @@ opcodes(JIT_OP_, "jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]") op_def("br_nfle", <=) { op_type(branch), op_values(empty, nfloat, nfloat) } op_def("br_nfgt", >) { op_type(branch), op_values(empty, nfloat, nfloat) } op_def("br_nfge", >=) { op_type(branch), op_values(empty, nfloat, nfloat) } - op_def("br_nfeq_inv") { op_type(branch), op_values(empty, nfloat, nfloat) } - op_def("br_nfne_inv") { op_type(branch), op_values(empty, nfloat, nfloat) } op_def("br_nflt_inv") { op_type(branch), op_values(empty, nfloat, nfloat) } op_def("br_nfle_inv") { op_type(branch), op_values(empty, nfloat, nfloat) } op_def("br_nfgt_inv") { op_type(branch), op_values(empty, nfloat, nfloat) } @@ -307,8 +301,6 @@ opcodes(JIT_OP_, "jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]") op_def("fle", <=) { op_values(int, float32, float32) } op_def("fgt", >) { op_values(int, float32, float32) } op_def("fge", >=) { op_values(int, float32, float32) } - op_def("feq_inv") { op_values(int, float32, float32) } - op_def("fne_inv") { op_values(int, float32, float32) } op_def("flt_inv") { op_values(int, float32, float32) } op_def("fle_inv") { op_values(int, float32, float32) } op_def("fgt_inv") { op_values(int, float32, float32) } @@ -319,8 +311,6 @@ opcodes(JIT_OP_, "jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]") op_def("dle", <=) { op_values(int, float64, float64) } op_def("dgt", >) { op_values(int, float64, float64) } op_def("dge", >=) { op_values(int, float64, float64) } - op_def("deq_inv") { op_values(int, float64, float64) } - op_def("dne_inv") { op_values(int, float64, float64) } op_def("dlt_inv") { op_values(int, float64, float64) } op_def("dle_inv") { op_values(int, float64, float64) } op_def("dgt_inv") { op_values(int, float64, float64) } @@ -331,8 +321,6 @@ opcodes(JIT_OP_, "jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]") op_def("nfle", <=) { op_values(int, nfloat, nfloat) } op_def("nfgt", >) { op_values(int, nfloat, nfloat) } op_def("nfge", >=) { op_values(int, nfloat, nfloat) } - op_def("nfeq_inv") { op_values(int, nfloat, nfloat) } - op_def("nfne_inv") { op_values(int, nfloat, nfloat) } op_def("nflt_inv") { op_values(int, nfloat, nfloat) } op_def("nfle_inv") { op_values(int, nfloat, nfloat) } op_def("nfgt_inv") { op_values(int, nfloat, nfloat) } @@ -651,6 +639,23 @@ struct jit_opcode_info #endif JIT_EXPORT_DATA jit_opcode_info_t const jit_opcodes[JIT_OP_NUM_OPCODES]; +/* + * Some obsolete opcodes that have been removed because they are duplicates + * of other opcodes. + */ +#define JIT_OP_FEQ_INV JIT_OP_FEQ +#define JIT_OP_FNE_INV JIT_OP_FNE +#define JIT_OP_DEQ_INV JIT_OP_DEQ +#define JIT_OP_DNE_INV JIT_OP_DNE +#define JIT_OP_NFEQ_INV JIT_OP_NFEQ +#define JIT_OP_NFNE_INV JIT_OP_NFNE +#define JIT_OP_BR_FEQ_INV JIT_OP_BR_FEQ +#define JIT_OP_BR_FNE_INV JIT_OP_BR_NFE +#define JIT_OP_BR_DEQ_INV JIT_OP_BR_DEQ +#define JIT_OP_BR_DNE_INV JIT_OP_BR_DNE +#define JIT_OP_BR_NFEQ_INV JIT_OP_BR_NFEQ +#define JIT_OP_BR_NFNE_INV JIT_OP_BR_NFNE + #ifdef __cplusplus }; #endif diff --git a/jit/jit-insn.c b/jit/jit-insn.c index 65c6606..9c5b3fd 100644 --- a/jit/jit-insn.c +++ b/jit/jit-insn.c @@ -2803,38 +2803,32 @@ jit_value_t jit_insn_to_not_bool(jit_function_t func, jit_value_t value1) case JIT_OP_LGT_UN: opcode = JIT_OP_LLE_UN; break; case JIT_OP_LGE: opcode = JIT_OP_LLT; break; case JIT_OP_LGE_UN: opcode = JIT_OP_LLT_UN; break; - case JIT_OP_FEQ: opcode = JIT_OP_FNE_INV; break; - case JIT_OP_FNE: opcode = JIT_OP_FEQ_INV; break; + case JIT_OP_FEQ: opcode = JIT_OP_FNE; break; + case JIT_OP_FNE: opcode = JIT_OP_FEQ; break; case JIT_OP_FLT: opcode = JIT_OP_FGE_INV; break; case JIT_OP_FLE: opcode = JIT_OP_FGT_INV; break; case JIT_OP_FGT: opcode = JIT_OP_FLE_INV; break; case JIT_OP_FGE: opcode = JIT_OP_FLT_INV; break; - case JIT_OP_FEQ_INV: opcode = JIT_OP_FNE; break; - case JIT_OP_FNE_INV: opcode = JIT_OP_FEQ; break; case JIT_OP_FLT_INV: opcode = JIT_OP_FGE; break; case JIT_OP_FLE_INV: opcode = JIT_OP_FGT; break; case JIT_OP_FGT_INV: opcode = JIT_OP_FLE; break; case JIT_OP_FGE_INV: opcode = JIT_OP_FLT; break; - case JIT_OP_DEQ: opcode = JIT_OP_DNE_INV; break; - case JIT_OP_DNE: opcode = JIT_OP_DEQ_INV; break; + case JIT_OP_DEQ: opcode = JIT_OP_DNE; break; + case JIT_OP_DNE: opcode = JIT_OP_DEQ; break; case JIT_OP_DLT: opcode = JIT_OP_DGE_INV; break; case JIT_OP_DLE: opcode = JIT_OP_DGT_INV; break; case JIT_OP_DGT: opcode = JIT_OP_DLE_INV; break; case JIT_OP_DGE: opcode = JIT_OP_DLT_INV; break; - case JIT_OP_DEQ_INV: opcode = JIT_OP_DNE; break; - case JIT_OP_DNE_INV: opcode = JIT_OP_DEQ; break; case JIT_OP_DLT_INV: opcode = JIT_OP_DGE; break; case JIT_OP_DLE_INV: opcode = JIT_OP_DGT; break; case JIT_OP_DGT_INV: opcode = JIT_OP_DLE; break; case JIT_OP_DGE_INV: opcode = JIT_OP_DLT; break; - case JIT_OP_NFEQ: opcode = JIT_OP_NFNE_INV; break; - case JIT_OP_NFNE: opcode = JIT_OP_NFEQ_INV; break; + case JIT_OP_NFEQ: opcode = JIT_OP_NFNE; break; + case JIT_OP_NFNE: opcode = JIT_OP_NFEQ; break; case JIT_OP_NFLT: opcode = JIT_OP_NFGE_INV; break; case JIT_OP_NFLE: opcode = JIT_OP_NFGT_INV; break; case JIT_OP_NFGT: opcode = JIT_OP_NFLE_INV; break; case JIT_OP_NFGE: opcode = JIT_OP_NFLT_INV; break; - case JIT_OP_NFEQ_INV: opcode = JIT_OP_NFNE; break; - case JIT_OP_NFNE_INV: opcode = JIT_OP_NFEQ; break; case JIT_OP_NFLT_INV: opcode = JIT_OP_NFGE; break; case JIT_OP_NFLE_INV: opcode = JIT_OP_NFGT; break; case JIT_OP_NFGT_INV: opcode = JIT_OP_NFLE; break; @@ -3692,8 +3686,6 @@ int jit_insn_branch_if case JIT_OP_FLE: opcode = JIT_OP_BR_FLE; break; case JIT_OP_FGT: opcode = JIT_OP_BR_FGT; break; case JIT_OP_FGE: opcode = JIT_OP_BR_FGE; break; - case JIT_OP_FEQ_INV: opcode = JIT_OP_BR_FEQ_INV; break; - case JIT_OP_FNE_INV: opcode = JIT_OP_BR_FNE_INV; break; case JIT_OP_FLT_INV: opcode = JIT_OP_BR_FLT_INV; break; case JIT_OP_FLE_INV: opcode = JIT_OP_BR_FLE_INV; break; case JIT_OP_FGT_INV: opcode = JIT_OP_BR_FGT_INV; break; @@ -3704,8 +3696,6 @@ int jit_insn_branch_if case JIT_OP_DLE: opcode = JIT_OP_BR_DLE; break; case JIT_OP_DGT: opcode = JIT_OP_BR_DGT; break; case JIT_OP_DGE: opcode = JIT_OP_BR_DGE; break; - case JIT_OP_DEQ_INV: opcode = JIT_OP_BR_DEQ_INV; break; - case JIT_OP_DNE_INV: opcode = JIT_OP_BR_DNE_INV; break; case JIT_OP_DLT_INV: opcode = JIT_OP_BR_DLT_INV; break; case JIT_OP_DLE_INV: opcode = JIT_OP_BR_DLE_INV; break; case JIT_OP_DGT_INV: opcode = JIT_OP_BR_DGT_INV; break; @@ -3716,8 +3706,6 @@ int jit_insn_branch_if case JIT_OP_NFLE: opcode = JIT_OP_BR_NFLE; break; case JIT_OP_NFGT: opcode = JIT_OP_BR_NFGT; break; case JIT_OP_NFGE: opcode = JIT_OP_BR_NFGE; break; - case JIT_OP_NFEQ_INV: opcode = JIT_OP_BR_NFEQ_INV; break; - case JIT_OP_NFNE_INV: opcode = JIT_OP_BR_NFNE_INV; break; case JIT_OP_NFLT_INV: opcode = JIT_OP_BR_NFLT_INV; break; case JIT_OP_NFLE_INV: opcode = JIT_OP_BR_NFLE_INV; break; case JIT_OP_NFGT_INV: opcode = JIT_OP_BR_NFGT_INV; break; @@ -3904,38 +3892,32 @@ int jit_insn_branch_if_not case JIT_OP_LGT_UN: opcode = JIT_OP_BR_LLE_UN; break; case JIT_OP_LGE: opcode = JIT_OP_BR_LLT; break; case JIT_OP_LGE_UN: opcode = JIT_OP_BR_LLT_UN; break; - case JIT_OP_FEQ: opcode = JIT_OP_BR_FNE_INV; break; - case JIT_OP_FNE: opcode = JIT_OP_BR_FEQ_INV; break; + case JIT_OP_FEQ: opcode = JIT_OP_BR_FNE; break; + case JIT_OP_FNE: opcode = JIT_OP_BR_FEQ; break; case JIT_OP_FLT: opcode = JIT_OP_BR_FGE_INV; break; case JIT_OP_FLE: opcode = JIT_OP_BR_FGT_INV; break; case JIT_OP_FGT: opcode = JIT_OP_BR_FLE_INV; break; case JIT_OP_FGE: opcode = JIT_OP_BR_FLT_INV; break; - case JIT_OP_FEQ_INV: opcode = JIT_OP_BR_FNE; break; - case JIT_OP_FNE_INV: opcode = JIT_OP_BR_FEQ; break; case JIT_OP_FLT_INV: opcode = JIT_OP_BR_FGE; break; case JIT_OP_FLE_INV: opcode = JIT_OP_BR_FGT; break; case JIT_OP_FGT_INV: opcode = JIT_OP_BR_FLE; break; case JIT_OP_FGE_INV: opcode = JIT_OP_BR_FLT; break; - case JIT_OP_DEQ: opcode = JIT_OP_BR_DNE_INV; break; - case JIT_OP_DNE: opcode = JIT_OP_BR_DEQ_INV; break; + case JIT_OP_DEQ: opcode = JIT_OP_BR_DNE; break; + case JIT_OP_DNE: opcode = JIT_OP_BR_DEQ; break; case JIT_OP_DLT: opcode = JIT_OP_BR_DGE_INV; break; case JIT_OP_DLE: opcode = JIT_OP_BR_DGT_INV; break; case JIT_OP_DGT: opcode = JIT_OP_BR_DLE_INV; break; case JIT_OP_DGE: opcode = JIT_OP_BR_DLT_INV; break; - case JIT_OP_DEQ_INV: opcode = JIT_OP_BR_DNE; break; - case JIT_OP_DNE_INV: opcode = JIT_OP_BR_DEQ; break; case JIT_OP_DLT_INV: opcode = JIT_OP_BR_DGE; break; case JIT_OP_DLE_INV: opcode = JIT_OP_BR_DGT; break; case JIT_OP_DGT_INV: opcode = JIT_OP_BR_DLE; break; case JIT_OP_DGE_INV: opcode = JIT_OP_BR_DLT; break; - case JIT_OP_NFEQ: opcode = JIT_OP_BR_NFNE_INV; break; - case JIT_OP_NFNE: opcode = JIT_OP_BR_NFEQ_INV; break; + case JIT_OP_NFEQ: opcode = JIT_OP_BR_NFNE; break; + case JIT_OP_NFNE: opcode = JIT_OP_BR_NFEQ; break; case JIT_OP_NFLT: opcode = JIT_OP_BR_NFGE_INV; break; case JIT_OP_NFLE: opcode = JIT_OP_BR_NFGT_INV; break; case JIT_OP_NFGT: opcode = JIT_OP_BR_NFLE_INV; break; case JIT_OP_NFGE: opcode = JIT_OP_BR_NFLT_INV; break; - case JIT_OP_NFEQ_INV: opcode = JIT_OP_BR_NFNE; break; - case JIT_OP_NFNE_INV: opcode = JIT_OP_BR_NFEQ; break; case JIT_OP_NFLT_INV: opcode = JIT_OP_BR_NFGE; break; case JIT_OP_NFLE_INV: opcode = JIT_OP_BR_NFGT; break; case JIT_OP_NFGT_INV: opcode = JIT_OP_BR_NFLE; break; @@ -3979,7 +3961,7 @@ int jit_insn_branch_if_not } else if(type == jit_type_float32) { - opcode = JIT_OP_BR_FEQ_INV; + opcode = JIT_OP_BR_FEQ; value2 = jit_value_create_float32_constant (func, jit_type_float32, (jit_float32)0.0); if(!value2) @@ -3989,7 +3971,7 @@ int jit_insn_branch_if_not } else if(type == jit_type_float64) { - opcode = JIT_OP_BR_DEQ_INV; + opcode = JIT_OP_BR_DEQ; value2 = jit_value_create_float64_constant (func, jit_type_float64, (jit_float64)0.0); if(!value2) @@ -4000,7 +3982,7 @@ int jit_insn_branch_if_not else { type = jit_type_nfloat; - opcode = JIT_OP_BR_NFEQ_INV; + opcode = JIT_OP_BR_NFEQ; value2 = jit_value_create_nfloat_constant (func, jit_type_nfloat, (jit_nfloat)0.0); if(!value2) @@ -4349,7 +4331,7 @@ static jit_value_t apply_unary_conversion * @end deftypefun @*/ jit_value_t jit_insn_convert(jit_function_t func, jit_value_t value, - jit_type_t type, int overflow_check) + jit_type_t type, int overflow_check) { jit_type_t vtype; const jit_convert_info_t *opcode_map; @@ -4377,7 +4359,7 @@ jit_value_t jit_insn_convert(jit_function_t func, jit_value_t value, jit_constant_t const_value; const_value = jit_value_get_constant(value); if(jit_constant_convert(&const_value, &const_value, - type, overflow_check)) + type, overflow_check)) { return jit_value_create_constant(func, &const_value); } diff --git a/jit/jit-interp.c b/jit/jit-interp.c index f91072e..15717c5 100644 --- a/jit/jit-interp.c +++ b/jit/jit-interp.c @@ -1801,34 +1801,6 @@ restart_tail: } VMBREAK; - VMCASE(JIT_OP_BR_FEQ_INV): - { - /* Branch if 32-bit floats are equal; invert nan test */ - if(!jit_float32_ne(VM_R1_FLOAT32, VM_R2_FLOAT32)) - { - pc = VM_BR_TARGET; - } - else - { - VM_MODIFY_PC(2); - } - } - VMBREAK; - - VMCASE(JIT_OP_BR_FNE_INV): - { - /* Branch if 32-bit floats are not equal; invert nan test */ - if(!jit_float32_eq(VM_R1_FLOAT32, VM_R2_FLOAT32)) - { - pc = VM_BR_TARGET; - } - else - { - VM_MODIFY_PC(2); - } - } - VMBREAK; - VMCASE(JIT_OP_BR_FLT_INV): { /* Branch if 32-bit floats are less than; invert nan test */ @@ -1969,34 +1941,6 @@ restart_tail: } VMBREAK; - VMCASE(JIT_OP_BR_DEQ_INV): - { - /* Branch if 64-bit floats are equal; invert nan test */ - if(!jit_float64_ne(VM_R1_FLOAT64, VM_R2_FLOAT64)) - { - pc = VM_BR_TARGET; - } - else - { - VM_MODIFY_PC(2); - } - } - VMBREAK; - - VMCASE(JIT_OP_BR_DNE_INV): - { - /* Branch if 64-bit floats are not equal; invert nan test */ - if(!jit_float64_eq(VM_R1_FLOAT64, VM_R2_FLOAT64)) - { - pc = VM_BR_TARGET; - } - else - { - VM_MODIFY_PC(2); - } - } - VMBREAK; - VMCASE(JIT_OP_BR_DLT_INV): { /* Branch if 64-bit floats are less than; invert nan test */ @@ -2137,34 +2081,6 @@ restart_tail: } VMBREAK; - VMCASE(JIT_OP_BR_NFEQ_INV): - { - /* Branch if native floats are equal; invert nan test */ - if(!jit_nfloat_ne(VM_R1_NFLOAT, VM_R2_NFLOAT)) - { - pc = VM_BR_TARGET; - } - else - { - VM_MODIFY_PC(2); - } - } - VMBREAK; - - VMCASE(JIT_OP_BR_NFNE_INV): - { - /* Branch if native floats are not equal; invert nan test */ - if(!jit_nfloat_eq(VM_R1_NFLOAT, VM_R2_NFLOAT)) - { - pc = VM_BR_TARGET; - } - else - { - VM_MODIFY_PC(2); - } - } - VMBREAK; - VMCASE(JIT_OP_BR_NFLT_INV): { /* Branch if native floats are less than; invert nan test */ @@ -2526,22 +2442,6 @@ restart_tail: } VMBREAK; - VMCASE(JIT_OP_FEQ_INV): - { - /* Compare 32-bit floats for equal; invert nan test */ - VM_R0_INT = !jit_float32_ne(VM_R1_FLOAT32, VM_R2_FLOAT32); - VM_MODIFY_PC(1); - } - VMBREAK; - - VMCASE(JIT_OP_FNE_INV): - { - /* Compare 32-bit floats for not equal; invert nan test */ - VM_R0_INT = !jit_float32_eq(VM_R1_FLOAT32, VM_R2_FLOAT32); - VM_MODIFY_PC(1); - } - VMBREAK; - VMCASE(JIT_OP_FLT_INV): { /* Compare 32-bit floats for less than; invert nan test */ @@ -2622,22 +2522,6 @@ restart_tail: } VMBREAK; - VMCASE(JIT_OP_DEQ_INV): - { - /* Compare 64-bit floats for equal; invert nan test */ - VM_R0_INT = !jit_float64_ne(VM_R1_FLOAT64, VM_R2_FLOAT64); - VM_MODIFY_PC(1); - } - VMBREAK; - - VMCASE(JIT_OP_DNE_INV): - { - /* Compare 64-bit floats for equal; invert nan test */ - VM_R0_INT = !jit_float64_eq(VM_R1_FLOAT64, VM_R2_FLOAT64); - VM_MODIFY_PC(1); - } - VMBREAK; - VMCASE(JIT_OP_DLT_INV): { /* Compare 64-bit floats for equal; invert nan test */ @@ -2718,22 +2602,6 @@ restart_tail: } VMBREAK; - VMCASE(JIT_OP_NFEQ_INV): - { - /* Compare native floats for equal; invert nan test */ - VM_R0_INT = !jit_nfloat_ne(VM_R1_NFLOAT, VM_R2_NFLOAT); - VM_MODIFY_PC(1); - } - VMBREAK; - - VMCASE(JIT_OP_NFNE_INV): - { - /* Compare native floats for not equal; invert nan test */ - VM_R0_INT = !jit_nfloat_eq(VM_R1_NFLOAT, VM_R2_NFLOAT); - VM_MODIFY_PC(1); - } - VMBREAK; - VMCASE(JIT_OP_NFLT_INV): { /* Compare native floats for less than; invert nan test */ diff --git a/jit/jit-rules-interp.c b/jit/jit-rules-interp.c index 34b6a57..7cccde3 100644 --- a/jit/jit-rules-interp.c +++ b/jit/jit-rules-interp.c @@ -1066,8 +1066,6 @@ void _jit_gen_insn(jit_gencode_t gen, jit_function_t func, case JIT_OP_BR_FLE: case JIT_OP_BR_FGT: case JIT_OP_BR_FGE: - case JIT_OP_BR_FEQ_INV: - case JIT_OP_BR_FNE_INV: case JIT_OP_BR_FLT_INV: case JIT_OP_BR_FLE_INV: case JIT_OP_BR_FGT_INV: @@ -1078,8 +1076,6 @@ void _jit_gen_insn(jit_gencode_t gen, jit_function_t func, case JIT_OP_BR_DLE: case JIT_OP_BR_DGT: case JIT_OP_BR_DGE: - case JIT_OP_BR_DEQ_INV: - case JIT_OP_BR_DNE_INV: case JIT_OP_BR_DLT_INV: case JIT_OP_BR_DLE_INV: case JIT_OP_BR_DGT_INV: @@ -1090,8 +1086,6 @@ void _jit_gen_insn(jit_gencode_t gen, jit_function_t func, case JIT_OP_BR_NFLE: case JIT_OP_BR_NFGT: case JIT_OP_BR_NFGE: - case JIT_OP_BR_NFEQ_INV: - case JIT_OP_BR_NFNE_INV: case JIT_OP_BR_NFLT_INV: case JIT_OP_BR_NFLE_INV: case JIT_OP_BR_NFGT_INV: diff --git a/jit/jit-rules-x86-64.ins b/jit/jit-rules-x86-64.ins index f03b9e5..34c87ff 100644 --- a/jit/jit-rules-x86-64.ins +++ b/jit/jit-rules-x86-64.ins @@ -2188,7 +2188,7 @@ JIT_OP_BR_LGE_UN: branch inst = output_branch(func, inst, 0x73 /* ge_un */, insn); } -JIT_OP_BR_FEQ, JIT_OP_BR_FEQ_INV: branch, commutative +JIT_OP_BR_FEQ: branch, commutative [xreg, imm] -> { inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_Z, $1, (void *)$2, 0, 0, insn); } @@ -2199,7 +2199,7 @@ JIT_OP_BR_FEQ, JIT_OP_BR_FEQ_INV: branch, commutative inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_Z, $1, $2, 0, 0, insn); } -JIT_OP_BR_FNE, JIT_OP_BR_FNE_INV: branch, commutative +JIT_OP_BR_FNE: branch, commutative [xreg, imm] -> { inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NZ, $1, (void *)$2, 0, 1, insn); } @@ -2298,7 +2298,7 @@ JIT_OP_BR_FGE_INV: branch inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_NC, $1, $2, 0, 1, insn); } -JIT_OP_BR_DEQ, JIT_OP_BR_DEQ_INV: branch, commutative +JIT_OP_BR_DEQ: branch, commutative [xreg, imm] -> { inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_Z, $1, (void *)$2, 1, 0, insn); } @@ -2309,7 +2309,7 @@ JIT_OP_BR_DEQ, JIT_OP_BR_DEQ_INV: branch, commutative inst = xmm_cmp_brcc_reg_reg(func, inst, X86_CC_Z, $1, $2, 1, 0, insn); } -JIT_OP_BR_DNE, JIT_OP_BR_DNE_INV: branch, commutative +JIT_OP_BR_DNE: branch, commutative [xreg, imm] -> { inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NZ, $1, (void *)$2, 1, 1, insn); } @@ -2708,7 +2708,7 @@ JIT_OP_LGE_UN: inst = setcc_reg(inst, $1, X86_CC_GE, 0); } -JIT_OP_FEQ, JIT_OP_FEQ_INV: commutative +JIT_OP_FEQ: commutative [=+reg, xreg, imm, scratch reg, space("23")] -> { inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_Z, $2, (void *)$3, $4, 0, 0); } @@ -2716,7 +2716,7 @@ JIT_OP_FEQ, JIT_OP_FEQ_INV: commutative inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_Z, $2, $3, $4, 0, 0); } -JIT_OP_FNE, JIT_OP_FNE_INV: commutative +JIT_OP_FNE: commutative [=+reg, xreg, imm, scratch reg, space("23")] -> { inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NZ, $2, (void *)$3, $4, 0, 1); } @@ -2788,7 +2788,7 @@ JIT_OP_FGE_INV: inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NC, $2, $3, $4, 0, 1); } -JIT_OP_DEQ, JIT_OP_DEQ_INV: commutative +JIT_OP_DEQ: commutative [=+reg, xreg, imm, scratch reg, space("24")] -> { inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_Z, $2, (void *)$3, $4, 1, 0); } @@ -2796,7 +2796,7 @@ JIT_OP_DEQ, JIT_OP_DEQ_INV: commutative inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_Z, $2, $3, $4, 1, 0); } -JIT_OP_DNE, JIT_OP_DNE_INV: commutative +JIT_OP_DNE: commutative [=+reg, xreg, imm, scratch reg, space("24")] -> { inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NZ, $2, (void *)$3, $4, 1, 1); }