From: Toni Wilen Date: Sun, 27 Aug 2017 14:22:11 +0000 (+0300) Subject: 68030 cache fixes, assembler BSR, fix compatibility with pre-3.6 68020CE statefiles. X-Git-Tag: 3600~110 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=c83865bd25ae0b45862edbbd3b3333ab00672dab;p=francis%2Fwinuae.git 68030 cache fixes, assembler BSR, fix compatibility with pre-3.6 68020CE statefiles. --- diff --git a/debug.cpp b/debug.cpp index 532c0e5d..77935025 100644 --- a/debug.cpp +++ b/debug.cpp @@ -161,8 +161,8 @@ static const TCHAR help[] = { _T(" s \"\"/ [] []\n") _T(" Search for string/bytes.\n") _T(" T or Tt Show exec tasks and their PCs.\n") - _T(" Td,Tl,Tr,Tp,Ts,TS,Ti,TO,TM Show devs, libs, resources, ports, semaphores,\n") - _T(" residents, interrupts, doslist and memorylist.\n") + _T(" Td,Tl,Tr,Tp,Ts,TS,Ti,TO,TM,Tf Show devs, libs, resources, ports, semaphores,\n") + _T(" residents, interrupts, doslist, memorylist, fsres.\n") _T(" b Step to previous state capture position.\n") _T(" M Enable or disable audio channels, bitplanes or sprites.\n") _T(" sp [] Dump sprite information.\n") @@ -378,7 +378,7 @@ uae_u32 get_ilong_debug (uaecptr addr) } } -static int safe_addr (uaecptr addr, int size) +int debug_safe_addr (uaecptr addr, int size) { if (debug_mmu_mode) { flagtype olds = regs.s; @@ -1089,7 +1089,7 @@ uaecptr dumpmem2 (uaecptr addr, TCHAR *out, int osize) for (i = 0; i < cols; i++) { uae_u8 b1, b2; b1 = b2 = 0; - if (safe_addr (addr, 1)) { + if (debug_safe_addr (addr, 1)) { b1 = get_byte_debug (addr + 0); b2 = get_byte_debug (addr + 1); _stprintf (out + 9 + i * 5, _T("%02X%02X "), b1, b2); @@ -2592,8 +2592,12 @@ static int debug_mem_off (uaecptr *addrp) ba = debug_mem_banks[offset]; if (!ba) return offset; - if (ba->mask || ba->startmask) - addr = (addr & ba->mask) | ba->startmask; + if (ba->mask || ba->startmask) { + addr -= ba->start; + addr &= ba->mask; + addr += ba->start; + addr |= ba->startmask; + } *addrp = addr; return offset; } @@ -4032,8 +4036,9 @@ static void show_exec_lists (TCHAR *t) while (doslist) { int type = get_long_debug (doslist + 4); uaecptr msgport = get_long_debug (doslist + 8); + uaecptr lock = get_long_debug(doslist + 12); TCHAR *name = getfrombstr(get_long_debug(doslist + 40)); - console_out_f(_T("%08x: %d %08x '%s'\n"), doslist, type, msgport, name); + console_out_f(_T("%08x: Type=%d Port=%08x Lock=%08x '%s'\n"), doslist, type, msgport, lock, name); if (type == 0) { uaecptr fssm = get_long_debug(doslist + 28) << 2; console_out_f (_T(" - H=%08x Stack=%5d Pri=%2d Start=%08x Seg=%08x GV=%08x\n"), @@ -4065,6 +4070,11 @@ static void show_exec_lists (TCHAR *t) } xfree(unitname); } + } else if (type == 2) { + console_out_f(_T(" - VolumeDate=%08x %08x %08x LockList=%08x DiskType=%08x\n"), + get_long_debug(doslist + 16), get_long_debug(doslist + 20), get_long_debug(doslist + 24), + get_long_debug(doslist + 28), + get_long_debug(doslist + 32)); } xfree (name); doslist = get_long_debug (doslist) << 2; diff --git a/include/debug.h b/include/debug.h index c5f43b6a..846e512f 100644 --- a/include/debug.h +++ b/include/debug.h @@ -56,6 +56,7 @@ extern int debug_peek_memory_8 (uaecptr addr); extern int debug_write_memory_16 (uaecptr addr, uae_u16 v); extern int debug_write_memory_8 (uaecptr addr, uae_u8 v); extern bool debug_enforcer(void); +extern int debug_safe_addr(uaecptr addr, int size); #define BREAKPOINT_TOTAL 20 #define BREAKPOINT_REG_Dx 0 diff --git a/include/newcpu.h b/include/newcpu.h index 443c9b61..464f0c2f 100644 --- a/include/newcpu.h +++ b/include/newcpu.h @@ -258,11 +258,14 @@ struct cputracestruct uae_u32 msp, vbr; uae_u32 cacr, caar; uae_u16 prefetch020[CPU_PIPELINE_MAX]; - uae_u8 prefetch030_valid[CPU_PIPELINE_MAX]; + uae_u8 prefetch020_valid[CPU_PIPELINE_MAX]; uae_u32 prefetch020addr; uae_u32 cacheholdingdata020; uae_u32 cacheholdingaddr020; struct cache020 caches020[CACHELINES020]; + int pipeline_pos; + int pipeline_r8[2]; + int pipeline_stop; uae_u32 startcycles; int needendcycles; diff --git a/include/readcpu.h b/include/readcpu.h index d1bf8011..4fc4f2ec 100644 --- a/include/readcpu.h +++ b/include/readcpu.h @@ -43,6 +43,7 @@ struct mnemolookup { instrmnem mnemo; const TCHAR *name; const TCHAR *friendlyname; + uae_u32 flags; }; extern struct mnemolookup lookuptab[]; diff --git a/newcpu.cpp b/newcpu.cpp index a09e5ce3..e68633ea 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -1073,12 +1073,12 @@ static void set_x_funcs (void) x_get_word = get_word_cache_040; x_get_byte = get_byte_cache_040; } else { - x_phys_get_byte = mem_access_delay_byte_read_c040; - x_phys_get_word = mem_access_delay_word_read_c040; - x_phys_get_long = mem_access_delay_long_read_c040; - x_phys_put_byte = mem_access_delay_byte_write_c040; - x_phys_put_word = mem_access_delay_word_write_c040; - x_phys_put_long = mem_access_delay_long_write_c040; + x_get_byte = mem_access_delay_byte_read_c040; + x_get_word = mem_access_delay_word_read_c040; + x_get_long = mem_access_delay_long_read_c040; + x_put_byte = mem_access_delay_byte_write_c040; + x_put_word = mem_access_delay_word_write_c040; + x_put_long = mem_access_delay_long_write_c040; } x_do_cycles = do_cycles; x_do_cycles_pre = do_cycles; @@ -2090,11 +2090,85 @@ struct regstruct regs, mmu_backup_regs; struct flag_struct regflags; static int m68kpc_offset; -#if 0 -#define get_ibyte_1(o) get_byte (regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1) -#define get_iword_1(o) get_word (regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) -#define get_ilong_1(o) get_long (regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) -#endif +static const TCHAR *fpsizes[] = { + _T("L"), + _T("S"), + _T("X"), + _T("P"), + _T("W"), + _T("D"), + _T("B"), + _T("P") +}; +static const int fpsizeconv[] = { + sz_long, + sz_single, + sz_extended, + sz_packed, + sz_word, + sz_double, + sz_byte, + sz_packed +}; +static const int datasizes[] = { + 1, + 2, + 4, + 4, + 8, + 12, + 12 +}; + +static void showea_val(TCHAR *buffer, uae_u16 opcode, uaecptr addr, int size) +{ + struct mnemolookup *lookup; + instr *table = &table68k[opcode]; + + for (lookup = lookuptab; lookup->mnemo != table->mnemo; lookup++) + ; + if (!(lookup->flags & 1)) + return; + buffer += _tcslen(buffer); + if (debug_safe_addr(addr, datasizes[size])) { + switch (size) + { + case sz_byte: + _stprintf(buffer, _T(" [%02x]"), get_byte_debug(addr)); + break; + case sz_word: + _stprintf(buffer, _T(" [%04x]"), get_word_debug(addr)); + break; + case sz_long: + _stprintf(buffer, _T(" [%08x]"), get_long_debug(addr)); + break; + case sz_single: + { + fpdata fp; + fpp_to_single(&fp, get_long_debug(addr)); + _stprintf(buffer, _T("[%s]"), fpp_print(&fp, 0)); + } + break; + case sz_double: + { + fpdata fp; + fpp_to_double(&fp, get_long_debug(addr), get_long_debug(addr + 4)); + _stprintf(buffer, _T("[%s]"), fpp_print(&fp, 0)); + } + break; + case sz_extended: + { + fpdata fp; + fpp_to_exten(&fp, get_long_debug(addr), get_long_debug(addr + 4), get_long_debug(addr + 8)); + _stprintf(buffer, _T("[%s]"), fpp_print(&fp, 0)); + break; + } + case sz_packed: + _stprintf(buffer, _T("[%08x%08x%08x]"), get_long_debug(addr), get_long_debug(addr + 4), get_long_debug(addr + 8)); + break; + } + } +} static uaecptr ShowEA (void *f, uaecptr pc, uae_u16 opcode, int reg, amodes mode, wordsizes size, TCHAR *buf, uae_u32 *eaddr, int safemode) { @@ -2117,14 +2191,17 @@ static uaecptr ShowEA (void *f, uaecptr pc, uae_u16 opcode, int reg, amodes mode case Aind: _stprintf (buffer, _T("(A%d)"), reg); addr = regs.regs[reg + 8]; + showea_val(buffer, opcode, addr, size); break; case Aipi: _stprintf (buffer, _T("(A%d)+"), reg); addr = regs.regs[reg + 8]; + showea_val(buffer, opcode, addr, size); break; case Apdi: _stprintf (buffer, _T("-(A%d)"), reg); addr = regs.regs[reg + 8]; + showea_val(buffer, opcode, addr - datasizes[size], size); break; case Ad16: { @@ -2136,6 +2213,7 @@ static uaecptr ShowEA (void *f, uaecptr pc, uae_u16 opcode, int reg, amodes mode _stprintf (offtxt, _T("$%04x"), disp16); addr = m68k_areg (regs, reg) + disp16; _stprintf (buffer, _T("(A%d, %s) == $%08x"), reg, offtxt, addr); + showea_val(buffer, opcode, addr, size); } break; case Ad8r: @@ -2175,11 +2253,13 @@ static uaecptr ShowEA (void *f, uaecptr pc, uae_u16 opcode, int reg, amodes mode dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3), disp8, addr); } + showea_val(buffer, opcode, addr, size); break; case PC16: disp16 = get_iword_debug (pc); pc += 2; addr += (uae_s16)disp16; _stprintf (buffer, _T("(PC,$%04x) == $%08x"), disp16 & 0xffff, addr); + showea_val(buffer, opcode, addr, size); break; case PC8r: dp = get_iword_debug (pc); pc += 2; @@ -2218,16 +2298,19 @@ static uaecptr ShowEA (void *f, uaecptr pc, uae_u16 opcode, int reg, amodes mode (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3), disp8, addr); } + showea_val(buffer, opcode, addr, size); break; case absw: addr = (uae_s32)(uae_s16)get_iword_debug (pc); _stprintf (buffer, _T("$%04x"), (uae_u16)addr); pc += 2; + showea_val(buffer, opcode, addr, size); break; case absl: addr = get_ilong_debug (pc); _stprintf (buffer, _T("$%08x"), addr); pc += 4; + showea_val(buffer, opcode, addr, size); break; case imm: switch (size){ @@ -5683,8 +5766,9 @@ static void m68k_run_2ce (void) r->cacheholdingdata020 = cputrace.cacheholdingdata020; r->cacheholdingaddr020 = cputrace.cacheholdingaddr020; r->prefetch020addr = cputrace.prefetch020addr; - memcpy (&r->prefetch020, &cputrace.prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16)); - memcpy (&caches020, &cputrace.caches020, sizeof caches020); + memcpy(&r->prefetch020, &cputrace.prefetch020, CPU_PIPELINE_MAX * sizeof(uae_u16)); + memcpy(&r->prefetch020_valid, &cputrace.prefetch020_valid, CPU_PIPELINE_MAX * sizeof(uae_u8)); + memcpy(&caches020, &cputrace.caches020, sizeof caches020); m68k_setpc (cputrace.pc); if (!r->stopped) { @@ -5751,8 +5835,9 @@ static void m68k_run_2ce (void) cputrace.cacheholdingdata020 = r->cacheholdingdata020; cputrace.cacheholdingaddr020 = r->cacheholdingaddr020; cputrace.prefetch020addr = r->prefetch020addr; - memcpy (&cputrace.prefetch020, &r->prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16)); - memcpy (&cputrace.caches020, &caches020, sizeof caches020); + memcpy(&cputrace.prefetch020, &r->prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16)); + memcpy(&cputrace.prefetch020_valid, &r->prefetch020_valid, CPU_PIPELINE_MAX * sizeof(uae_u8)); + memcpy(&cputrace.caches020, &caches020, sizeof caches020); cputrace.memoryoffset = 0; cputrace.cyclecounter = cputrace.cyclecounter_pre = cputrace.cyclecounter_post = 0; @@ -5820,8 +5905,9 @@ static void m68k_run_2p (void) r->cacheholdingdata020 = cputrace.cacheholdingdata020; r->cacheholdingaddr020 = cputrace.cacheholdingaddr020; r->prefetch020addr = cputrace.prefetch020addr; - memcpy (&r->prefetch020, &cputrace.prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16)); - memcpy (&caches020, &cputrace.caches020, sizeof caches020); + memcpy(&r->prefetch020, &cputrace.prefetch020, CPU_PIPELINE_MAX * sizeof(uae_u16)); + memcpy(&r->prefetch020_valid, &cputrace.prefetch020_valid, CPU_PIPELINE_MAX * sizeof(uae_u8)); + memcpy(&caches020, &cputrace.caches020, sizeof caches020); m68k_setpc (cputrace.pc); if (!r->stopped) { @@ -5871,8 +5957,9 @@ static void m68k_run_2p (void) cputrace.cacheholdingdata020 = r->cacheholdingdata020; cputrace.cacheholdingaddr020 = r->cacheholdingaddr020; cputrace.prefetch020addr = r->prefetch020addr; - memcpy (&cputrace.prefetch020, &r->prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16)); - memcpy (&cputrace.caches020, &caches020, sizeof caches020); + memcpy(&cputrace.prefetch020, &r->prefetch020, CPU_PIPELINE_MAX * sizeof(uae_u16)); + memcpy(&cputrace.prefetch020_valid, &r->prefetch020_valid, CPU_PIPELINE_MAX * sizeof(uae_u8)); + memcpy(&cputrace.caches020, &caches020, sizeof caches020); cputrace.memoryoffset = 0; cputrace.cyclecounter = cputrace.cyclecounter_pre = cputrace.cyclecounter_post = 0; @@ -6469,27 +6556,6 @@ static void movemout (TCHAR *out, uae_u16 mask, int mode, int fpmode) addmovemreg(out, &prevreg, &lastreg, &first, -1, fpmode); } -static const TCHAR *fpsizes[] = { - _T("L"), - _T("S"), - _T("X"), - _T("P"), - _T("W"), - _T("D"), - _T("B"), - _T("P") -}; -static const int fpsizeconv[] = { - sz_long, - sz_single, - sz_extended, - sz_packed, - sz_word, - sz_double, - sz_byte, - sz_packed -}; - static void disasm_size (TCHAR *instrname, struct instr *dp) { if (dp->unsized) { @@ -6916,6 +6982,8 @@ int m68k_asm(TCHAR *sline, uae_u16 *out, uaecptr pc) // Common alias if (!_tcscmp(ins, _T("BRA"))) { _tcscpy(ins, _T("BT")); + } else if (!_tcscmp(ins, _T("BSR"))) { + immrelpc = true; } else if (!_tcscmp(ins, _T("MOVEM"))) { if (dmode >= Aind && _tcschr(dstea, '-') == NULL && _tcschr(dstea, '/') == NULL) { _tcscpy(ins, _T("MVMLE")); @@ -7293,14 +7361,8 @@ void m68k_disasm_2 (TCHAR *buf, int bufsize, uaecptr pc, uaecptr *nextpc, int cn pc += 2; if ((extra & 0xfc00) == 0x5c00) { // FMOVECR (=i_FPP with source specifier = 7) fpdata fp; - if (fpu_get_constant(&fp, extra)) -#if USE_LONG_DOUBLE - _stprintf(instrname, _T("FMOVECR.X #%Le,FP%d"), fp.fp, (extra >> 7) & 7); -#else - _stprintf(instrname, _T("FMOVECR.X #%e,FP%d"), fp.fp, (extra >> 7) & 7); -#endif - else - _stprintf(instrname, _T("FMOVECR.X #?,FP%d"), (extra >> 7) & 7); + fpu_get_constant(&fp, extra); + _stprintf(instrname, _T("FMOVECR.X #0x%02x [%s],FP%d"), extra & 0x7f, fpp_print(&fp, 0), (extra >> 7) & 7); } else if ((extra & 0x8000) == 0x8000) { // FMOVEM int dr = (extra >> 13) & 1; int mode; @@ -7874,6 +7936,15 @@ uae_u8 *restore_cpu (uae_u8 *src) regs.chipset_latch_write = restore_u32 (); } + regs.pipeline_pos = -1; + regs.pipeline_stop = 0; + if (flags & 0x4000000 && currprefs.cpu_model == 68020) { + regs.pipeline_pos = restore_u16(); + regs.pipeline_r8[0] = restore_u16(); + regs.pipeline_r8[1] = restore_u16(); + regs.pipeline_stop = restore_u16(); + } + m68k_reset_sr(); write_log (_T("CPU: %d%s%03d, PC=%08X\n"), @@ -7919,7 +7990,7 @@ uae_u8 *save_cpu_trace (int *len, uae_u8 *dstptr) else dstbak = dst = xmalloc (uae_u8, 10000); - save_u32 (2 | 4 | 16); + save_u32 (2 | 4 | 16 | 32); save_u16 (cputrace.opcode); for (int i = 0; i < 16; i++) save_u32 (cputrace.regs[i]); @@ -7966,8 +8037,12 @@ uae_u8 *save_cpu_trace (int *len, uae_u8 *dstptr) save_u32 (cputrace.prefetch020[i]); } for (int i = 0; i < CPU_PIPELINE_MAX; i++) { - save_u8 (cputrace.prefetch030_valid[i]); + save_u8 (cputrace.prefetch020_valid[i]); } + save_u16(cputrace.pipeline_pos); + save_u16(cputrace.pipeline_r8[0]); + save_u16(cputrace.pipeline_r8[1]); + save_u16(cputrace.pipeline_stop); } *len = dst - dstbak; @@ -8021,24 +8096,36 @@ uae_u8 *restore_cpu_trace (uae_u8 *src) cputrace.prefetch020[i] = restore_u16 (); } if (v & 8) { + // backwards compatibility uae_u32 v = restore_u32(); - regs.prefetch020[0] = v >> 16; - regs.prefetch020[1] = (uae_u16)v; + cputrace.prefetch020[0] = v >> 16; + cputrace.prefetch020[1] = (uae_u16)v; v = restore_u32(); - regs.prefetch020[2] = v >> 16; - regs.prefetch020[3] = (uae_u16)v; + cputrace.prefetch020[2] = v >> 16; + cputrace.prefetch020[3] = (uae_u16)v; restore_u32(); restore_u32(); - regs.prefetch020_valid[0] = true; - regs.prefetch020_valid[1] = true; - regs.prefetch020_valid[2] = true; - regs.prefetch020_valid[3] = true; + cputrace.prefetch020_valid[0] = true; + cputrace.prefetch020_valid[1] = true; + cputrace.prefetch020_valid[2] = true; + cputrace.prefetch020_valid[3] = true; + + cputrace.prefetch020[0] = cputrace.prefetch020[1]; + cputrace.prefetch020[1] = cputrace.prefetch020[2]; + cputrace.prefetch020[2] = cputrace.prefetch020[3]; + cputrace.prefetch020_valid[3] = false; } if (v & 16) { for (int i = 0; i < CPU_PIPELINE_MAX; i++) { - cputrace.prefetch030_valid[i] = restore_u8() != 0; + cputrace.prefetch020_valid[i] = restore_u8() != 0; } } + if (v & 32) { + cputrace.pipeline_pos = restore_u16(); + cputrace.pipeline_r8[0] = restore_u16(); + cputrace.pipeline_r8[1] = restore_u16(); + cputrace.pipeline_stop = restore_u16(); + } } } @@ -8256,6 +8343,12 @@ uae_u8 *save_cpu (int *len, uae_u8 *dstptr) save_u32 (regs.chipset_latch_rw); save_u32 (regs.chipset_latch_read); save_u32 (regs.chipset_latch_write); + if (currprefs.cpu_model == 68020) { + save_u16(regs.pipeline_pos); + save_u16(regs.pipeline_r8[0]); + save_u16(regs.pipeline_r8[1]); + save_u16(regs.pipeline_stop); + } *len = dst - dstbak; return dstbak; } diff --git a/newcpu_common.cpp b/newcpu_common.cpp index 0e5f0056..1f82073e 100644 --- a/newcpu_common.cpp +++ b/newcpu_common.cpp @@ -806,7 +806,7 @@ bool m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra) return false; } if (src == 0) { - Exception (5); + Exception_cpu (5); return false; } #if defined (uae_s64) diff --git a/readcpu.cpp b/readcpu.cpp index 00fd89fc..5435457e 100644 --- a/readcpu.cpp +++ b/readcpu.cpp @@ -15,141 +15,141 @@ int nr_cpuop_funcs; struct mnemolookup lookuptab[] = { - { i_ILLG, _T("ILLEGAL") }, - { i_OR, _T("OR") }, - { i_CHK, _T("CHK") }, - { i_CHK2, _T("CHK2") }, - { i_AND, _T("AND") }, - { i_EOR, _T("EOR") }, - { i_ORSR, _T("ORSR") }, - { i_ANDSR, _T("ANDSR") }, - { i_EORSR, _T("EORSR") }, - { i_SUB, _T("SUB") }, - { i_SUBA, _T("SUBA") }, - { i_SUBX, _T("SUBX") }, - { i_SBCD, _T("SBCD") }, - { i_ADD, _T("ADD") }, - { i_ADDA, _T("ADDA") }, - { i_ADDX, _T("ADDX") }, - { i_ABCD, _T("ABCD") }, - { i_NEG, _T("NEG") }, - { i_NEGX, _T("NEGX") }, - { i_NBCD, _T("NBCD") }, - { i_CLR, _T("CLR") }, - { i_NOT, _T("NOT") }, - { i_TST, _T("TST") }, - { i_BTST, _T("BTST") }, - { i_BCHG, _T("BCHG") }, - { i_BCLR, _T("BCLR") }, - { i_BSET, _T("BSET") }, - { i_CMP, _T("CMP") }, - { i_CMPM, _T("CMPM") }, - { i_CMPA, _T("CMPA") }, - { i_MVPRM, _T("MVPRM") }, - { i_MVPMR, _T("MVPMR") }, - { i_MOVE, _T("MOVE") }, - { i_MOVEA, _T("MOVEA") }, - { i_MVSR2, _T("MVSR2") }, - { i_MV2SR, _T("MV2SR") }, - { i_SWAP, _T("SWAP") }, - { i_EXG, _T("EXG") }, - { i_EXT, _T("EXT") }, - { i_MVMEL, _T("MVMEL"), _T("MOVEM") }, - { i_MVMLE, _T("MVMLE"), _T("MOVEM") }, - { i_TRAP, _T("TRAP") }, - { i_MVR2USP, _T("MVR2USP") }, - { i_MVUSP2R, _T("MVUSP2R") }, - { i_NOP, _T("NOP") }, - { i_RESET, _T("RESET") }, - { i_RTE, _T("RTE") }, - { i_RTD, _T("RTD") }, - { i_LINK, _T("LINK") }, - { i_UNLK, _T("UNLK") }, - { i_RTS, _T("RTS") }, - { i_STOP, _T("STOP") }, - { i_TRAPV, _T("TRAPV") }, - { i_RTR, _T("RTR") }, - { i_JSR, _T("JSR") }, - { i_JMP, _T("JMP") }, - { i_BSR, _T("BSR") }, - { i_Bcc, _T("Bcc") }, - { i_LEA, _T("LEA") }, - { i_PEA, _T("PEA") }, - { i_DBcc, _T("DBcc") }, - { i_Scc, _T("Scc") }, - { i_DIVU, _T("DIVU") }, - { i_DIVS, _T("DIVS") }, - { i_MULU, _T("MULU") }, - { i_MULS, _T("MULS") }, - { i_ASR, _T("ASR") }, - { i_ASL, _T("ASL") }, - { i_LSR, _T("LSR") }, - { i_LSL, _T("LSL") }, - { i_ROL, _T("ROL") }, - { i_ROR, _T("ROR") }, - { i_ROXL, _T("ROXL") }, - { i_ROXR, _T("ROXR") }, - { i_ASRW, _T("ASRW") }, - { i_ASLW, _T("ASLW") }, - { i_LSRW, _T("LSRW") }, - { i_LSLW, _T("LSLW") }, - { i_ROLW, _T("ROLW") }, - { i_RORW, _T("RORW") }, - { i_ROXLW, _T("ROXLW") }, - { i_ROXRW, _T("ROXRW") }, - - { i_MOVE2C, _T("MOVE2C"), _T("MOVEC") }, - { i_MOVEC2, _T("MOVEC2"), _T("MOVEC") }, - { i_CAS, _T("CAS") }, - { i_CAS2, _T("CAS2") }, - { i_MULL, _T("MULL") }, - { i_DIVL, _T("DIVL") }, - { i_BFTST, _T("BFTST") }, - { i_BFEXTU, _T("BFEXTU") }, - { i_BFCHG, _T("BFCHG") }, - { i_BFEXTS, _T("BFEXTS") }, - { i_BFCLR, _T("BFCLR") }, - { i_BFFFO, _T("BFFFO") }, - { i_BFSET, _T("BFSET") }, - { i_BFINS, _T("BFINS") }, - { i_PACK, _T("PACK") }, - { i_UNPK, _T("UNPK") }, - { i_TAS, _T("TAS") }, - { i_BKPT, _T("BKPT") }, - { i_CALLM, _T("CALLM") }, - { i_RTM, _T("RTM") }, - { i_TRAPcc, _T("TRAPcc") }, - { i_MOVES, _T("MOVES") }, - { i_FPP, _T("FPP") }, - { i_FDBcc, _T("FDBcc") }, - { i_FScc, _T("FScc") }, - { i_FTRAPcc, _T("FTRAPcc") }, - { i_FBcc, _T("FBcc") }, - { i_FBcc, _T("FBcc") }, - { i_FSAVE, _T("FSAVE") }, - { i_FRESTORE, _T("FRESTORE") }, - - { i_CINVL, _T("CINVL") }, - { i_CINVP, _T("CINVP") }, - { i_CINVA, _T("CINVA") }, - { i_CPUSHL, _T("CPUSHL") }, - { i_CPUSHP, _T("CPUSHP") }, - { i_CPUSHA, _T("CPUSHA") }, - { i_MOVE16, _T("MOVE16") }, - - { i_MMUOP030, _T("MMUOP030") }, - { i_PFLUSHN, _T("PFLUSHN") }, - { i_PFLUSH, _T("PFLUSH") }, - { i_PFLUSHAN, _T("PFLUSHAN") }, - { i_PFLUSHA, _T("PFLUSHA") }, - - { i_PLPAR, _T("PLPAR") }, - { i_PLPAW, _T("PLPAW") }, - { i_PTESTR, _T("PTESTR") }, - { i_PTESTW, _T("PTESTW") }, - - { i_LPSTOP, _T("LPSTOP") }, - { i_ILLG, _T("") }, + { i_ILLG, _T("ILLEGAL"), NULL, 0 }, + { i_OR, _T("OR"), NULL, 1 }, + { i_CHK, _T("CHK"), NULL, 0 }, + { i_CHK2, _T("CHK2"), NULL, 0 }, + { i_AND, _T("AND"), NULL, 1 }, + { i_EOR, _T("EOR"), NULL, 1 }, + { i_ORSR, _T("ORSR"), NULL, 0 }, + { i_ANDSR, _T("ANDSR"), NULL, 0 }, + { i_EORSR, _T("EORSR"), NULL, 0 }, + { i_SUB, _T("SUB"), NULL, 1 }, + { i_SUBA, _T("SUBA"), NULL, 1 }, + { i_SUBX, _T("SUBX"), NULL, 0 }, + { i_SBCD, _T("SBCD"), NULL, 0 }, + { i_ADD, _T("ADD"), NULL, 1 }, + { i_ADDA, _T("ADDA"), NULL, 1 }, + { i_ADDX, _T("ADDX"), NULL, 0 }, + { i_ABCD, _T("ABCD"), NULL, 0 }, + { i_NEG, _T("NEG"), NULL, 1 }, + { i_NEGX, _T("NEGX"), NULL, 1 }, + { i_NBCD, _T("NBCD"), NULL, 0 }, + { i_CLR, _T("CLR"), NULL, 0 }, + { i_NOT, _T("NOT"), NULL, 1 }, + { i_TST, _T("TST"), NULL, 1 }, + { i_BTST, _T("BTST"), NULL, 1 }, + { i_BCHG, _T("BCHG"), NULL, 1 }, + { i_BCLR, _T("BCLR"), NULL, 1 }, + { i_BSET, _T("BSET"), NULL, 1 }, + { i_CMP, _T("CMP"), NULL, 1 }, + { i_CMPM, _T("CMPM"), NULL, 1 }, + { i_CMPA, _T("CMPA"), NULL, 1 }, + { i_MVPRM, _T("MVPRM"), NULL, 0 }, + { i_MVPMR, _T("MVPMR"), NULL, 0 }, + { i_MOVE, _T("MOVE"), NULL, 1 }, + { i_MOVEA, _T("MOVEA"), NULL, 1 }, + { i_MVSR2, _T("MVSR2"), NULL, 0 }, + { i_MV2SR, _T("MV2SR"), NULL, 0 }, + { i_SWAP, _T("SWAP"), NULL, 0 }, + { i_EXG, _T("EXG"), NULL, 0 }, + { i_EXT, _T("EXT"), NULL, 0 }, + { i_MVMEL, _T("MVMEL"), _T("MOVEM"), 0 }, + { i_MVMLE, _T("MVMLE"), _T("MOVEM"), 0 }, + { i_TRAP, _T("TRAP"), NULL, 0 }, + { i_MVR2USP, _T("MVR2USP"), NULL, 0 }, + { i_MVUSP2R, _T("MVUSP2R"), NULL, 0 }, + { i_NOP, _T("NOP"), NULL, 0 }, + { i_RESET, _T("RESET"), NULL, 0 }, + { i_RTE, _T("RTE"), NULL, 0 }, + { i_RTD, _T("RTD"), NULL, 0 }, + { i_LINK, _T("LINK"), NULL, 0 }, + { i_UNLK, _T("UNLK"), NULL, 0 }, + { i_RTS, _T("RTS"), NULL, 0 }, + { i_STOP, _T("STOP"), NULL, 0 }, + { i_TRAPV, _T("TRAPV"), NULL, 0 }, + { i_RTR, _T("RTR"), NULL, 0 }, + { i_JSR, _T("JSR"), NULL, 0 }, + { i_JMP, _T("JMP"), NULL, 0 }, + { i_BSR, _T("BSR"), NULL, 0 }, + { i_Bcc, _T("Bcc"), NULL, 0 }, + { i_LEA, _T("LEA"), NULL, 0 }, + { i_PEA, _T("PEA"), NULL, 0 }, + { i_DBcc, _T("DBcc"), NULL, 0 }, + { i_Scc, _T("Scc"), NULL, 1 }, + { i_DIVU, _T("DIVU"), NULL, 1 }, + { i_DIVS, _T("DIVS"), NULL, 1 }, + { i_MULU, _T("MULU"), NULL, 1 }, + { i_MULS, _T("MULS"), NULL, 1 }, + { i_ASR, _T("ASR"), NULL, }, + { i_ASL, _T("ASL"), NULL, 0 }, + { i_LSR, _T("LSR"), NULL, 0 }, + { i_LSL, _T("LSL"), NULL, 0 }, + { i_ROL, _T("ROL"), NULL, 0 }, + { i_ROR, _T("ROR"), NULL, 0 }, + { i_ROXL, _T("ROXL"), NULL, 1 }, + { i_ROXR, _T("ROXR"), NULL, 1 }, + { i_ASRW, _T("ASRW"), NULL, 1 }, + { i_ASLW, _T("ASLW"), NULL, 1 }, + { i_LSRW, _T("LSRW"), NULL, 1 }, + { i_LSLW, _T("LSLW"), NULL, 1 }, + { i_ROLW, _T("ROLW"), NULL, 1 }, + { i_RORW, _T("RORW"), NULL, 1 }, + { i_ROXLW, _T("ROXLW"), NULL, 1 }, + { i_ROXRW, _T("ROXRW"), NULL, 1 }, + + { i_MOVE2C, _T("MOVE2C"), _T("MOVEC"), 0 }, + { i_MOVEC2, _T("MOVEC2"), _T("MOVEC"), 0 }, + { i_CAS, _T("CAS"), NULL, 1 }, + { i_CAS2, _T("CAS2"), NULL, 1 }, + { i_MULL, _T("MULL"), NULL, 0 }, + { i_DIVL, _T("DIVL"), NULL, 0 }, + { i_BFTST, _T("BFTST"), NULL, 0 }, + { i_BFEXTU, _T("BFEXTU"), NULL, 0 }, + { i_BFCHG, _T("BFCHG"), NULL, 0 }, + { i_BFEXTS, _T("BFEXTS"), NULL, 0 }, + { i_BFCLR, _T("BFCLR"), NULL, 0 }, + { i_BFFFO, _T("BFFFO"), NULL, 0 }, + { i_BFSET, _T("BFSET"), NULL, 0 }, + { i_BFINS, _T("BFINS"), NULL, 0 }, + { i_PACK, _T("PACK"), NULL, 0 }, + { i_UNPK, _T("UNPK"), NULL, 0 }, + { i_TAS, _T("TAS"), NULL, 1 }, + { i_BKPT, _T("BKPT"), NULL, 0 }, + { i_CALLM, _T("CALLM"), NULL, 0 }, + { i_RTM, _T("RTM"), NULL, 0 }, + { i_TRAPcc, _T("TRAPcc"), NULL, 0 }, + { i_MOVES, _T("MOVES"), NULL, 1 }, + { i_FPP, _T("FPP"), NULL, 0 }, + { i_FDBcc, _T("FDBcc"), NULL, 0 }, + { i_FScc, _T("FScc"), NULL, 0 }, + { i_FTRAPcc, _T("FTRAPcc"), NULL, 0 }, + { i_FBcc, _T("FBcc"), NULL, 0 }, + { i_FBcc, _T("FBcc"), NULL, 0 }, + { i_FSAVE, _T("FSAVE"), NULL, 0 }, + { i_FRESTORE, _T("FRESTORE"), NULL, 0 }, + + { i_CINVL, _T("CINVL"), NULL, 0 }, + { i_CINVP, _T("CINVP"), NULL, 0 }, + { i_CINVA, _T("CINVA"), NULL, 0 }, + { i_CPUSHL, _T("CPUSHL"), NULL, 0 }, + { i_CPUSHP, _T("CPUSHP"), NULL, 0 }, + { i_CPUSHA, _T("CPUSHA"), NULL, 0 }, + { i_MOVE16, _T("MOVE16"), NULL, 0 }, + + { i_MMUOP030, _T("MMUOP030"), NULL, 0 }, + { i_PFLUSHN, _T("PFLUSHN"), NULL, 0 }, + { i_PFLUSH, _T("PFLUSH"), NULL, 0 }, + { i_PFLUSHAN, _T("PFLUSHAN"), NULL, 0 }, + { i_PFLUSHA, _T("PFLUSHA"), NULL, 0 }, + + { i_PLPAR, _T("PLPAR"), NULL, 0 }, + { i_PLPAW, _T("PLPAW"), NULL, 0 }, + { i_PTESTR, _T("PTESTR"), NULL, 0 }, + { i_PTESTW, _T("PTESTW"), NULL, 0 }, + + { i_LPSTOP, _T("LPSTOP"), NULL, 0 }, + { i_ILLG, _T(""), NULL, 0 }, }; struct instr *table68k;