From: Toni Wilen Date: Sat, 5 Jan 2019 13:41:39 +0000 (+0200) Subject: Bypass indirect memory access if memory bank is plain RAM or ROM board. X-Git-Tag: 4200~91 X-Git-Url: https://git.unchartedbackwaters.co.uk/w/?a=commitdiff_plain;h=d5fb9d2524c8cca796af0589d1dd40708b16f459;p=francis%2Fwinuae.git Bypass indirect memory access if memory bank is plain RAM or ROM board. --- diff --git a/ar.cpp b/ar.cpp index f9c8693d..67e46354 100644 --- a/ar.cpp +++ b/ar.cpp @@ -558,7 +558,7 @@ STATIC_INLINE int ar3a (uaecptr addr, uae_u8 b, int writing) ar_wait_pop = 0; /* We get (SP+2) here, as the first word on the stack is the status register. */ /* We want the following long, which is the return program counter. */ - wait_for_pc = longget (m68k_areg (regs, 7) + 2); /* Get (SP+2) */ + wait_for_pc = get_long(m68k_areg (regs, 7) + 2); /* Get (SP+2) */ set_special (SPCFLAG_ACTION_REPLAY); uaecptr pc = m68k_getpc (); diff --git a/expansion.cpp b/expansion.cpp index c03485ff..5793a518 100644 --- a/expansion.cpp +++ b/expansion.cpp @@ -997,28 +997,28 @@ addrbank fastmem_bank[MAX_RAM_BOARDS] = fastmem0_lput, fastmem0_wput, fastmem0_bput, fastmem0_xlate, fastmem0_check, NULL, _T("*"), _T("Fast memory"), fastmem0_lget, fastmem0_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }, { fastmem1_lget, fastmem1_wget, fastmem1_bget, fastmem1_lput, fastmem1_wput, fastmem1_bput, fastmem1_xlate, fastmem1_check, NULL, _T("*"), _T("Fast memory 2"), fastmem1_lget, fastmem1_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }, { fastmem2_lget, fastmem2_wget, fastmem2_bget, fastmem2_lput, fastmem2_wput, fastmem2_bput, fastmem2_xlate, fastmem2_check, NULL, _T("*"), _T("Fast memory 3"), fastmem2_lget, fastmem2_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }, { fastmem3_lget, fastmem3_wget, fastmem3_bget, fastmem3_lput, fastmem3_wput, fastmem3_bput, fastmem3_xlate, fastmem3_check, NULL, _T("*"), _T("Fast memory 4"), fastmem3_lget, fastmem3_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 } }; @@ -1527,28 +1527,28 @@ addrbank z3fastmem_bank[MAX_RAM_BOARDS] = z3fastmem0_lput, z3fastmem0_wput, z3fastmem0_bput, z3fastmem0_xlate, z3fastmem0_check, NULL, _T("*"), _T("Zorro III Fast RAM"), z3fastmem0_lget, z3fastmem0_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }, { z3fastmem1_lget, z3fastmem1_wget, z3fastmem1_bget, z3fastmem1_lput, z3fastmem1_wput, z3fastmem1_bput, z3fastmem1_xlate, z3fastmem1_check, NULL, _T("*"), _T("Zorro III Fast RAM #2"), z3fastmem1_lget, z3fastmem1_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }, { z3fastmem2_lget, z3fastmem2_wget, z3fastmem2_bget, z3fastmem2_lput, z3fastmem2_wput, z3fastmem2_bput, z3fastmem2_xlate, z3fastmem2_check, NULL, _T("*"), _T("Zorro III Fast RAM #3"), z3fastmem2_lget, z3fastmem2_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }, { z3fastmem3_lget, z3fastmem3_wget, z3fastmem3_bget, z3fastmem3_lput, z3fastmem3_wput, z3fastmem3_bput, z3fastmem3_xlate, z3fastmem3_check, NULL, _T("*"), _T("Zorro III Fast RAM #4"), z3fastmem3_lget, z3fastmem3_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 } }; diff --git a/include/memory.h b/include/memory.h index 7e70b2b2..a8b07edc 100644 --- a/include/memory.h +++ b/include/memory.h @@ -86,7 +86,7 @@ extern uae_u8* baseaddr[]; #define CACHE_DISABLE_MMU 0x10 extern uae_u8 ce_banktype[65536], ce_cachable[65536]; -#define ABFLAG_CACHE_SHIFT 16 +#define ABFLAG_CACHE_SHIFT 24 enum { ABFLAG_UNK = 0, ABFLAG_RAM = 1, ABFLAG_ROM = 2, ABFLAG_ROMIN = 4, ABFLAG_IO = 8, @@ -94,6 +94,7 @@ enum ABFLAG_RTG = 256, ABFLAG_THREADSAFE = 512, ABFLAG_DIRECTMAP = 1024, ABFLAG_ALLOCINDIRECT = 2048, ABFLAG_CHIPRAM = 4096, ABFLAG_CIA = 8192, ABFLAG_PPCIOSPACE = 16384, ABFLAG_MAPPED = 32768, + ABFLAG_DIRECTACCESS = 65536, ABFLAG_CACHE_ENABLE_DATA = CACHE_ENABLE_DATA << ABFLAG_CACHE_SHIFT, ABFLAG_CACHE_ENABLE_DATA_BURST = CACHE_ENABLE_DATA_BURST << ABFLAG_CACHE_SHIFT, ABFLAG_CACHE_ENABLE_INS = CACHE_ENABLE_INS << ABFLAG_CACHE_SHIFT, @@ -136,6 +137,10 @@ typedef struct { uae_u32 allocated_size; // size of bank (if IO or before RAM allocation) uae_u32 reserved_size; + /* non-NULL if xget/xput can be bypassed */ + uae_u8 *baseaddr_direct_r; + uae_u8 *baseaddr_direct_w; + uae_u32 startaccessmask; } addrbank; #define MEMORY_MIN_SUBBANK 1024 @@ -194,7 +199,7 @@ static uae_u32 REGPARAM3 name ## _lgeti (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## _lgeti (uaecptr addr) \ { \ uae_u8 *m; \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ m = name ## _bank.baseaddr + addr; \ return do_get_mem_long ((uae_u32 *)m); \ @@ -204,7 +209,7 @@ static uae_u32 REGPARAM3 name ## _wgeti (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## _wgeti (uaecptr addr) \ { \ uae_u8 *m; \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ m = name ## _bank.baseaddr + addr; \ return do_get_mem_word ((uae_u16 *)m); \ @@ -214,7 +219,7 @@ static uae_u32 REGPARAM3 name ## _lget (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## _lget (uaecptr addr) \ { \ uae_u8 *m; \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ m = name ## _bank.baseaddr + addr; \ return do_get_mem_long ((uae_u32 *)m); \ @@ -224,7 +229,7 @@ static uae_u32 REGPARAM3 name ## _wget (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## _wget (uaecptr addr) \ { \ uae_u8 *m; \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ m = name ## _bank.baseaddr + addr; \ return do_get_mem_word ((uae_u16 *)m); \ @@ -233,7 +238,7 @@ static uae_u32 REGPARAM2 name ## _wget (uaecptr addr) \ static uae_u32 REGPARAM3 name ## _bget (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## _bget (uaecptr addr) \ { \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ return name ## _bank.baseaddr[addr]; \ } @@ -242,7 +247,7 @@ static void REGPARAM3 name ## _lput (uaecptr, uae_u32) REGPARAM; \ static void REGPARAM2 name ## _lput (uaecptr addr, uae_u32 l) \ { \ uae_u8 *m; \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ m = name ## _bank.baseaddr + addr; \ do_put_mem_long ((uae_u32 *)m, l); \ @@ -252,7 +257,7 @@ static void REGPARAM3 name ## _wput (uaecptr, uae_u32) REGPARAM; \ static void REGPARAM2 name ## _wput (uaecptr addr, uae_u32 w) \ { \ uae_u8 *m; \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ m = name ## _bank.baseaddr + addr; \ do_put_mem_word ((uae_u16 *)m, w); \ @@ -261,7 +266,7 @@ static void REGPARAM2 name ## _wput (uaecptr addr, uae_u32 w) \ static void REGPARAM3 name ## _bput (uaecptr, uae_u32) REGPARAM; \ static void REGPARAM2 name ## _bput (uaecptr addr, uae_u32 b) \ { \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ name ## _bank.baseaddr[addr] = b; \ } @@ -269,7 +274,7 @@ static void REGPARAM2 name ## _bput (uaecptr addr, uae_u32 b) \ static int REGPARAM3 name ## _check (uaecptr addr, uae_u32 size) REGPARAM; \ static int REGPARAM2 name ## _check (uaecptr addr, uae_u32 size) \ { \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ return (addr + size) <= name ## _bank.allocated_size; \ } @@ -277,7 +282,7 @@ static int REGPARAM2 name ## _check (uaecptr addr, uae_u32 size) \ static uae_u8 *REGPARAM3 name ## _xlate (uaecptr addr) REGPARAM; \ static uae_u8 *REGPARAM2 name ## _xlate (uaecptr addr) \ { \ - addr -= name ## _bank.start & name ## _bank.mask; \ + addr -= name ## _bank.startaccessmask; \ addr &= name ## _bank.mask; \ return name ## _bank.baseaddr + addr; \ } @@ -322,7 +327,7 @@ static uae_u32 REGPARAM3 name ## index ## _lget (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## index ## _lget (uaecptr addr) \ { \ uae_u8 *m; \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ m = name ## _bank[index].baseaddr + addr; \ return do_get_mem_long ((uae_u32 *)m); \ @@ -332,7 +337,7 @@ static uae_u32 REGPARAM3 name ## index ## _wget (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## index ## _wget (uaecptr addr) \ { \ uae_u8 *m; \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ m = name ## _bank[index].baseaddr + addr; \ return do_get_mem_word ((uae_u16 *)m); \ @@ -341,7 +346,7 @@ static uae_u32 REGPARAM2 name ## index ## _wget (uaecptr addr) \ static uae_u32 REGPARAM3 name ## index ## _bget (uaecptr) REGPARAM; \ static uae_u32 REGPARAM2 name ## index ## _bget (uaecptr addr) \ { \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ return name ## _bank[index].baseaddr[addr]; \ } @@ -350,7 +355,7 @@ static void REGPARAM3 name ## index ## _lput (uaecptr, uae_u32) REGPARAM; \ static void REGPARAM2 name ## index ## _lput (uaecptr addr, uae_u32 l) \ { \ uae_u8 *m; \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ m = name ## _bank[index].baseaddr + addr; \ do_put_mem_long ((uae_u32 *)m, l); \ @@ -360,7 +365,7 @@ static void REGPARAM3 name ## index ## _wput (uaecptr, uae_u32) REGPARAM; \ static void REGPARAM2 name ## index ## _wput (uaecptr addr, uae_u32 w) \ { \ uae_u8 *m; \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ m = name ## _bank[index].baseaddr + addr; \ do_put_mem_word ((uae_u16 *)m, w); \ @@ -369,7 +374,7 @@ static void REGPARAM2 name ## index ## _wput (uaecptr addr, uae_u32 w) \ static void REGPARAM3 name ## index ## _bput (uaecptr, uae_u32) REGPARAM; \ static void REGPARAM2 name ## index ## _bput (uaecptr addr, uae_u32 b) \ { \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ name ## _bank[index].baseaddr[addr] = b; \ } @@ -377,7 +382,7 @@ static void REGPARAM2 name ## index ## _bput (uaecptr addr, uae_u32 b) \ static int REGPARAM3 name ## index ## _check (uaecptr addr, uae_u32 size) REGPARAM; \ static int REGPARAM2 name ## index ## _check (uaecptr addr, uae_u32 size) \ { \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ return (addr + size) <= name ## _bank[index].allocated_size; \ } @@ -385,7 +390,7 @@ static int REGPARAM2 name ## index ## _check (uaecptr addr, uae_u32 size) \ static uae_u8 *REGPARAM3 name ## index ## _xlate (uaecptr addr) REGPARAM; \ static uae_u8 *REGPARAM2 name ## index ## _xlate (uaecptr addr) \ { \ - addr -= name ## _bank[index].start & name ## _bank[index].mask; \ + addr -= name ## _bank[index].startaccessmask; \ addr &= name ## _bank[index].mask; \ return name ## _bank[index].baseaddr + addr; \ } @@ -519,34 +524,31 @@ extern void reload_roms(void); extern bool read_kickstart_version(struct uae_prefs *p); extern void chipmem_setindirect(void); -#define longget(addr) (call_mem_get_func(get_mem_bank(addr).lget, addr)) -#define wordget(addr) (call_mem_get_func(get_mem_bank(addr).wget, addr)) -#define byteget(addr) (call_mem_get_func(get_mem_bank(addr).bget, addr)) -#define longgeti(addr) (call_mem_get_func(get_mem_bank(addr).lgeti, addr)) -#define wordgeti(addr) (call_mem_get_func(get_mem_bank(addr).wgeti, addr)) -#define longput(addr,l) (call_mem_put_func(get_mem_bank(addr).lput, addr, l)) -#define wordput(addr,w) (call_mem_put_func(get_mem_bank(addr).wput, addr, w)) -#define byteput(addr,b) (call_mem_put_func(get_mem_bank(addr).bput, addr, b)) +uae_u32 memory_get_long(uaecptr); +uae_u32 memory_get_word(uaecptr); +uae_u32 memory_get_byte(uaecptr); +uae_u32 memory_get_longi(uaecptr); +uae_u32 memory_get_wordi(uaecptr); -STATIC_INLINE uae_u32 get_long (uaecptr addr) +STATIC_INLINE uae_u32 get_long(uaecptr addr) { - return longget (addr); + return memory_get_long(addr); } STATIC_INLINE uae_u32 get_word (uaecptr addr) { - return wordget (addr); + return memory_get_word(addr); } STATIC_INLINE uae_u32 get_byte (uaecptr addr) { - return byteget (addr); + return memory_get_byte(addr); } STATIC_INLINE uae_u32 get_longi(uaecptr addr) { - return longgeti (addr); + return memory_get_longi(addr); } STATIC_INLINE uae_u32 get_wordi(uaecptr addr) { - return wordgeti (addr); + return memory_get_wordi(addr); } STATIC_INLINE uae_u32 get_long_jit(uaecptr addr) @@ -555,7 +557,7 @@ STATIC_INLINE uae_u32 get_long_jit(uaecptr addr) #ifdef JIT special_mem |= bank->jit_read_flag; #endif - return bank->lget(addr); + return memory_get_long(addr); } STATIC_INLINE uae_u32 get_word_jit(uaecptr addr) { @@ -563,7 +565,7 @@ STATIC_INLINE uae_u32 get_word_jit(uaecptr addr) #ifdef JIT special_mem |= bank->jit_read_flag; #endif - return bank->wget(addr); + return memory_get_word(addr); } STATIC_INLINE uae_u32 get_byte_jit(uaecptr addr) { @@ -571,7 +573,7 @@ STATIC_INLINE uae_u32 get_byte_jit(uaecptr addr) #ifdef JIT special_mem |= bank->jit_read_flag; #endif - return bank->bget(addr); + return memory_get_byte(addr); } STATIC_INLINE uae_u32 get_longi_jit(uaecptr addr) { @@ -579,7 +581,7 @@ STATIC_INLINE uae_u32 get_longi_jit(uaecptr addr) #ifdef JIT special_mem |= bank->jit_read_flag; #endif - return bank->lgeti(addr); + return memory_get_longi(addr); } STATIC_INLINE uae_u32 get_wordi_jit(uaecptr addr) { @@ -587,7 +589,7 @@ STATIC_INLINE uae_u32 get_wordi_jit(uaecptr addr) #ifdef JIT special_mem |= bank->jit_read_flag; #endif - return bank->wgeti(addr); + return memory_get_wordi(addr); } /* @@ -620,17 +622,21 @@ STATIC_INLINE void *get_pointer (uaecptr addr) # endif #endif +void memory_put_long(uaecptr, uae_u32); +void memory_put_word(uaecptr, uae_u32); +void memory_put_byte(uaecptr, uae_u32); + STATIC_INLINE void put_long (uaecptr addr, uae_u32 l) { - longput(addr, l); + memory_put_long(addr, l); } STATIC_INLINE void put_word (uaecptr addr, uae_u32 w) { - wordput(addr, w); + memory_put_word(addr, w); } STATIC_INLINE void put_byte (uaecptr addr, uae_u32 b) { - byteput(addr, b); + memory_put_byte(addr, b); } STATIC_INLINE void put_long_jit(uaecptr addr, uae_u32 l) @@ -639,7 +645,7 @@ STATIC_INLINE void put_long_jit(uaecptr addr, uae_u32 l) #ifdef JIT special_mem |= bank->jit_write_flag; #endif - bank->lput(addr, l); + memory_put_long(addr, l); } STATIC_INLINE void put_word_jit(uaecptr addr, uae_u32 l) { @@ -647,7 +653,7 @@ STATIC_INLINE void put_word_jit(uaecptr addr, uae_u32 l) #ifdef JIT special_mem |= bank->jit_write_flag; #endif - bank->wput(addr, l); + memory_put_word(addr, l); } STATIC_INLINE void put_byte_jit(uaecptr addr, uae_u32 l) { @@ -655,7 +661,7 @@ STATIC_INLINE void put_byte_jit(uaecptr addr, uae_u32 l) #ifdef JIT special_mem |= bank->jit_write_flag; #endif - bank->bput(addr, l); + memory_put_byte(addr, l); } /* @@ -688,15 +694,17 @@ STATIC_INLINE void put_pointer (uaecptr addr, void *v) #endif bool real_address_allowed(void); +uae_u8 *memory_get_real_address(uaecptr); +int memory_valid_address(uaecptr, uae_u32); STATIC_INLINE uae_u8 *get_real_address (uaecptr addr) { - return get_mem_bank (addr).xlateaddr(addr); + return memory_get_real_address(addr); } STATIC_INLINE int valid_address (uaecptr addr, uae_u32 size) { - return get_mem_bank (addr).check(addr, size); + return memory_valid_address(addr, size); } STATIC_INLINE void put_quad_host(void *addr, uae_u64 v) diff --git a/include/mmu_common.h b/include/mmu_common.h index a04c954e..032d48dc 100644 --- a/include/mmu_common.h +++ b/include/mmu_common.h @@ -120,27 +120,27 @@ static ALWAYS_INLINE bool is_unaligned_bus(uaecptr addr, int size) static ALWAYS_INLINE void phys_put_long(uaecptr addr, uae_u32 l) { - longput(addr, l); + put_long(addr, l); } static ALWAYS_INLINE void phys_put_word(uaecptr addr, uae_u32 w) { - wordput(addr, w); + put_word(addr, w); } static ALWAYS_INLINE void phys_put_byte(uaecptr addr, uae_u32 b) { - byteput(addr, b); + put_byte(addr, b); } static ALWAYS_INLINE uae_u32 phys_get_long(uaecptr addr) { - return longget (addr); + return get_long(addr); } static ALWAYS_INLINE uae_u32 phys_get_word(uaecptr addr) { - return wordget (addr); + return get_word(addr); } static ALWAYS_INLINE uae_u32 phys_get_byte(uaecptr addr) { - return byteget (addr); + return get_byte(addr); } extern uae_u32(*x_phys_get_iword)(uaecptr); diff --git a/memory.cpp b/memory.cpp index ce6ca6f5..19913c05 100644 --- a/memory.cpp +++ b/memory.cpp @@ -1229,7 +1229,7 @@ addrbank a3000lmem_bank = { a3000lmem_lput, a3000lmem_wput, a3000lmem_bput, a3000lmem_xlate, a3000lmem_check, NULL, _T("ramsey_low"), _T("RAMSEY memory (low)"), a3000lmem_lget, a3000lmem_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }; addrbank a3000hmem_bank = { @@ -1237,7 +1237,7 @@ addrbank a3000hmem_bank = { a3000hmem_lput, a3000hmem_wput, a3000hmem_bput, a3000hmem_xlate, a3000hmem_check, NULL, _T("ramsey_high"), _T("RAMSEY memory (high)"), a3000hmem_lget, a3000hmem_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }; addrbank kickmem_bank = { @@ -1245,7 +1245,7 @@ addrbank kickmem_bank = { kickmem_lput, kickmem_wput, kickmem_bput, kickmem_xlate, kickmem_check, NULL, _T("kick"), _T("Kickstart ROM"), kickmem_lget, kickmem_wget, - ABFLAG_ROM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, S_WRITE + ABFLAG_ROM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, S_WRITE }; addrbank kickram_bank = { @@ -1261,14 +1261,14 @@ addrbank extendedkickmem_bank = { extendedkickmem_lput, extendedkickmem_wput, extendedkickmem_bput, extendedkickmem_xlate, extendedkickmem_check, NULL, NULL, _T("Extended Kickstart ROM"), extendedkickmem_lget, extendedkickmem_wget, - ABFLAG_ROM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, S_WRITE + ABFLAG_ROM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, S_WRITE }; addrbank extendedkickmem2_bank = { extendedkickmem2_lget, extendedkickmem2_wget, extendedkickmem2_bget, extendedkickmem2_lput, extendedkickmem2_wput, extendedkickmem2_bput, extendedkickmem2_xlate, extendedkickmem2_check, NULL, _T("rom_a8"), _T("Extended 2nd Kickstart ROM"), extendedkickmem2_lget, extendedkickmem2_wget, - ABFLAG_ROM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, S_WRITE + ABFLAG_ROM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, S_WRITE }; addrbank fakeuaebootrom_bank = { fakeuaebootrom_lget, fakeuaebootrom_wget, mem25bit_bget, @@ -1286,14 +1286,14 @@ addrbank custmem1_bank = { custmem1_lput, custmem1_wput, custmem1_bput, custmem1_xlate, custmem1_check, NULL, _T("custmem1"), _T("Non-autoconfig RAM #1"), custmem1_lget, custmem1_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }; addrbank custmem2_bank = { custmem2_lget, custmem2_wget, custmem2_bget, custmem2_lput, custmem2_wput, custmem2_bput, custmem2_xlate, custmem2_check, NULL, _T("custmem2"), _T("Non-autoconfig RAM #2"), custmem2_lget, custmem2_wget, - ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL, 0, 0 + ABFLAG_RAM | ABFLAG_THREADSAFE | ABFLAG_CACHE_ENABLE_ALL | ABFLAG_DIRECTACCESS, 0, 0 }; #define fkickmem_size ROM_SIZE_512 @@ -1924,6 +1924,15 @@ static void add_shmmaps (uae_u32 start, addrbank *what) #define MAPPED_MALLOC_DEBUG 0 +static void set_direct_memory(addrbank *ab) +{ + if (!(ab->flags & ABFLAG_DIRECTACCESS)) + return; + ab->baseaddr_direct_r = ab->baseaddr; + if (!(ab->flags & ABFLAG_ROM)) + ab->baseaddr_direct_w = ab->baseaddr; +} + bool mapped_malloc (addrbank *ab) { int id; @@ -1936,6 +1945,8 @@ bool mapped_malloc (addrbank *ab) write_log(_T("mapped_malloc with memory bank '%s' already allocated!?\n"), ab->name); } ab->allocated_size = 0; + ab->baseaddr_direct_r = NULL; + ab->baseaddr_direct_w = NULL; ab->flags &= ~ABFLAG_MAPPED; if (ab->label && ab->label[0] == '*') { @@ -1951,6 +1962,7 @@ bool mapped_malloc (addrbank *ab) start = md.start; } ab->startmask = start; + ab->startaccessmask = start & ab->mask; if (!md.directsupport || (ab->flags & ABFLAG_ALLOCINDIRECT)) { if (!(ab->flags & ABFLAG_ALLOCINDIRECT)) { if (canbang) { @@ -1972,6 +1984,7 @@ bool mapped_malloc (addrbank *ab) put_long_host(ab->baseaddr + ab->reserved_size, 0x4afc4afc); ab->allocated_size = ab->reserved_size; } + set_direct_memory(ab); #if MAPPED_MALLOC_DEBUG write_log(_T("mapped_malloc nodirect %s %p\n"), ab->name, ab->baseaddr); #endif @@ -2015,6 +2028,7 @@ bool mapped_malloc (addrbank *ab) ab->allocated_size = ab->reserved_size; } ab->flags |= ABFLAG_DIRECTMAP; + set_direct_memory(ab); #if MAPPED_MALLOC_DEBUG write_log(_T("mapped_malloc direct %s %p\n"), ab->name, ab->baseaddr); #endif @@ -2026,6 +2040,7 @@ bool mapped_malloc (addrbank *ab) recurse++; mapped_malloc (ab); recurse--; + set_direct_memory(ab); #if MAPPED_MALLOC_DEBUG write_log(_T("mapped_malloc indirect %s %p\n"), ab->name, ab->baseaddr); #endif @@ -3393,15 +3408,15 @@ uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr) path = currprefs.romfile; /* 256KB or 512KB ROM? */ for (i = 0; i < mem_size / 2 - 4; i++) { - if (longget (i + mem_start) != longget (i + mem_start + mem_size / 2)) + if (get_long(i + mem_start) != get_long(i + mem_start + mem_size / 2)) break; } if (i == mem_size / 2 - 4) { mem_size /= 2; mem_start += ROM_SIZE_256; } - version = longget (mem_start + 12); /* version+revision */ - _stprintf (tmpname, _T("Kickstart %d.%d"), wordget (mem_start + 12), wordget (mem_start + 14)); + version = get_long(mem_start + 12); /* version+revision */ + _stprintf (tmpname, _T("Kickstart %d.%d"), get_word(mem_start + 12), get_word(mem_start + 14)); break; case 1: /* Extended ROM */ if (!extendedkickmem_type) @@ -3410,9 +3425,9 @@ uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr) mem_real_start = extendedkickmem_bank.baseaddr; mem_size = extendedkickmem_bank.allocated_size; path = currprefs.romextfile; - version = longget (mem_start + 12); /* version+revision */ + version = get_long(mem_start + 12); /* version+revision */ if (version == 0xffffffff) - version = longget (mem_start + 16); + version = get_long(mem_start + 16); _stprintf (tmpname, _T("Extended")); break; default: @@ -3435,7 +3450,7 @@ uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr) save_string (path); if (saverom) { for (i = 0; i < mem_size; i++) - *dst++ = byteget (mem_start + i); + *dst++ = get_byte(mem_start + i); } *len = dst - dstbak; return dstbak; @@ -3499,3 +3514,131 @@ uaecptr strcpyha_safe (uaecptr dst, const uae_char *src) return res; } +uae_u32 memory_get_longi(uaecptr addr) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return call_mem_get_func(ab->lgeti, addr); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_r + addr; + return do_get_mem_long((uae_u32 *)m); + } +} +uae_u32 memory_get_wordi(uaecptr addr) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return call_mem_get_func(ab->wgeti, addr); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_r + addr; + return do_get_mem_word((uae_u16*)m); + } +} +uae_u32 memory_get_long(uaecptr addr) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return call_mem_get_func(ab->lget, addr); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_r + addr; + return do_get_mem_long((uae_u32*)m); + } +} +uae_u32 memory_get_word(uaecptr addr) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return call_mem_get_func(ab->wget, addr); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_r + addr; + return do_get_mem_word((uae_u16*)m); + } +} +uae_u32 memory_get_byte(uaecptr addr) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return call_mem_get_func(ab->bget, addr); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_r + addr; + return *m; + } +} + +void memory_put_long(uaecptr addr, uae_u32 v) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_w) { + call_mem_put_func(ab->lput, addr, v); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_w + addr; + do_put_mem_long((uae_u32*)m, v); + } +} +void memory_put_word(uaecptr addr, uae_u32 v) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_w) { + call_mem_put_func(ab->wput, addr, v); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_w + addr; + do_put_mem_word((uae_u16*)m, v); + } +} +void memory_put_byte(uaecptr addr, uae_u32 v) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_w) { + call_mem_put_func(ab->bput, addr, v); + } else { + uae_u8 *m; + addr -= ab->startaccessmask; + addr &= ab->mask; + m = ab->baseaddr_direct_w + addr; + *m = (uae_u8)v; + } +} + +uae_u8 *memory_get_real_address(uaecptr addr) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return get_mem_bank(addr).xlateaddr(addr); + } else { + addr -= ab->startaccessmask; + addr &= ab->mask; + return ab->baseaddr_direct_r + addr; + } +} + +int memory_valid_address(uaecptr addr, uae_u32 size) +{ + addrbank *ab = &get_mem_bank(addr); + if (!ab->baseaddr_direct_r) { + return get_mem_bank(addr).check(addr, size); + } + addr -= ab->startaccessmask; + addr &= ab->mask; + return addr + size <= ab->allocated_size; +}