From 095dbb6038d27dbd30c1d0164c68d4a17f1dfb6e Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Sat, 1 Feb 2020 14:22:04 +0200 Subject: [PATCH] Added UAE automatic bus error enable/disable support. --- cputest.cpp | 35 +++++++++++++------------ cputest/amiga.S | 31 ++++++++++++++++++++++ cputest/cputestgen.ini | 59 ++++++++++++++++++++++++++++++++++++++++-- cputest/main.c | 52 ++++++++++++++++++++++++++++++++++--- 4 files changed, 154 insertions(+), 23 deletions(-) diff --git a/cputest.cpp b/cputest.cpp index ce3ba0d7..3bf061dd 100644 --- a/cputest.cpp +++ b/cputest.cpp @@ -294,6 +294,22 @@ oob: return dummy_memory; } +void do_cycles_test(int cycles) +{ + if (!testing_active) + return; + cpu_cycles += cycles; +} + +static void add_memory_cycles(int c) +{ + if (!testing_active) + return; + if (trace_store_pc != 0xffffffff) + return; + cpu_cycles += c * 4; +} + static void check_bus_error(uaecptr addr, int write, int fc) { if (!testing_active) @@ -319,14 +335,6 @@ static void check_bus_error(uaecptr addr, int write, int fc) } } -static void add_memory_cycles(int c) -{ - if (!testing_active) - return; - if (trace_store_pc != 0xffffffff) - return; - cpu_cycles += c * 4; -} static uae_u8 get_ibyte_test(uaecptr addr) { @@ -693,13 +701,6 @@ int intlev(void) return 0; } -void do_cycles_test(int cycles) -{ - if (!testing_active) - return; - cpu_cycles += cycles; -} - uae_u32(*x_get_long)(uaecptr); uae_u32(*x_get_word)(uaecptr); uae_u32(*x_get_byte)(uaecptr); @@ -3550,8 +3551,8 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi uae_u8 *ao = opcode_memory_ptr + 2; uae_u16 apw1 = (ao[0] << 8) | (ao[1] << 0); uae_u16 apw2 = (ao[2] << 8) | (ao[3] << 0); - if (opc == 0x4ef8 - && apw1 == 0x0000 + if (opc == 0x4662 + // && apw1 == 0x0000 //&& apw2 == 0x7479 ) printf(""); diff --git a/cputest/amiga.S b/cputest/amiga.S index b8698509..17f3b945 100644 --- a/cputest/amiga.S +++ b/cputest/amiga.S @@ -11,6 +11,37 @@ .globl _testexit .globl _get_cpu_model .globl sync + .globl _uae_command + +_uae_command: + move.l 4(sp),a0 + movem.l d2-d3/a2-a3/a6,-(sp) + move.l 4.w,a6 + move.l a0,a2 + lea uaeres(pc),a1 + jsr -0x1f2(a6) | OpenResource + tst.l d0 + beq.s .nores + move.l d0,a6 + lea uaefuncname(pc),a0 + jsr -6(a6) + move.l d0,a0 + clr.l -(sp) + clr.l -(sp) + move.l #100,-(sp) + move.l a2,-(sp) + move.l #-1,-(sp) + move.l #82,-(sp) + jsr (a0) + add.w #6*4,sp +.nores: + movem.l (sp)+,d2-d3/a2-a3/a6 + rts + +uaeres: + .asciz "uae.resource" +uaefuncname: + .asciz "uaelib_demux" sync: move.b 0xdff006,d0 diff --git a/cputest/cputestgen.ini b/cputest/cputestgen.ini index f00fa188..ad774e3d 100644 --- a/cputest/cputestgen.ini +++ b/cputest/cputestgen.ini @@ -165,37 +165,92 @@ mode= enabled=1 mode=all +; basic instruction test +[test=ALL] +enabled=0 +mode=tas +feature_sr_mask=0xa000 + +; interrupt exception test [test=IRQ] enabled=0 mode=nop,ext,swap feature_interrupts=1 +; source EA address error [test=AE_SRC] enabled=0 feature_target_src_ea=0x87fff1,0x7111 feature_target_dst_ea= mode=all +; destination EA address error [test=AE_DST] enabled=0 feature_target_src_ea= feature_target_dst_ea=0x87fff1,0x7111 mode=all -[test=BERR_SRC] +; user stack address error +[test=ODD_STACK] +enabled=0 +feature_usp=2 +mode=all + +; prefetch bus error (requires extra hardware) +[test=BE_PR] +enabled=0 +feature_safe_memory_start=0x880000 +feature_safe_memory_size=0x80000 +feature_safe_memory_mode=P +feature_target_opcode_offset=90,92,94,96,98,100,102,104 +opcode_memory_start=0x87ff98 +mode=all + +; source EA read bus error (requires extra hardware) +[test=BE_SRC] enabled=0 feature_safe_memory_start=0x880000 feature_safe_memory_size=0x80000 feature_safe_memory_mode=R feature_target_src_ea=0x87fffc,0x87fffd,0x87fffe,0x87ffff,0x880000,0x880001,0x880002,0x880003,0x880004 feature_target_dst_ea= +test_memory_size=0xa0000 mode=all -[test=BERR_DST] +; destination EA read bus error (requires extra hardware) +[test=BE_DST] enabled=0 feature_safe_memory_start=0x880000 feature_safe_memory_size=0x80000 feature_safe_memory_mode=R feature_target_src_ea= feature_target_dst_ea=0x87fffc,0x87fffd,0x87fffe,0x87ffff,0x880000,0x880001,0x880002,0x880003,0x880004 +test_memory_size=0xa0000 +mode=all + +; source EA (=RMW instructions like NOT have only source EA) write bus error (requires extra hardware) +[test=BE_SRCW] +enabled=0 +feature_safe_memory_start=0x900000 +feature_safe_memory_size=0x80000 +feature_safe_memory_mode=W +feature_target_src_ea=0x8ffffc,0x8ffffd,0x8ffffe,0x8fffff,0x900000,0x900001,0x900002,0x900003,0x900004 +feature_target_dst_ea= +opcode_memory_start=0x8fffa0 +test_memory_start=0x880000 +test_memory_size=0x100000 +mode=all + +; destination EA write bus error (requires extra hardware) +[test=BE_DSTW] +enabled=0 +feature_safe_memory_start=0x900000 +feature_safe_memory_size=0x80000 +feature_safe_memory_mode=W +feature_target_src_ea= +feature_target_dst_ea=0x8ffffc,0x8ffffd,0x8ffffe,0x8fffff,0x900000,0x900001,0x900002,0x900003,0x900004 +opcode_memory_start=0x8fffa0 +test_memory_start=0x880000 +test_memory_size=0x100000 mode=all diff --git a/cputest/main.c b/cputest/main.c index 7636a17a..49ab1d1e 100644 --- a/cputest/main.c +++ b/cputest/main.c @@ -138,6 +138,7 @@ static short cycles, cycles_range, cycles_adjust; static short gotcycles; static short interrupttest; static uae_u32 cyclecounter_addr; +static short uae; #ifdef AMIGA static short interrupt_count; static uae_u16 main_intena; @@ -518,6 +519,34 @@ static uae_u8 *parse_gzip(uae_u8 *gzbuf, int *sizep) #define INFLATE_STACK_SIZE 3000 static uae_u8 *inflatestack; +#ifdef AMIGA +extern void uae_command(char*); +#endif + +static int set_berr(int mask, int ask) +{ +#ifdef AMIGA + if (uae) { + if (!mask) { + sprintf(tmpbuffer, "dbg \"w 0\""); + } else { + sprintf(tmpbuffer, "dbg \"w 0 %08x %08x BE%s%s%s\"", (uae_u32)safe_memory_start, safe_memory_end - safe_memory_start, (mask & 1) ? "R" : "", (mask & 2) ? "W" : "", (mask & 4) ? "P" : ""); + } + uae_command(tmpbuffer); + return 0; + } +#endif + if (!ask) { + return 0; + } + if (mask) { + printf("Re-enable write bus error mode and press any key (ESC=abort)\n"); + } else { + printf("Disable write bus error mode and press any key (SPACE=skip,ESC=abort)\n"); + } + return getchar(); +} + static uae_u8 *load_file(const char *path, const char *file, uae_u8 *p, int *sizep, int exiterror, int candirect) { char fname[256]; @@ -641,8 +670,7 @@ static uae_u8 *load_file(const char *path, const char *file, uae_u8 *p, int *siz } readdata(tmp, size2, f, unpack, &unpackoffset); if (memcmp(tmp, p, size2)) { - printf("Disable write bus error mode and press any key (SPACE=skip,ESC=abort)\n"); - int ch = getchar(); + int ch = set_berr(0, 1); if (ch == 27) { exit(0); } else if (ch == 32) { @@ -653,8 +681,8 @@ static uae_u8 *load_file(const char *path, const char *file, uae_u8 *p, int *siz memcpy(p, tmp, size2); p += size2; size -= size2; - printf("Re-enable write bus error mode and press any key (ESC=abort)\n"); - if (getchar() == 27) { + ch = set_berr(2, 1); + if (ch == 27) { exit(0); } } @@ -1798,6 +1826,15 @@ static int check_cycles(int exc, int extratrace) } else { #ifdef AMIGA gotcycles = get_cycles_amiga(); + // if write bus error, decrease cycles by 2. Tester hardware side-effect. + if (exc == 2) { + if (cpu_lvl == 0 && (last_exception[1] & 0x10) == 0) { + gotcycles -= 2; + } + if (cpu_lvl == 1 && (last_exception[8] & 0x01) == 0) { + gotcycles -= 2; + } + } #else end_test(); printf("No cycle count support\n"); @@ -2329,6 +2366,10 @@ static void process_test(uae_u8 *p) regs.dstaddr = 0xffffffff; regs.branchtarget = 0xffffffff; + if (safe_memory_mode) { + set_berr(safe_memory_mode, 0); + } + endpc = opcode_memory_addr; startpc = opcode_memory_addr; start_test(); @@ -2590,6 +2631,7 @@ static void process_test(uae_u8 *p) end: end_test(); + set_berr(0, 0); if (infoadded) { printf("\n"); @@ -2985,6 +3027,8 @@ int main(int argc, char *argv[]) cyclecounter_addr = getparamval(next); cycles = 1; } + } else if (!_stricmp(s, "-uae")) { + uae = 1; } } -- 2.47.3