From 311c187686b56995539571af769e5cee5962c25d Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Sat, 17 Sep 2005 14:17:38 +0300 Subject: [PATCH] imported winuaesrc1100b8.zip --- arcadia.c | 23 ++- blitter.c | 21 ++- custom.c | 75 +++------ debug.c | 147 ++++++++++++++--- filesys.c | 2 +- identify.c | 206 ++++++++++++------------ include/arcadia.h | 2 +- include/debug.h | 3 + include/identify.h | 10 +- memory.c | 1 + newcpu.c | 4 +- od-win32/blkdev_win32_spti.c | 17 +- od-win32/fsdb_win32.c | 13 +- od-win32/machdep/maccess.h | 13 ++ od-win32/resources/resource.h | 3 + od-win32/resources/winuae.rc | 12 +- od-win32/win32.h | 2 +- od-win32/win32gfx.c | 3 +- od-win32/win32gui.c | 64 ++++++-- od-win32/winuae_msvc/winuae_msvc.vcproj | 1 - 20 files changed, 384 insertions(+), 238 deletions(-) diff --git a/arcadia.c b/arcadia.c index 975c1aa7..aa5f98e8 100755 --- a/arcadia.c +++ b/arcadia.c @@ -29,7 +29,8 @@ * - ar_ldrba * - ar_ninj * - ar_rdwr - * - ar_sdwr (crashes. bad dump?) + * - ar_socc (99u8) + * - ar_sdwr * - ar_spot * - ar_sprg * - ar_xeon @@ -50,6 +51,9 @@ static struct arcadiarom roms[] = { { "ar_ldrba.zip", "scpa211", "ldrb_", 1, 2, 3, 4, 1, 0, 7, 5, 6, 0x98f564 }, { "ar_ninj.zip", "scpa211", "ninj_", 1, 1, 6, 5, 7, 4, 2, 0, 3, 0x98f564 }, { "ar_rdwr.zip", "scpa211", "rdwr_", 1, 3, 1, 6, 4, 0, 5, 2, 7, 0x98f564 }, + + { "ar_socc.zip", "scpav3_0.1", "socc30.", 2, 0, 7, 1, 6, 5, 4, 3, 2, 0x9902bc }, + { "ar_sdwr.zip", "scpa211", "sdwr_", 1, 6, 3, 4, 5, 2, 1, 0, 7, 0x98f564 }, { "ar_spot.zip", "scpav3_0.1", "spotv2.", 0, 7, 6, 5, 4, 3, 2, 1, 0, 0x9902bc }, { "ar_sprg.zip", "scpa211", "sprg_", 1, 4, 7, 3, 0, 6, 5, 2, 1, 0x98f564 }, @@ -68,23 +72,23 @@ static uae_u8 *arbmemory; static int nvwrite; -static int load_rom8 (char *xpath, uae_u8 *mem, int isbin) +static int load_rom8 (char *xpath, uae_u8 *mem, int extra) { struct zfile *zf; char path[MAX_DPATH]; int i; uae_u8 *tmp = xmalloc (131072); - char *bin = isbin ? ".bin" : ""; + char *bin = extra == 1 ? ".bin" : ""; memset (tmp, 0, 131072); - sprintf (path, "%sh%s", xpath, bin); + sprintf (path, "%s%s%s", xpath, extra == 2 ? "hi" : "h", bin); zf = zfile_fopen (path, "rb"); if (!zf) goto end; if (zfile_fread (tmp, 65536, 1, zf) == 0) goto end; zfile_fclose (zf); - sprintf (path, "%sl%s", xpath, bin); + sprintf (path, "%s%s%s", xpath, extra == 2 ? "lo" : "l", bin); zf = zfile_fopen (path, "rb"); if (!zf) goto end; @@ -161,7 +165,7 @@ static int load_roms (char *xpath, struct arcadiarom *rom) i = 0; for (;;) { sprintf (path, "%s/%s%d", xpath, rom->rom, i + 1); - if (!load_rom8 (path, arbmemory + 2 * 65536 * i, rom->bin)) { + if (!load_rom8 (path, arbmemory + 2 * 65536 * i, rom->extra)) { if (i == 0) write_log ("Arcadia: game rom load failed ('%s')\n", path); break; @@ -193,12 +197,15 @@ static void decrypt_roms (struct arcadiarom *rom) { int i, j; - for (i = 1; i < 0x20000; i += 2) + for (i = 1; i < 0x20000; i += 2) { arbmemory[i] = bswap (arbmemory[i], rom->b7,rom->b6,rom->b5,rom->b4,rom->b3,rom->b2,rom->b1,rom->b0); + if (rom->extra == 2) + arbmemory[i - 1] = bswap (arbmemory[i - 1],7,6,5,4,3,2,1,0); + } for (i = 1; i < 0x20000; i += 2) { j = i + bios_offset; - arbmemory[j] = bswap (arbmemory[j],6,1,0,2,3,4,5,7); + arbmemory[j] = bswap (arbmemory[j],6,1,0,2,3,4,5,7); } if (!strcmp (rom->name, "ar_dart.zip")) arbmemory[1] = 0xfc; diff --git a/blitter.c b/blitter.c index e0ddb0dd..6f20e946 100755 --- a/blitter.c +++ b/blitter.c @@ -26,6 +26,9 @@ #include "blit.h" #include "savestate.h" +/* we must not change ce-mode while blitter is running.. */ +static int blitter_cycle_exact; + uae_u16 oldvblts; uae_u16 bltcon0,bltcon1; uae_u32 bltapt,bltbpt,bltcpt,bltdpt; @@ -103,13 +106,13 @@ A 3*3*AC- ACx NOTES: (BLTNASTY=1) - Blitter ALWAYS needs free bus cycle, even if it is running an "idle" cycle. - Exception: possible extra fill mode idle cycle.is "real" idle cycle. + Exception: possible extra fill mode idle cycle is "real" idle cycle. + Can someone explain this? Why does idle cycles need bus cycles? - Fill mode may add one extra real idle cycle.(depends on channel mask) - All blits with channel A enabled use all available bus cycles - (stops CPU accesses to chip RAM if BLTNASTY=1) - Can someone explain this? Why does idle cycles need bus cycles? + (stops CPU accesses to Agnus bus if BLTNASTY=1) - idle cycles (no A-channel enabled) are not "used" by blitter, they are freely - available for CPU.. + available for CPU. BLTNASTY=0 makes things even more interesting.. @@ -798,7 +801,7 @@ void decide_blitter (int hpos) blitter_dump(); } #endif - if (!currprefs.blitter_cycle_exact) + if (!blitter_cycle_exact) return; if (blitline) { decide_blitter_line (hpos); @@ -892,7 +895,7 @@ static void blitter_force_finish (void) odmacon = dmacon; dmacon |= DMA_MASTER | DMA_BLITTER; write_log ("forcing blitter finish\n"); - if (currprefs.blitter_cycle_exact) { + if (blitter_cycle_exact) { int rounds = 10000; while (bltstate != BLT_done && rounds > 0) { memset (cycle_line, 0, maxhpos); @@ -990,6 +993,8 @@ void do_blitter (int hpos) #ifdef BLITTER_DEBUG int oldstate = bltstate; #endif + + blitter_cycle_exact = currprefs.blitter_cycle_exact; blt_info.blitzero = 1; bltstate = BLT_init; preva = 0; @@ -1043,7 +1048,7 @@ void do_blitter (int hpos) bltstate = BLT_work; blit_maxcyclecounter = 0x7fffffff; - if (currprefs.blitter_cycle_exact) { + if (blitter_cycle_exact) { blitter_dma_cycles_line_count = 0; blitter_hcounter1 = blitter_hcounter2 = 0; blitter_vcounter1 = blitter_vcounter2 = 0; @@ -1082,7 +1087,7 @@ void maybe_blit (int hpos, int hack) m68k_getpc(), vpos, blit_cyclecounter); } - if (currprefs.blitter_cycle_exact) { + if (blitter_cycle_exact) { decide_blitter (hpos); goto end; } diff --git a/custom.c b/custom.c index d86fe00c..b60e9d35 100755 --- a/custom.c +++ b/custom.c @@ -9,7 +9,6 @@ */ //#define CUSTOM_DEBUG -#define DEBUG_COPPER 0 #define SPRITE_DEBUG 0 #define SPRITE_DEBUG_MINY 0 #define SPRITE_DEBUG_MAXY 100 @@ -209,7 +208,6 @@ static unsigned int diwstrt, diwstop, diwhigh; static int diwhigh_written; static unsigned int ddfstrt, ddfstop, ddfstrt_old_hpos, ddfstrt_old_vpos; static int ddf_change; -static unsigned int bplcon0_at_start; /* The display and data fetch windows */ @@ -276,23 +274,6 @@ unsigned long int frametime = 0, lastframetime = 0, timeframes = 0, hsync_counte unsigned long int idletime; int bogusframe; -#if DEBUG_COPPER -/* 10000 isn't enough! */ -#define NR_COPPER_RECORDS 40000 -#else -#define NR_COPPER_RECORDS 1 -#endif - -/* Record copper activity for the debugger. */ -struct cop_record -{ - int hpos, vpos; - uaecptr addr; -}; -static struct cop_record cop_record[2][NR_COPPER_RECORDS]; -static int nr_cop_records[2]; -static int curr_cop_set; - /* Recording of custom chip register changes. */ static int current_change_set; @@ -361,38 +342,11 @@ uae_u32 get_copper_address (int copno) switch (copno) { case 1: return cop1lc; case 2: return cop2lc; + case -1: return cop_state.ip; default: return 0; } } -STATIC_INLINE void record_copper (uaecptr addr, int hpos, int vpos) -{ -#if DEBUG_COPPER - int t = nr_cop_records[curr_cop_set]; - if (t < NR_COPPER_RECORDS) { - cop_record[curr_cop_set][t].addr = addr; - cop_record[curr_cop_set][t].hpos = hpos; - cop_record[curr_cop_set][t].vpos = vpos; - nr_cop_records[curr_cop_set] = t + 1; - } -#endif -} - -int find_copper_record (uaecptr addr, int *phpos, int *pvpos) -{ - int s = curr_cop_set ^ 1; - int t = nr_cop_records[s]; - int i; - for (i = 0; i < t; i++) { - if (cop_record[s][i].addr == addr) { - *phpos = cop_record[s][i].hpos; - *pvpos = cop_record[s][i].vpos; - return 1; - } - } - return 0; -} - int rpt_available = 0; void reset_frame_rate_hack (void) @@ -1083,6 +1037,11 @@ STATIC_INLINE void flush_display (int fm) toscr_nbits = 0; } +STATIC_INLINE fetch_start(void) +{ + fetch_state = fetch_started; +} + /* Called when all planes have been fetched, i.e. when a new block of data is available to be displayed. The data in fetched[] is moved into todisplay[]. */ @@ -1433,7 +1392,7 @@ STATIC_INLINE void update_fetch (int until, int fm) if (fetch_state == fetch_was_plane0) break; - fetch_state = fetch_started; + fetch_start(); if (one_fetch_cycle (pos, ddfstop_to_test, dma, fm)) return; } @@ -1493,7 +1452,7 @@ STATIC_INLINE void update_fetch (int until, int fm) for (; pos < until; pos++) { if (fetch_state == fetch_was_plane0) beginning_of_plane_block (pos, fm); - fetch_state = fetch_started; + fetch_start(); if (one_fetch_cycle (pos, ddfstop_to_test, dma, fm)) return; @@ -1526,7 +1485,7 @@ STATIC_INLINE void decide_fetch (int hpos) static void start_bpl_dma (int hpos, int hstart) { - fetch_state = fetch_started; + fetch_start(); fetch_cycle = 0; last_fetch_hpos = hstart; out_nbits = 0; @@ -1956,7 +1915,7 @@ static void decide_sprites (int hpos) int count, i; /* apparantly writes to custom registers happen in the 3/4th of cycle * and sprite xpos comparator sees it immediately */ - int point = hpos * 2 - 4; + int point = hpos * 2 - 3; int width = sprite_width; int window_width = (width << lores_shift) >> sprres; @@ -3389,7 +3348,8 @@ static void perform_copper_write (int old_hpos) { unsigned int address = cop_state.saved_i1 & 0x1FE; - record_copper (cop_state.saved_ip - 4, old_hpos, vpos); + if (debug_copper) + record_copper (cop_state.saved_ip - 4, old_hpos, vpos); if (test_copper_dangerous (address)) return; @@ -3641,7 +3601,8 @@ static void update_copper (int until_hpos) goto out; } - record_copper (cop_state.ip - 4, old_hpos, vpos); + if (debug_copper) + record_copper (cop_state.ip - 4, old_hpos, vpos); cop_state.state = COP_read1; break; @@ -3681,7 +3642,8 @@ static void update_copper (int until_hpos) test_copper_dangerous (chipmem_agnus_wget(cop_state.ip)); } - record_copper (cop_state.ip - 4, old_hpos, vpos); + if (debug_copper) + record_copper (cop_state.ip - 4, old_hpos, vpos); break; } @@ -4181,9 +4143,8 @@ static void vsync_handler (void) cnt--; } - /* Start a new set of copper records. */ - curr_cop_set ^= 1; - nr_cop_records[curr_cop_set] = 0; + if (debug_copper) + record_copper_reset(); /* For now, let's only allow this to change at vsync time. It gets too * hairy otherwise. */ diff --git a/debug.c b/debug.c index 90e897de..2a296649 100755 --- a/debug.c +++ b/debug.c @@ -42,6 +42,8 @@ static int debug_rewind; static int memwatch_enabled, memwatch_triggered; int debugging; int exception_debugging; +int debug_copper; +static uaecptr debug_copper_pc; extern int audio_channel_mask; @@ -75,20 +77,22 @@ static char help[] = { " d
[] Disassembly starting at
\n" " t [instructions] Step one or more instructions\n" " z Step through one instruction - useful for JSR, DBRA etc\n" - " f Step forward until PC in RAM\n" + " f Step forward until PC in RAM (\"boot block finder\")\n" " f
Add/remove breakpoint\n" " fi Step forward until PC points to RTS/RTD or RTE\n" " fi Step forward until PC points to \n" " fl List breakpoints\n" " fd Remove all breakpoints\n" " f Step forward until <= PC <= \n" - " e Dump contents of all custom registers\n" + " e [] Dump contents of all custom registers\n" " i [] Dump contents of interrupt and trap vectors\n" - " o <1|2|addr> []View memory as Copper instructions\n" + " o <0-2|addr> []View memory as Copper instructions\n" + " od Enable/disable Copper vpos/hpos tracing\n" + " ot Copper single step trace\n" + " ob Copper breakpoint\n" " O Display bitplane offsets\n" " O Offset a bitplane\n" - " H[H] Show PC history (HH=full CPU info) instructions\n" - " M Search for *Tracker sound modules\n" + " H[H] Show PC history (HH=full CPU info) instructions\n" " C Search for values like energy or lifes in games\n" " W
Write into Amiga memory\n" " w
[]\n" @@ -359,17 +363,76 @@ static void disassemble_wait (FILE *file, unsigned long insn) vp, ve, hp, he, bfd); } +#define NR_COPPER_RECORDS 40000 +/* Record copper activity for the debugger. */ +struct cop_record +{ + int hpos, vpos; + uaecptr addr; +}; +static struct cop_record *cop_record[2]; +static int nr_cop_records[2], curr_cop_set; + +void record_copper_reset(void) +{ +/* Start a new set of copper records. */ + curr_cop_set ^= 1; + nr_cop_records[curr_cop_set] = 0; +} + +void record_copper (uaecptr addr, int hpos, int vpos) +{ + int t = nr_cop_records[curr_cop_set]; + if (!cop_record[0]) { + cop_record[0] = malloc (NR_COPPER_RECORDS * sizeof (struct cop_record)); + cop_record[1] = malloc (NR_COPPER_RECORDS * sizeof (struct cop_record)); + } + if (t < NR_COPPER_RECORDS) { + cop_record[curr_cop_set][t].addr = addr; + cop_record[curr_cop_set][t].hpos = hpos; + cop_record[curr_cop_set][t].vpos = vpos; + nr_cop_records[curr_cop_set] = t + 1; + } + if (debug_copper & 2) { /* trace */ + debug_copper &= ~2; + activate_debugger(); + } + if ((debug_copper & 4) && addr >= debug_copper_pc && addr <= debug_copper_pc + 3) { + debug_copper &= ~4; + activate_debugger(); + } +} + +static int find_copper_record (uaecptr addr, int *phpos, int *pvpos) +{ + int s = curr_cop_set ^ 1; + int t = nr_cop_records[s]; + int i; + for (i = 0; i < t; i++) { + if (cop_record[s][i].addr == addr) { + *phpos = cop_record[s][i].hpos; + *pvpos = cop_record[s][i].vpos; + return 1; + } + } + return 0; +} + /* simple decode copper by Mark Cox */ static void decode_copper_insn (FILE* file, unsigned long insn, unsigned long addr) { uae_u32 insn_type = insn & 0x00010001; int hpos, vpos; + char here = ' '; char record[] = " "; if (find_copper_record (addr, &hpos, &vpos)) { sprintf (record, " [%03x %03x]", vpos, hpos); } + + if (get_copper_address(-1) >= addr && get_copper_address(-1) <= addr + 3) + here = '*'; - console_out ("%08lx: %04lx %04lx%s\t; ", addr, insn >> 16, insn & 0xFFFF, record); + console_out ("%c%08lx: %04lx %04lx%s\t; ", here, addr, insn >> 16, insn & 0xFFFF, record); switch (insn_type) { case 0x00010000: /* WAIT insn */ @@ -409,7 +472,6 @@ static void decode_copper_insn (FILE* file, unsigned long insn, unsigned long ad } - static uaecptr decode_copperlist (FILE* file, uaecptr address, int nolines) { uae_u32 insn; @@ -424,6 +486,50 @@ static uaecptr decode_copperlist (FILE* file, uaecptr address, int nolines) * values that mean the end of the copperlist */ } +static int copper_debugger (char **c) +{ + static uaecptr nxcopper; + uae_u32 maddr; + int lines; + + if (**c == 'd') { + next_char(c); + if (debug_copper) + debug_copper = 0; + else + debug_copper = 1; + console_out ("Copper debugger %s.\n", debug_copper ? "enabled" : "disabled"); + } else if(**c == 't') { + debug_copper = 1|2; + return 1; + } else if(**c == 'b') { + (*c)++; + debug_copper = 1|4; + if (more_params(c)) { + debug_copper_pc = readhex(c); + console_out ("Copper breakpoint @0x%08.8x\n", debug_copper_pc); + } else { + debug_copper &= ~4; + } + } else { + if (more_params(c)) { + maddr = readhex(c); + if (maddr == 1 || maddr == 2) + maddr = get_copper_address (maddr); + else if (maddr == 0) + maddr = get_copper_address (-1); + } else + maddr = nxcopper; + + if (more_params (c)) + lines = readhex (c); + else + lines = 20; + + nxcopper = decode_copperlist (stdout, maddr, lines); + } + return 0; +} /* cheat-search by Holger Jakob */ static void cheatsearch (char **c) @@ -1220,10 +1326,10 @@ static void m68k_modify (char **inptr) static void debug_1 (void) { char input[80]; - uaecptr nxdis, nxmem, nxcopper, addr; + uaecptr nxdis, nxmem, addr; m68k_dumpstate (stdout, &nextpc); - nxdis = nextpc; nxmem = nxcopper = 0; + nxdis = nextpc; nxmem = 0; for (;;) { char cmd, *inptr; @@ -1374,23 +1480,11 @@ static void debug_1 (void) break; case 'o': { - uae_u32 maddr; - int lines; - - if (more_params(&inptr)) { - maddr = readhex(&inptr); - if (maddr == 1 || maddr == 2) - maddr = get_copper_address (maddr); + if (copper_debugger(&inptr)) { + debugger_active = 0; + debugging = 0; + return; } - else - maddr = nxcopper; - - if (more_params (&inptr)) - lines = readhex (&inptr); - else - lines = 20; - - nxcopper = decode_copperlist (stdout, maddr, lines); break; } case 'O': @@ -1558,7 +1652,7 @@ int notinrom (void) return 1; return 0; } - +/* const char *debuginfo (int mode) { static char txt[100]; @@ -1567,3 +1661,4 @@ const char *debuginfo (int mode) pc, get_word(pc), get_word(pc+2), get_word(pc+4)); return txt; } +*/ \ No newline at end of file diff --git a/filesys.c b/filesys.c index 2b4ea4a1..e530df6b 100755 --- a/filesys.c +++ b/filesys.c @@ -2286,7 +2286,7 @@ action_lock_from_fh (Unit *unit, dpacket packet) PUT_PCK_RES1 (packet, DOS_FALSE); return; } - out = action_dup_lock_2 (unit, packet, make_lock (unit, k->aino->uniq, -2) >> 2); + out = action_dup_lock_2 (unit, packet, make_lock (unit, k->aino->uniq, -2)); write_log("=%x\n", out); } diff --git a/identify.c b/identify.c index cc81713f..391c62b9 100755 --- a/identify.c +++ b/identify.c @@ -119,23 +119,23 @@ struct customData custd[] = #if 0 { "BLTDDAT", 0xdff000 }, /* Blitter dest. early read (dummy address) */ #endif - { "DMACONR", 0xdff002, 1, 0 }, /* Dma control (and blitter status) read */ - { "VPOSR", 0xdff004, 1, 0 }, /* Read vert most sig. bits (and frame flop */ - { "VHPOSR", 0xdff006, 1, 0 }, /* Read vert and horiz position of beam */ + { "DMACONR", 0xdff002, 1 }, /* Dma control (and blitter status) read */ + { "VPOSR", 0xdff004, 1 }, /* Read vert most sig. bits (and frame flop */ + { "VHPOSR", 0xdff006, 1 }, /* Read vert and horiz position of beam */ #if 0 { "DSKDATR", 0xdff008 }, /* Disk data early read (dummy address) */ #endif - { "JOY0DAT", 0xdff00A, 1, 0 }, /* Joystick-mouse 0 data (vert,horiz) */ - { "JOT1DAT", 0xdff00C, 1, 0 }, /* Joystick-mouse 1 data (vert,horiz) */ - { "CLXDAT", 0xdff00E, 1, 0 }, /* Collision data reg. (read and clear) */ - { "ADKCONR", 0xdff010, 1, 0 }, /* Audio,disk control register read */ - { "POT0DAT", 0xdff012, 1, 0 }, /* Pot counter pair 0 data (vert,horiz) */ - { "POT1DAT", 0xdff014, 1, 0 }, /* Pot counter pair 1 data (vert,horiz) */ - { "POTGOR", 0xdff016, 1, 0 }, /* Pot pin data read */ - { "SERDATR", 0xdff018, 1, 0 }, /* Serial port data and status read */ - { "DSKBYTR", 0xdff01A, 1, 0 }, /* Disk data byte and status read */ - { "INTENAR", 0xdff01C, 1, 0 }, /* Interrupt enable bits read */ - { "INTREQR", 0xdff01E, 1, 0 }, /* Interrupt request bits read */ + { "JOY0DAT", 0xdff00A, 1 }, /* Joystick-mouse 0 data (vert,horiz) */ + { "JOT1DAT", 0xdff00C, 1 }, /* Joystick-mouse 1 data (vert,horiz) */ + { "CLXDAT", 0xdff00E, 1 }, /* Collision data reg. (read and clear) */ + { "ADKCONR", 0xdff010, 1 }, /* Audio,disk control register read */ + { "POT0DAT", 0xdff012, 1 }, /* Pot counter pair 0 data (vert,horiz) */ + { "POT1DAT", 0xdff014, 1 }, /* Pot counter pair 1 data (vert,horiz) */ + { "POTGOR", 0xdff016, 1 }, /* Pot pin data read */ + { "SERDATR", 0xdff018, 1 }, /* Serial port data and status read */ + { "DSKBYTR", 0xdff01A, 1 }, /* Disk data byte and status read */ + { "INTENAR", 0xdff01C, 1 }, /* Interrupt enable bits read */ + { "INTREQR", 0xdff01E, 1 }, /* Interrupt request bits read */ { "DSKPTH", 0xdff020, 2, 1 }, /* Disk pointer (high 5 bits) */ { "DSKPTL", 0xdff022, 2, 2 }, /* Disk pointer (low 15 bits) */ { "DSKLEN", 0xdff024, 2, 0 }, /* Disk lentgh */ @@ -167,9 +167,9 @@ struct customData custd[] = { "BPTDPTH", 0xdff054, 2, 1 }, /* Blitter pointer to destn D (high 5 bits) */ { "BLTDPTL", 0xdff056, 2, 2 }, /* Blitter pointer to destn D (low 15 bits) */ { "BLTSIZE", 0xdff058, 2, 0 }, /* Blitter start and size (win/width,height) */ - { "BLTCON0L", 0xdff05A, 2, 0 }, /* Blitter control 0 lower 8 bits (minterms) */ - { "BLTSIZV", 0xdff05C, 2, 0 }, /* Blitter V size (for 15 bit vert size) */ - { "BLTSIZH", 0xdff05E, 2, 0 }, /* Blitter H size & start (for 11 bit H size) */ + { "BLTCON0L", 0xdff05A, 2, 4 }, /* Blitter control 0 lower 8 bits (minterms) */ + { "BLTSIZV", 0xdff05C, 2, 4 }, /* Blitter V size (for 15 bit vert size) */ + { "BLTSIZH", 0xdff05E, 2, 4 }, /* Blitter H size & start (for 11 bit H size) */ { "BLTCMOD", 0xdff060, 2, 0 }, /* Blitter modulo for source C */ { "BLTBMOD", 0xdff062, 2, 0 }, /* Blitter modulo for source B */ { "BLTAMOD", 0xdff064, 2, 0 }, /* Blitter modulo for source A */ @@ -188,114 +188,114 @@ struct customData custd[] = { "SPRHDAT", 0xdff078 }, /* Ext logic UHRES sprite pointer and data identifier */ { "BPLHDAT", 0xdff07A }, /* Ext logic UHRES bit plane identifier */ #endif - { "LISAID", 0xdff07C, 1, 0 }, /* Chip revision level for Denise/Lisa */ - { "DSKSYNC", 0xdff07E, 2, 0 }, /* Disk sync pattern reg for disk read */ + { "LISAID", 0xdff07C, 1, 8 }, /* Chip revision level for Denise/Lisa */ + { "DSKSYNC", 0xdff07E, 2 }, /* Disk sync pattern reg for disk read */ { "COP1LCH", 0xdff080, 2, 1 }, /* Coprocessor first location reg (high 5 bits) */ { "COP1LCL", 0xdff082, 2, 2 }, /* Coprocessor first location reg (low 15 bits) */ { "COP2LCH", 0xdff084, 2, 1 }, /* Coprocessor second reg (high 5 bits) */ { "COP2LCL", 0xdff086, 2, 2 }, /* Coprocessor second reg (low 15 bits) */ - { "COPJMP1", 0xdff088, 2, 0 }, /* Coprocessor restart at first location */ - { "COPJMP2", 0xdff08A, 2, 0 }, /* Coprocessor restart at second location */ + { "COPJMP1", 0xdff088, 2 }, /* Coprocessor restart at first location */ + { "COPJMP2", 0xdff08A, 2 }, /* Coprocessor restart at second location */ #if 0 { "COPINS", 0xdff08C }, /* Coprocessor inst fetch identify */ #endif - { "DIWSTRT", 0xdff08E, 2, 0 }, /* Display window start (upper left vert-hor pos) */ - { "DIWSTOP", 0xdff090, 2, 0 }, /* Display window stop (lower right vert-hor pos) */ - { "DDFSTRT", 0xdff092, 2, 0 }, /* Display bit plane data fetch start.hor pos */ - { "DDFSTOP", 0xdff094, 2, 0 }, /* Display bit plane data fetch stop.hor pos */ - { "DMACON", 0xdff096, 2, 0 }, /* DMA control write (clear or set) */ - { "CLXCON", 0xdff098, 2, 0 }, /* Collision control */ - { "INTENA", 0xdff09A, 2, 0 }, /* Interrupt enable bits (clear or set bits) */ - { "INTREQ", 0xdff09C, 2, 0 }, /* Interrupt request bits (clear or set bits) */ - { "ADKCON", 0xdff09E, 2, 0 }, /* Audio,disk,UART,control */ + { "DIWSTRT", 0xdff08E, 2 }, /* Display window start (upper left vert-hor pos) */ + { "DIWSTOP", 0xdff090, 2 }, /* Display window stop (lower right vert-hor pos) */ + { "DDFSTRT", 0xdff092, 2 }, /* Display bit plane data fetch start.hor pos */ + { "DDFSTOP", 0xdff094, 2 }, /* Display bit plane data fetch stop.hor pos */ + { "DMACON", 0xdff096, 2 }, /* DMA control write (clear or set) */ + { "CLXCON", 0xdff098, 2 }, /* Collision control */ + { "INTENA", 0xdff09A, 2 }, /* Interrupt enable bits (clear or set bits) */ + { "INTREQ", 0xdff09C, 2 }, /* Interrupt request bits (clear or set bits) */ + { "ADKCON", 0xdff09E, 2 }, /* Audio,disk,UART,control */ { "AUD0LCH", 0xdff0A0, 2, 1 }, /* Audio channel 0 location (high 5 bits) */ { "AUD0LCL", 0xdff0A2, 2, 2 }, /* Audio channel 0 location (low 15 bits) */ - { "AUD0LEN", 0xdff0A4, 2, 0 }, /* Audio channel 0 lentgh */ - { "AUD0PER", 0xdff0A6, 2, 0 }, /* Audio channel 0 period */ - { "AUD0VOL", 0xdff0A8, 2, 0 }, /* Audio channel 0 volume */ - { "AUD0DAT", 0xdff0AA, 2, 0 }, /* Audio channel 0 data */ + { "AUD0LEN", 0xdff0A4, 2 }, /* Audio channel 0 lentgh */ + { "AUD0PER", 0xdff0A6, 2 }, /* Audio channel 0 period */ + { "AUD0VOL", 0xdff0A8, 2 }, /* Audio channel 0 volume */ + { "AUD0DAT", 0xdff0AA, 2 }, /* Audio channel 0 data */ #if 0 { "Unknown", 0xdff0AC }, /* Unknown or Unused */ { "Unknown", 0xdff0AE }, /* Unknown or Unused */ #endif - { "AUD1LCH", 0xdff0B0, 2, 0 }, /* Audio channel 1 location (high 5 bits) */ - { "AUD1LCL", 0xdff0B2, 2, 0 }, /* Audio channel 1 location (low 15 bits) */ - { "AUD1LEN", 0xdff0B4, 2, 0 }, /* Audio channel 1 lentgh */ - { "AUD1PER", 0xdff0B6, 2, 0 }, /* Audio channel 1 period */ - { "AUD1VOL", 0xdff0B8, 2, 0 }, /* Audio channel 1 volume */ - { "AUD1DAT", 0xdff0BA, 2, 0 }, /* Audio channel 1 data */ + { "AUD1LCH", 0xdff0B0, 2, 1 }, /* Audio channel 1 location (high 5 bits) */ + { "AUD1LCL", 0xdff0B2, 2, 2 }, /* Audio channel 1 location (low 15 bits) */ + { "AUD1LEN", 0xdff0B4, 2 }, /* Audio channel 1 lentgh */ + { "AUD1PER", 0xdff0B6, 2 }, /* Audio channel 1 period */ + { "AUD1VOL", 0xdff0B8, 2 }, /* Audio channel 1 volume */ + { "AUD1DAT", 0xdff0BA, 2 }, /* Audio channel 1 data */ #if 0 { "Unknown", 0xdff0BC }, /* Unknown or Unused */ { "Unknown", 0xdff0BE }, /* Unknown or Unused */ #endif - { "AUD2LCH", 0xdff0C0, 2, 0 }, /* Audio channel 2 location (high 5 bits) */ - { "AUD2LCL", 0xdff0C2, 2, 0 }, /* Audio channel 2 location (low 15 bits) */ - { "AUD2LEN", 0xdff0C4, 2, 0 }, /* Audio channel 2 lentgh */ - { "AUD2PER", 0xdff0C6, 2, 0 }, /* Audio channel 2 period */ - { "AUD2VOL", 0xdff0C8, 2, 0 }, /* Audio channel 2 volume */ - { "AUD2DAT", 0xdff0CA, 2, 0 }, /* Audio channel 2 data */ + { "AUD2LCH", 0xdff0C0, 2, 1 }, /* Audio channel 2 location (high 5 bits) */ + { "AUD2LCL", 0xdff0C2, 2, 2 }, /* Audio channel 2 location (low 15 bits) */ + { "AUD2LEN", 0xdff0C4, 2 }, /* Audio channel 2 lentgh */ + { "AUD2PER", 0xdff0C6, 2 }, /* Audio channel 2 period */ + { "AUD2VOL", 0xdff0C8, 2 }, /* Audio channel 2 volume */ + { "AUD2DAT", 0xdff0CA, 2 }, /* Audio channel 2 data */ #if 0 { "Unknown", 0xdff0CC }, /* Unknown or Unused */ { "Unknown", 0xdff0CE }, /* Unknown or Unused */ #endif - { "AUD3LCH", 0xdff0D0, 2, 0 }, /* Audio channel 3 location (high 5 bits) */ - { "AUD3LCL", 0xdff0D2, 2, 0 }, /* Audio channel 3 location (low 15 bits) */ - { "AUD3LEN", 0xdff0D4, 2, 0 }, /* Audio channel 3 lentgh */ - { "AUD3PER", 0xdff0D6, 2, 0 }, /* Audio channel 3 period */ - { "AUD3VOL", 0xdff0D8, 2, 0 }, /* Audio channel 3 volume */ - { "AUD3DAT", 0xdff0DA, 2, 0 }, /* Audio channel 3 data */ + { "AUD3LCH", 0xdff0D0, 2, 1 }, /* Audio channel 3 location (high 5 bits) */ + { "AUD3LCL", 0xdff0D2, 2, 2 }, /* Audio channel 3 location (low 15 bits) */ + { "AUD3LEN", 0xdff0D4, 2 }, /* Audio channel 3 lentgh */ + { "AUD3PER", 0xdff0D6, 2 }, /* Audio channel 3 period */ + { "AUD3VOL", 0xdff0D8, 2 }, /* Audio channel 3 volume */ + { "AUD3DAT", 0xdff0DA, 2 }, /* Audio channel 3 data */ #if 0 { "Unknown", 0xdff0DC }, /* Unknown or Unused */ { "Unknown", 0xdff0DE }, /* Unknown or Unused */ #endif - { "BPL1PTH", 0xdff0E0, 2 }, /* Bit plane pointer 1 (high 5 bits) */ - { "BPL1PTL", 0xdff0E2, 2 }, /* Bit plane pointer 1 (low 15 bits) */ - { "BPL2PTH", 0xdff0E4, 2 }, /* Bit plane pointer 2 (high 5 bits) */ - { "BPL2PTL", 0xdff0E6, 2 }, /* Bit plane pointer 2 (low 15 bits) */ - { "BPL3PTH", 0xdff0E8, 2 }, /* Bit plane pointer 3 (high 5 bits) */ - { "BPL3PTL", 0xdff0EA, 2 }, /* Bit plane pointer 3 (low 15 bits) */ - { "BPL4PTH", 0xdff0EC, 2 }, /* Bit plane pointer 4 (high 5 bits) */ - { "BPL4PTL", 0xdff0EE, 2 }, /* Bit plane pointer 4 (low 15 bits) */ - { "BPL5PTH", 0xdff0F0, 2 }, /* Bit plane pointer 5 (high 5 bits) */ - { "BPL5PTL", 0xdff0F2, 2 }, /* Bit plane pointer 5 (low 15 bits) */ - { "BPL6PTH", 0xdff0F4, 2 }, /* Bit plane pointer 6 (high 5 bits) */ - { "BPL6PTL", 0xdff0F6, 2 }, /* Bit plane pointer 6 (low 15 bits) */ - { "BPL7PTH", 0xdff0F8, 2 }, /* Bit plane pointer 7 (high 5 bits) */ - { "BPL7PTL", 0xdff0FA, 2 }, /* Bit plane pointer 7 (low 15 bits) */ - { "BPL8PTH", 0xdff0FC, 2 }, /* Bit plane pointer 8 (high 5 bits) */ - { "BPL8PTL", 0xdff0FE, 2 }, /* Bit plane pointer 8 (low 15 bits) */ + { "BPL1PTH", 0xdff0E0, 2, 1 }, /* Bit plane pointer 1 (high 5 bits) */ + { "BPL1PTL", 0xdff0E2, 2, 2 }, /* Bit plane pointer 1 (low 15 bits) */ + { "BPL2PTH", 0xdff0E4, 2, 1 }, /* Bit plane pointer 2 (high 5 bits) */ + { "BPL2PTL", 0xdff0E6, 2, 2 }, /* Bit plane pointer 2 (low 15 bits) */ + { "BPL3PTH", 0xdff0E8, 2, 1 }, /* Bit plane pointer 3 (high 5 bits) */ + { "BPL3PTL", 0xdff0EA, 2, 2 }, /* Bit plane pointer 3 (low 15 bits) */ + { "BPL4PTH", 0xdff0EC, 2, 1 }, /* Bit plane pointer 4 (high 5 bits) */ + { "BPL4PTL", 0xdff0EE, 2, 2 }, /* Bit plane pointer 4 (low 15 bits) */ + { "BPL5PTH", 0xdff0F0, 2, 1 }, /* Bit plane pointer 5 (high 5 bits) */ + { "BPL5PTL", 0xdff0F2, 2, 2 }, /* Bit plane pointer 5 (low 15 bits) */ + { "BPL6PTH", 0xdff0F4, 2, 1|8 }, /* Bit plane pointer 6 (high 5 bits) */ + { "BPL6PTL", 0xdff0F6, 2, 2|8 }, /* Bit plane pointer 6 (low 15 bits) */ + { "BPL7PTH", 0xdff0F8, 2, 1|8 }, /* Bit plane pointer 7 (high 5 bits) */ + { "BPL7PTL", 0xdff0FA, 2, 2|8 }, /* Bit plane pointer 7 (low 15 bits) */ + { "BPL8PTH", 0xdff0FC, 2, 1|8 }, /* Bit plane pointer 8 (high 5 bits) */ + { "BPL8PTL", 0xdff0FE, 2, 2|8 }, /* Bit plane pointer 8 (low 15 bits) */ { "BPLCON0", 0xdff100, 2 }, /* Bit plane control reg (misc control bits) */ { "BPLCON1", 0xdff102, 2 }, /* Bit plane control reg (scroll val PF1,PF2) */ { "BPLCON2", 0xdff104, 2 }, /* Bit plane control reg (priority control) */ - { "BPLCON3", 0xdff106, 2 }, /* Bit plane control reg (enhanced features) */ + { "BPLCON3", 0xdff106, 2|8 }, /* Bit plane control reg (enhanced features) */ { "BPL1MOD", 0xdff108, 2 }, /* Bit plane modulo (odd planes,or active- fetch lines if bitplane scan-doubling is enabled */ { "BPL2MOD", 0xdff10A, 2 }, /* Bit plane modulo (even planes or inactive- fetch lines if bitplane scan-doubling is enabled */ - { "BPLCON4", 0xdff10C, 2 }, /* Bit plane control reg (bitplane and sprite masks) */ - { "CLXCON2", 0xdff10e, 2 }, /* Extended collision control reg */ + { "BPLCON4", 0xdff10C, 2|8 }, /* Bit plane control reg (bitplane and sprite masks) */ + { "CLXCON2", 0xdff10e, 2|8 }, /* Extended collision control reg */ { "BPL1DAT", 0xdff110, 2 }, /* Bit plane 1 data (parallel to serial con- vert) */ { "BPL2DAT", 0xdff112, 2 }, /* Bit plane 2 data (parallel to serial con- vert) */ { "BPL3DAT", 0xdff114, 2 }, /* Bit plane 3 data (parallel to serial con- vert) */ { "BPL4DAT", 0xdff116, 2 }, /* Bit plane 4 data (parallel to serial con- vert) */ { "BPL5DAT", 0xdff118, 2 }, /* Bit plane 5 data (parallel to serial con- vert) */ { "BPL6DAT", 0xdff11a, 2 }, /* Bit plane 6 data (parallel to serial con- vert) */ - { "BPL7DAT", 0xdff11c, 2 }, /* Bit plane 7 data (parallel to serial con- vert) */ - { "BPL8DAT", 0xdff11e, 2 }, /* Bit plane 8 data (parallel to serial con- vert) */ - { "SPR0PTH", 0xdff120, 2 }, /* Sprite 0 pointer (high 5 bits) */ - { "SPR0PTL", 0xdff122, 2 }, /* Sprite 0 pointer (low 15 bits) */ - { "SPR1PTH", 0xdff124, 2 }, /* Sprite 1 pointer (high 5 bits) */ - { "SPR1PTL", 0xdff126, 2 }, /* Sprite 1 pointer (low 15 bits) */ - { "SPR2PTH", 0xdff128, 2 }, /* Sprite 2 pointer (high 5 bits) */ - { "SPR2PTL", 0xdff12A, 2 }, /* Sprite 2 pointer (low 15 bits) */ - { "SPR3PTH", 0xdff12C, 2 }, /* Sprite 3 pointer (high 5 bits) */ - { "SPR3PTL", 0xdff12E, 2 }, /* Sprite 3 pointer (low 15 bits) */ - { "SPR4PTH", 0xdff130, 2 }, /* Sprite 4 pointer (high 5 bits) */ - { "SPR4PTL", 0xdff132, 2 }, /* Sprite 4 pointer (low 15 bits) */ - { "SPR5PTH", 0xdff134, 2 }, /* Sprite 5 pointer (high 5 bits) */ - { "SPR5PTL", 0xdff136, 2 }, /* Sprite 5 pointer (low 15 bits) */ - { "SPR6PTH", 0xdff138, 2 }, /* Sprite 6 pointer (high 5 bits) */ - { "SPR6PTL", 0xdff13A, 2 }, /* Sprite 6 pointer (low 15 bits) */ - { "SPR7PTH", 0xdff13C, 2 }, /* Sprite 7 pointer (high 5 bits) */ - { "SPR7PTL", 0xdff13E, 2 }, /* Sprite 7 pointer (low 15 bits) */ + { "BPL7DAT", 0xdff11c, 2|8 }, /* Bit plane 7 data (parallel to serial con- vert) */ + { "BPL8DAT", 0xdff11e, 2|8 }, /* Bit plane 8 data (parallel to serial con- vert) */ + { "SPR0PTH", 0xdff120, 2, 1 }, /* Sprite 0 pointer (high 5 bits) */ + { "SPR0PTL", 0xdff122, 2, 2 }, /* Sprite 0 pointer (low 15 bits) */ + { "SPR1PTH", 0xdff124, 2, 1 }, /* Sprite 1 pointer (high 5 bits) */ + { "SPR1PTL", 0xdff126, 2, 2 }, /* Sprite 1 pointer (low 15 bits) */ + { "SPR2PTH", 0xdff128, 2, 1 }, /* Sprite 2 pointer (high 5 bits) */ + { "SPR2PTL", 0xdff12A, 2, 2 }, /* Sprite 2 pointer (low 15 bits) */ + { "SPR3PTH", 0xdff12C, 2, 1 }, /* Sprite 3 pointer (high 5 bits) */ + { "SPR3PTL", 0xdff12E, 2, 2 }, /* Sprite 3 pointer (low 15 bits) */ + { "SPR4PTH", 0xdff130, 2, 1 }, /* Sprite 4 pointer (high 5 bits) */ + { "SPR4PTL", 0xdff132, 2, 2 }, /* Sprite 4 pointer (low 15 bits) */ + { "SPR5PTH", 0xdff134, 2, 1 }, /* Sprite 5 pointer (high 5 bits) */ + { "SPR5PTL", 0xdff136, 2, 2 }, /* Sprite 5 pointer (low 15 bits) */ + { "SPR6PTH", 0xdff138, 2, 1 }, /* Sprite 6 pointer (high 5 bits) */ + { "SPR6PTL", 0xdff13A, 2, 2 }, /* Sprite 6 pointer (low 15 bits) */ + { "SPR7PTH", 0xdff13C, 2, 1 }, /* Sprite 7 pointer (high 5 bits) */ + { "SPR7PTL", 0xdff13E, 2, 2 }, /* Sprite 7 pointer (low 15 bits) */ { "SPR0POS", 0xdff140, 2 }, /* Sprite 0 vert-horiz start pos data */ { "SPR0CTL", 0xdff142, 2 }, /* Sprite 0 position and control data */ { "SPR0DATA", 0xdff144, 2 }, /* Sprite 0 image data register A */ @@ -360,14 +360,14 @@ struct customData custd[] = { "COLOR29", 0xdff1BA, 2 }, /* Color table 29 */ { "COLOR30", 0xdff1BC, 2 }, /* Color table 30 */ { "COLOR31", 0xdff1BE, 2 }, /* Color table 31 */ - { "HTOTAL", 0xdff1C0, 2 }, /* Highest number count in horiz line (VARBEAMEN = 1) */ - { "HSSTOP", 0xdff1C2, 2 }, /* Horiz line pos for HSYNC stop */ - { "HBSTRT", 0xdff1C4, 2 }, /* Horiz line pos for HBLANK start */ - { "HBSTOP", 0xdff1C6, 2 }, /* Horiz line pos for HBLANK stop */ - { "VTOTAL", 0xdff1C8, 2 }, /* Highest numbered vertical line (VARBEAMEN = 1) */ - { "VSSTOP", 0xdff1CA, 2 }, /* Vert line for VBLANK start */ - { "VBSTRT", 0xdff1CC, 2 }, /* Vert line for VBLANK start */ - { "VBSTOP", 0xdff1CE, 2 }, /* Vert line for VBLANK stop */ + { "HTOTAL", 0xdff1C0, 2|4 }, /* Highest number count in horiz line (VARBEAMEN = 1) */ + { "HSSTOP", 0xdff1C2, 2|4 }, /* Horiz line pos for HSYNC stop */ + { "HBSTRT", 0xdff1C4, 2|4 }, /* Horiz line pos for HBLANK start */ + { "HBSTOP", 0xdff1C6, 2|4 }, /* Horiz line pos for HBLANK stop */ + { "VTOTAL", 0xdff1C8, 2|4 }, /* Highest numbered vertical line (VARBEAMEN = 1) */ + { "VSSTOP", 0xdff1CA, 2|4 }, /* Vert line for VBLANK start */ + { "VBSTRT", 0xdff1CC, 2|4 }, /* Vert line for VBLANK start */ + { "VBSTOP", 0xdff1CE, 2|4 }, /* Vert line for VBLANK stop */ #if 0 { "SPRHSTRT", 0xdff1D0 }, /* UHRES sprite vertical start */ { "SPRHSTOP", 0xdff1D2 }, /* UHRES sprite vertical stop */ @@ -376,11 +376,11 @@ struct customData custd[] = { "HHPOSW", 0xdff1D8 }, /* DUAL mode hires H beam counter write */ { "HHPOSR", 0xdff1DA }, /* DUAL mode hires H beam counter read */ #endif - { "BEAMCON0", 0xdff1DC, 2 }, /* Beam counter control register (SHRES,UHRES,PAL) */ - { "HSSTRT", 0xdff1DE, 2 }, /* Horizontal sync start (VARHSY) */ - { "VSSTRT", 0xdff1E0, 2 }, /* Vertical sync start (VARVSY) */ - { "HCENTER", 0xdff1E2, 2 }, /* Horizontal pos for vsync on interlace */ - { "DIWHIGH", 0xdff1E4, 2 }, /* Display window upper bits for start/stop */ + { "BEAMCON0", 0xdff1DC, 2|4 }, /* Beam counter control register (SHRES,UHRES,PAL) */ + { "HSSTRT", 0xdff1DE, 2|4 }, /* Horizontal sync start (VARHSY) */ + { "VSSTRT", 0xdff1E0, 2|4 }, /* Vertical sync start (VARVSY) */ + { "HCENTER", 0xdff1E2, 2|4 }, /* Horizontal pos for vsync on interlace */ + { "DIWHIGH", 0xdff1E4, 2|4 }, /* Display window upper bits for start/stop */ #if 0 { "BPLHMOD", 0xdff1E6 }, /* UHRES bit plane modulo */ { "SPRHPTH", 0xdff1E8 }, /* UHRES sprite pointer (high 5 bits) */ @@ -394,7 +394,7 @@ struct customData custd[] = { "RESERVED", 0xdff1F8 }, /* Reserved (forever i guess!) */ { "RESERVED", 0xdff1Fa }, /* Reserved (forever i guess!) */ #endif - { "FMODE", 0xdff1FC, 2 }, /* Fetch mode register */ + { "FMODE", 0xdff1FC, 2|8 }, /* Fetch mode register */ #if 0 { "NO-OP(NULL)", 0xdff1FE }, /* Can also indicate last 2 or 3 refresh cycles or the restart of the COPPER after lockup.*/ diff --git a/include/arcadia.h b/include/arcadia.h index 67add0ec..432f1152 100755 --- a/include/arcadia.h +++ b/include/arcadia.h @@ -15,7 +15,7 @@ extern uae_u8 arcadia_parport (int port, uae_u8 pra, uae_u8 dra); struct arcadiarom { char *name, *bios, *rom; - int bin; + int extra; int b7, b6, b5, b4, b3, b2, b1, b0; uae_u32 boot; }; diff --git a/include/debug.h b/include/debug.h index b79b4bbf..0a229541 100755 --- a/include/debug.h +++ b/include/debug.h @@ -13,11 +13,14 @@ extern int debugging; extern int exception_debugging; +extern int debug_copper; extern void debug(void); extern void activate_debugger(void); extern int notinrom (void); extern const char *debuginfo(int); +extern void record_copper (uaecptr addr, int hpos, int vpos); +extern void record_copper_reset(void); #else diff --git a/include/identify.h b/include/identify.h index e5f39f12..c9ec22a9 100755 --- a/include/identify.h +++ b/include/identify.h @@ -15,9 +15,17 @@ struct customData { const char *name; uae_u32 adr; - uae_u8 rw, dmaadr; + uae_u8 rw, special; }; +/* + special: + + 1: DMA pointer high word + 2: DMA pointer low word + 4: ECS/AGA only + 8: AGA only +*/ extern struct mem_labels mem_labels[]; extern struct mem_labels int_labels[]; diff --git a/memory.c b/memory.c index c7a9d661..e7d60632 100755 --- a/memory.c +++ b/memory.c @@ -146,6 +146,7 @@ static struct romdata roms[] = { { "Cool Spot\0ar_spot", 0, 0, 0, 0, 42, 0, 0, ROMTYPE_ARCADIA }, { "Space Ranger\0ar_sprg", 0, 0, 0, 0, 43, 0, 0, ROMTYPE_ARCADIA }, { "Xenon\0ar_xeon", 0, 0, 0, 0, 44, 0, 0, ROMTYPE_ARCADIA }, + { "World Trophy Soccer\0ar_socc", 0, 0, 0, 0, 45, 0, 0, ROMTYPE_ARCADIA }, { NULL, 0, 0, 0, 0, 0, 0, 0, 0 } diff --git a/newcpu.c b/newcpu.c index 52115cb8..bc5f6c1b 100755 --- a/newcpu.c +++ b/newcpu.c @@ -2435,12 +2435,12 @@ void m68k_dumpstate (void *f, uaecptr *nextpc) for (lookup1 = lookuptab; lookup1->mnemo != dp->mnemo; lookup1++); dp = table68k + regs.ir; for (lookup2 = lookuptab; lookup2->mnemo != dp->mnemo; lookup2++); - f_out (f, "prefetch %04x (%s) %04x (%s)\n", regs.irc, lookup1->name, regs.ir, lookup2->name); + f_out (f, "Prefetch %04x (%s) %04x (%s)\n", regs.irc, lookup1->name, regs.ir, lookup2->name); } m68k_disasm (f, m68k_getpc (), nextpc, 1); if (nextpc) - f_out (f, "next PC: %08lx\n", *nextpc); + f_out (f, "Next PC: %08lx\n", *nextpc); } diff --git a/od-win32/blkdev_win32_spti.c b/od-win32/blkdev_win32_spti.c index bd9443ec..d2c7c71a 100755 --- a/od-win32/blkdev_win32_spti.c +++ b/od-win32/blkdev_win32_spti.c @@ -682,7 +682,8 @@ static void GetInquiryData(PCTSTR pDevId, DWORD idx) if (!Claimed) { sprintf (label, "SCSI(%d):%d:%d:%d:%d", idx, BusData->InitiatorBusId, InquiryData->PathId, InquiryData->TargetId, InquiryData->Lun); - adddrive (label, idx, InquiryData->PathId, InquiryData->TargetId, InquiryData->Lun); + //adddrive (label, idx, InquiryData->PathId, InquiryData->TargetId, InquiryData->Lun); + adddrive (label, idx, 0, 1, 0); } InquiryData = (PSCSI_INQUIRY_DATA) ( (PUCHAR) AdapterInfo + InquiryData->NextInquiryDataOffset ); } // for Luns @@ -994,7 +995,11 @@ static int getCDROMProperty(int idx, HDEVINFO DevInfo, const GUID *guid) return TRUE; } -static const GUID *guids[] = { &GUID_DEVINTERFACE_CDROM, NULL }; +static const GUID *guids[] = { + &GUID_DEVINTERFACE_CDROM, + &GUID_DEVCLASS_IMAGE, + &GUID_DEVCLASS_TAPEDRIVE, + NULL }; static const char *scsinames[] = { "Tape", "Scanner", NULL }; static int rescan(void) @@ -1019,7 +1024,8 @@ static int rescan(void) } for (idx2 = 0; scsinames[idx2]; idx2++) { - for (idx = 0; idx < 10; idx++) { + int max = 10; + for (idx = 0; idx < max; idx++) { sprintf (tmp, "\\\\.\\%s%d", scsinames[idx2], idx); h = CreateFile(tmp, GENERIC_READ | GENERIC_WRITE, FILE_SHARE_READ | FILE_SHARE_WRITE, @@ -1027,10 +1033,12 @@ static int rescan(void) if (h != INVALID_HANDLE_VALUE) { adddrive(tmp, -1, -1, -1, -1); CloseHandle(h); + if (idx == max - 1) + max++; } } } - +/* first = 1; hDevInfo = SetupDiGetClassDevs(&GUID_DEVCLASS_SCSIADAPTER, NULL, NULL, DIGCF_PRESENT); if (hDevInfo != INVALID_HANDLE_VALUE) { @@ -1040,6 +1048,7 @@ static int rescan(void) } } SetupDiDestroyDeviceInfoList(hDevInfo); +*/ return 1; } diff --git a/od-win32/fsdb_win32.c b/od-win32/fsdb_win32.c index 75088912..90551136 100755 --- a/od-win32/fsdb_win32.c +++ b/od-win32/fsdb_win32.c @@ -86,14 +86,19 @@ static int write_uaefsdb (const char *dir, uae_u8 *fsdb) { char *p; HANDLE h; - DWORD written, attr = INVALID_FILE_ATTRIBUTES; + DWORD written, dirflag, dirattr; + DWORD attr = INVALID_FILE_ATTRIBUTES; FILETIME t1, t2, t3; int time_valid = FALSE; int ret = 0; p = make_uaefsdbpath (dir, NULL); + dirattr = GetFileAttributes (dir); + dirflag = FILE_ATTRIBUTE_NORMAL; + if (dirattr != INVALID_FILE_ATTRIBUTES && (dirattr & FILE_ATTRIBUTE_DIRECTORY)) + dirflag = FILE_FLAG_BACKUP_SEMANTICS; /* argh... */ h = CreateFile (dir, GENERIC_READ, 0, - NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL); + NULL, OPEN_EXISTING, dirflag, NULL); if (h != INVALID_HANDLE_VALUE) { if (GetFileTime (h, &t1, &t2, &t3)) time_valid = TRUE; @@ -102,7 +107,7 @@ static int write_uaefsdb (const char *dir, uae_u8 *fsdb) h = CreateFile (p, GENERIC_WRITE, 0, NULL, CREATE_ALWAYS, FILE_ATTRIBUTE_NORMAL, NULL); if (h == INVALID_HANDLE_VALUE && GetLastError () == ERROR_ACCESS_DENIED) { - attr = GetFileAttributes (p); + attr = GetFileAttributes (p); if (attr != INVALID_FILE_ATTRIBUTES) { if (attr & (FILE_ATTRIBUTE_READONLY | FILE_ATTRIBUTE_SYSTEM | FILE_ATTRIBUTE_HIDDEN)) { SetFileAttributes (p, attr & ~(FILE_ATTRIBUTE_READONLY | FILE_ATTRIBUTE_SYSTEM | FILE_ATTRIBUTE_HIDDEN)); @@ -125,7 +130,7 @@ end: SetFileAttributes (p, attr); if (time_valid) { h = CreateFile (dir, GENERIC_WRITE, 0, - NULL, OPEN_EXISTING, FILE_ATTRIBUTE_NORMAL, NULL); + NULL, OPEN_EXISTING, dirflag, NULL); if (h != INVALID_HANDLE_VALUE) { SetFileTime (h, &t1, &t2, &t3); CloseHandle (h); diff --git a/od-win32/machdep/maccess.h b/od-win32/machdep/maccess.h index a3e356e3..e7dfa73c 100755 --- a/od-win32/machdep/maccess.h +++ b/od-win32/machdep/maccess.h @@ -210,6 +210,19 @@ static __inline__ void do_put_mem_long(uae_u32 *a, uae_u32 v) #endif } +static __inline__ void do_put_mem_long_long(uae_u64 *a, uae_u64 v) +{ + uae_u8 *b = (uae_u8 *)a; + *b = (uae_u8)(v >> 56); + *(b+1) = (uae_u8)(v >> 48); + *(b+2) = (uae_u8)(v >> 40); + *(b+3) = (uae_u8)(v >> 32); + *(b+4) = (uae_u8)(v >> 24); + *(b+5) = (uae_u8)(v >> 16); + *(b+6) = (uae_u8)(v >> 8); + *(b+7) = (uae_u8)(v); +} + static __inline__ void do_put_mem_word(uae_u16 *a, uae_u16 v) { uae_u8 *b = (uae_u8 *)a; diff --git a/od-win32/resources/resource.h b/od-win32/resources/resource.h index ad4ef779..75e946ba 100755 --- a/od-win32/resources/resource.h +++ b/od-win32/resources/resource.h @@ -164,7 +164,10 @@ #define IDS_PRI_LOW 187 #define IDI_FOLDER 188 #define IDS_OLDRTGLIBRARY 188 +#define IDS_DEFAULT_AF2005 189 #define IDI_DISPLAY 190 +#define IDS_DEFAULT_AF 190 +#define IDS_DEFAULT_WINUAE 191 #define IDI_ROOT 192 #define IDI_ICON2 194 #define IDI_MEMORY 194 diff --git a/od-win32/resources/winuae.rc b/od-win32/resources/winuae.rc index 682d97ea..cb04a417 100755 --- a/od-win32/resources/winuae.rc +++ b/od-win32/resources/winuae.rc @@ -471,7 +471,7 @@ BEGIN "Button",BS_AUTOCHECKBOX | NOT WS_VISIBLE | WS_TABSTOP,176,198,98,10 CONTROL "Immediate Blitter [] Faster but less compatible blitter emulation.",IDC_BLITIMM, "Button",BS_AUTOCHECKBOX | WS_TABSTOP,174,30,96,10 - CONTROL "Cycle exact CPU and Blitter [] The most compatible A500 emulation mode. Very fast CPU recommended.",IDC_CYCLEEXACT, + CONTROL "Cycle exact CPU and Blitter [] The most compatible A500 emulation mode. Very fast PC recommended.",IDC_CYCLEEXACT, "Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,174,43,100,10 GROUPBOX "Collision level",IDC_STATIC,14,97,267,48 CONTROL "None [] Collision hardware emulation disabled.",IDC_COLLISION0, @@ -1004,6 +1004,9 @@ BEGIN IDS_PRI_BELOWNORMAL "Below Normal" IDS_PRI_LOW "Low" IDS_OLDRTGLIBRARY "Your LIBS:Picasso96/rtg.library (%d.%d) requires updating.\nReplace it with version from ""Amiga Programs""-directory in WinUAE archive.\nNew library fixes graphics problems and increases performance." + IDS_DEFAULT_AF2005 "AmigaForever 2005" + IDS_DEFAULT_AF "AmigaForever (old)" + IDS_DEFAULT_WINUAE "WinUAE default" END STRINGTABLE @@ -1114,13 +1117,12 @@ BEGIN IDS_NUMSG_NOEXTROM "No extended Kickstart ROM found." IDS_NUMSG_MODRIP_NOTFOUND "No modules or compressed data found." IDS_NUMSG_MODRIP_FINISHED "Scan finished." - IDS_NUMSG_MODRIP_SAVE "Module/packer found\n%s\nDo you want to save it?" + IDS_NUMSG_MODRIP_SAVE "Module/packed data found\n%s\nDo you want to save it?" IDS_NUMSG_KS68020 "Your Kickstart requires a 68020 CPU or later CPU." IDS_NUMSG_ROMNEED "You need any following ROM(s)\n\n%s" - IDS_NUMSG_NOZLIB "Zip and gzip support disabled because zlib1.dll is missing." IDS_NUMSG_STATEHD "WARNING: State saves do not support harddrive emulation. This message does not appear again." - IDS_NUMSG_NOCAPS "This disk image needs the C.A.P.S. plugin\nwhich is available from\nhttp//www.caps-project.org/download.shtml" - IDS_NUMSG_OLDCAPS "You need updated C.A.P.S. plugin\nwhich is available from\nhttp//www.caps-project.org/download.shtml" + IDS_NUMSG_NOCAPS "This disk image needs the S.P.S. plugin\nwhich is available from\nhttp//www.softpres.org/" + IDS_NUMSG_OLDCAPS "You need updated S.P.S. plugin\nwhich is available from\nhttp//www.softpres.org/" IDS_IMGCHK_BOOTBLOCKCRCERROR "Selected disk image is not bootable (bootblock CRC error)" IDS_IMGCHK_BOOTBLOCKNO "Selected disk image is not bootable (no bootblock)" diff --git a/od-win32/win32.h b/od-win32/win32.h index ef083436..ffd260fb 100755 --- a/od-win32/win32.h +++ b/od-win32/win32.h @@ -22,7 +22,7 @@ extern int manual_palette_refresh_needed; extern int mouseactive, focus; extern int ignore_messages_all; #define WINUAEBETA 1 -#define WINUAEBETASTR " Beta 6" +#define WINUAEBETASTR " Beta 8" extern char start_path_exe[MAX_DPATH]; extern char start_path_data[MAX_DPATH]; diff --git a/od-win32/win32gfx.c b/od-win32/win32gfx.c index b7fa9334..84005cd1 100755 --- a/od-win32/win32gfx.c +++ b/od-win32/win32gfx.c @@ -1935,7 +1935,8 @@ static BOOL doInit (void) fs_warning = IDS_UNSUPPORTEDSCREENMODE_1; } else if (colortype == RGBFB_CLUT && !(currentmode->flags & DM_OVERLAY)) { fs_warning = IDS_UNSUPPORTEDSCREENMODE_2; - } else if (currentmode->current_width >= GetSystemMetrics(SM_CXVIRTUALSCREEN) || currentmode->current_height >= GetSystemMetrics(SM_CXVIRTUALSCREEN)) { + } else if (currentmode->current_width >= GetSystemMetrics(SM_CXVIRTUALSCREEN) || + currentmode->current_height >= GetSystemMetrics(SM_CYVIRTUALSCREEN)) { if (!console_logging) fs_warning = IDS_UNSUPPORTEDSCREENMODE_3; #ifdef PICASSO96 diff --git a/od-win32/win32gui.c b/od-win32/win32gui.c index 06743d76..9904126f 100755 --- a/od-win32/win32gui.c +++ b/od-win32/win32gui.c @@ -1572,6 +1572,12 @@ static int disk_swap (int entry, int mode) drvs[drv] = i; } if ((drv = disk_in_drive (entry)) >= 0) { + if (mode < 0) { + workprefs.df[drv][0] = 0; + disk_eject (drv); + return 1; + } + if (strcmp (workprefs.df[drv], currprefs.df[drv])) { strcpy (workprefs.df[drv], currprefs.df[drv]); disk_insert (drv, workprefs.df[drv]); @@ -2464,7 +2470,7 @@ static urlinfo urls[] = {IDC_AIABHOME, FALSE, "AIAB", "http://www.amigainabox.co.uk/"}, {IDC_THEROOTS, FALSE, "Back To The Roots", "http://www.back2roots.org/"}, {IDC_ABIME, FALSE, "abime.net", "http://www.abime.net/"}, - {IDC_CAPS, FALSE, "CAPS", "http://caps-project.org/"}, + {IDC_CAPS, FALSE, "SPS", "http://www.softpres.org/"}, {IDC_AMIGASYS, FALSE, "AmigaSYS", "http://amigasys.fw.hu/"}, { -1, FALSE, NULL, NULL } }; @@ -2607,19 +2613,22 @@ static INT_PTR CALLBACK PathsDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARAM numtypes = 0; SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_RESETCONTENT, 0, 0L); if (af_path_2005) { - SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_ADDSTRING, 0, (LPARAM)"AmigaForever 2005"); + WIN32GUI_LoadUIString(IDS_DEFAULT_AF2005, tmp, sizeof tmp); + SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_ADDSTRING, 0, (LPARAM)tmp); if (path_type == 2005) selpath = numtypes; ptypes[numtypes++] = 2005; } if (af_path_old) { - SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_ADDSTRING, 0, (LPARAM)"AmigaForever (old)"); + WIN32GUI_LoadUIString(IDS_DEFAULT_AF, tmp, sizeof tmp); + SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_ADDSTRING, 0, (LPARAM)tmp); if (path_type == 1) selpath = numtypes; ptypes[numtypes++] = 1; } - if (winuae_path) { - SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_ADDSTRING, 0, (LPARAM)"WinUAE default"); + if (winuae_path || numtypes == 0) { + WIN32GUI_LoadUIString(IDS_DEFAULT_WINUAE, tmp, sizeof tmp); + SendDlgItemMessage (hDlg, IDC_PATHS_DEFAULTTYPE, CB_ADDSTRING, 0, (LPARAM)tmp); if (path_type == 0) selpath = numtypes; ptypes[numtypes++] = 0; @@ -4701,6 +4710,7 @@ static void values_to_cpudlg (HWND hDlg) static void values_from_cpudlg (HWND hDlg) { int newcpu, newtrust, oldcache, jitena; + static int cachesize_prev; workprefs.cpu_compatible = workprefs.cpu_cycle_exact | (IsDlgButtonChecked (hDlg, IDC_COMPATIBLE) ? 1 : 0); workprefs.m68k_speed = IsDlgButtonChecked (hDlg, IDC_CS_HOST) ? -1 @@ -4750,10 +4760,14 @@ static void values_from_cpudlg (HWND hDlg) oldcache = workprefs.cachesize; jitena = IsDlgButtonChecked (hDlg, IDC_JITENABLE) ? 1 : 0; workprefs.cachesize = SendMessage(GetDlgItem(hDlg, IDC_CACHE), TBM_GETPOS, 0, 0) * 1024; - if (!jitena) + if (!jitena) { + cachesize_prev = workprefs.cachesize; workprefs.cachesize = 0; - else if (jitena && !oldcache) + } else if (jitena && !oldcache) { workprefs.cachesize = 8192; + if (cachesize_prev) + workprefs.cachesize = cachesize_prev; + } if (oldcache == 0 && workprefs.cachesize > 0) canbang = 1; #endif @@ -6491,7 +6505,7 @@ static INT_PTR CALLBACK SwapperDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPAR case WM_NOTIFY: if (((LPNMHDR) lParam)->idFrom == IDC_DISKLIST) { - int dblclick = 0, col; + int dblclick = 0, button = 0, col; HWND list; NM_LISTVIEW *nmlistview; nmlistview = (NM_LISTVIEW *) lParam; @@ -6501,19 +6515,39 @@ static INT_PTR CALLBACK SwapperDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPAR case LVN_BEGINDRAG: drag_start (hDlg, cachedlist, lParam); break; + case NM_RDBLCLK: case NM_DBLCLK: - dblclick = 1; - /* fall-through */ + dblclick = 1; + /* fall-through here too */ + case NM_RCLICK: + if (nmlistview->hdr.code == NM_RCLICK || nmlistview->hdr.code == NM_RDBLCLK) + button = 2; case NM_CLICK: entry = listview_entry_from_click (list, &col); if (entry >= 0) { if (col == 2) { - if (disk_swap (entry, 0)) - InitializeListView (hDlg); - swapperhili (hDlg, entry); + if (button) { + if (!dblclick) { + if (disk_swap (entry, -1)) + InitializeListView (hDlg); + swapperhili (hDlg, entry); + } + } else { + if (!dblclick) { + if (disk_swap (entry, 0)) + InitializeListView (hDlg); + swapperhili (hDlg, entry); + } + } } else if (col == 1) { - if (dblclick) - addswapperfile (hDlg, entry); + if (dblclick) { + if (!button) { + addswapperfile (hDlg, entry); + } else { + workprefs.dfxlist[entry][0] = 0; + InitializeListView (hDlg); + } + } } SetDlgItemText (hDlg, IDC_DISKTEXT, workprefs.dfxlist[entry]); } diff --git a/od-win32/winuae_msvc/winuae_msvc.vcproj b/od-win32/winuae_msvc/winuae_msvc.vcproj index 1d899f71..e835f726 100755 --- a/od-win32/winuae_msvc/winuae_msvc.vcproj +++ b/od-win32/winuae_msvc/winuae_msvc.vcproj @@ -5,7 +5,6 @@ Name="winuae" ProjectGUID="{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}" RootNamespace="winuae" - SignManifests="true" >