From 4bd3a0ccf1e695830cc41c194615ec4bd6392f05 Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Wed, 13 Dec 2023 21:28:29 +0200 Subject: [PATCH] Fix swapped FSINCOS destination registers --- disasm.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/disasm.cpp b/disasm.cpp index 59a71680..b8da7506 100644 --- a/disasm.cpp +++ b/disasm.cpp @@ -2339,11 +2339,15 @@ uae_u32 m68k_disasm_2(TCHAR *buf, int bufsize, uaecptr pc, uae_u16 *bufpc, int b _stprintf(p, _T(" %s%d"), disasm_fpreg, (extra >> 10) & 7); } p = instrname + _tcslen(instrname); - if ((extra & 0x4000) || (((extra >> 7) & 7) != ((extra >> 10) & 7))) - _stprintf(p, _T(",%s%d"), disasm_fpreg, (extra >> 7) & 7); if (ins >= 0x30 && ins < 0x38) { // FSINCOS p = instrname + _tcslen(instrname); _stprintf(p, _T(",%s%d"), disasm_fpreg, extra & 7); + p = instrname + _tcslen(instrname); + _stprintf(p, _T(",%s%d"), disasm_fpreg, (extra >> 7) & 7); + } else { + if ((extra & 0x4000) || (((extra >> 7) & 7) != ((extra >> 10) & 7))) { + _stprintf(p, _T(",%s%d"), disasm_fpreg, (extra >> 7) & 7); + } } } if (ins >= 0x40 && currprefs.fpu_model >= 68881 && fpuopcodes[ins]) { -- 2.47.3