From 4cb2a36d7cae12a008bad2bd74736a99cdd0186e Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Wed, 20 May 2020 21:56:25 +0300 Subject: [PATCH] CPU tester fixes, cycle counting was unreliable. --- cputest.cpp | 16 ++++------------ cputest/cputest_defines.h | 3 +++ cputest/main.c | 28 +++++++++++++--------------- 3 files changed, 20 insertions(+), 27 deletions(-) diff --git a/cputest.cpp b/cputest.cpp index b7a0b3b7..1d9261f4 100644 --- a/cputest.cpp +++ b/cputest.cpp @@ -216,9 +216,6 @@ static int is_superstack_use_required(void) return 0; } -#define OPCODE_AREA 32 -#define BRANCHTARGET_AREA 4 - static bool valid_address(uaecptr addr, int size, int rwp) { int w = rwp == 2; @@ -880,13 +877,6 @@ void MakeFromSR_x(int t0trace) SET_VFLG((regs.sr >> 1) & 1); SET_CFLG(regs.sr & 1); - if (regs.t1 == ((regs.sr >> 15) & 1) && - regs.t0 == ((regs.sr >> 14) & 1) && - regs.s == ((regs.sr >> 13) & 1) && - regs.m == ((regs.sr >> 12) & 1) && - regs.intmask == ((regs.sr >> 8) & 7)) - return; - regs.t1 = (regs.sr >> 15) & 1; regs.t0 = (regs.sr >> 14) & 1; regs.s = (regs.sr >> 13) & 1; @@ -1058,6 +1048,7 @@ static void doexcstack2(void) static void doexcstack(void) { bool g1 = generates_group1_exception(regs.ir); + uaecptr original_pc = regs.pc; doexcstack2(); if (test_exception < 4) @@ -1098,6 +1089,7 @@ static void doexcstack(void) regs.read_buffer = regs.irc; // vector offset (not vbr + offset) regs.write_buffer = original_exception * 4; + regs.pc = original_pc; } if (interrupt) { @@ -4510,8 +4502,8 @@ static void test_mnemo(const TCHAR *path, const TCHAR *mnemo, const TCHAR *ovrfi uae_u8 *bo = opcode_memory_ptr + 2; uae_u16 bopw1 = (bo[0] << 8) | (bo[1] << 0); uae_u16 bopw2 = (bo[2] << 8) | (bo[3] << 0); - if (opc == 0x0662 - && bopw1 == 0x3dec + if (opc == 0x4e96 + //&& bopw1 == 0x3dec //&& bopw2 == 0x2770 ) printf(""); diff --git a/cputest/cputest_defines.h b/cputest/cputest_defines.h index baaa1909..4c073f92 100644 --- a/cputest/cputest_defines.h +++ b/cputest/cputest_defines.h @@ -44,3 +44,6 @@ #define CT_EMPTY CT_END_INIT #define CT_OVERRIDE_REG (0x80 | 0x40 | 0x10) #define CT_BRANCHED 0x40 + +#define OPCODE_AREA 32 +#define BRANCHTARGET_AREA 4 diff --git a/cputest/main.c b/cputest/main.c index 8ef94604..35d93bf9 100644 --- a/cputest/main.c +++ b/cputest/main.c @@ -2273,12 +2273,8 @@ static uae_u8 *validate_test(uae_u8 *p, short ignore_errors, short ignore_sr, st } if (exc == 0 && cpuexc == 4) { // successful complete generates exception 4 with matching PC - if ((!branched && lregs->pc + opcodeendsizeextra != tregs->pc) || (branched && lregs->pc != tregs->pc)) { - if (lregs->pc == tregs->pc) { - branched2 = 1; - } else { - branched2 = 0; - } + if (lregs->pc + opcodeendsizeextra != tregs->pc) { + branched2 = lregs->pc < opcode_memory_addr || lregs->pc >= opcode_memory_addr + OPCODE_AREA; if (dooutput) { sprintf(outbp, "PC (%c): expected %08x but got %08x\n", branched ? 'B' : '-', lregs->pc, tregs->pc); outbp += strlen(outbp); @@ -2739,9 +2735,10 @@ static uae_u32 xorshift32(void) static void copyregs(struct registers *d, struct registers *s, short fpumode) { - memcpy(&d->regs[0], &s->regs[0], offsetof(struct registers, cycles)); if (fpumode) { - memcpy(&d->fpuregs[0], &s->fpuregs[0], offsetof(struct registers, fsave) - offsetof(struct registers, fpuregs)); + memcpy(&d->regs[0], &s->regs[0], offsetof(struct registers, fsave)); + } else { + memcpy(&d->regs[0], &s->regs[0], offsetof(struct registers, fpuregs)); } } @@ -2849,18 +2846,19 @@ static void process_test(uae_u8 *p) pw(opcode_memory_end, opcodeend >> 16); } - if (test_regs.branchtarget != 0xffffffff && !(test_regs.branchtarget & 1)) { - if (test_regs.branchtarget_mode == 1) { - uae_u32 bv = gl((uae_u8*)test_regs.branchtarget); + + if (cur_regs.branchtarget != 0xffffffff && !(cur_regs.branchtarget & 1)) { + if (cur_regs.branchtarget_mode == 1) { + uae_u32 bv = gl((uae_u8*)cur_regs.branchtarget); bv = (bv >> 16) | (bv << 16); - pl((uae_u8*)test_regs.branchtarget, bv); - } else if (test_regs.branchtarget_mode == 2) { - uae_u16 bv = gw((uae_u8 *)test_regs.branchtarget); + pl((uae_u8*)cur_regs.branchtarget, bv); + } else if (cur_regs.branchtarget_mode == 2) { + uae_u16 bv = gw((uae_u8 *)cur_regs.branchtarget); if (bv == 0x4e71) bv = 0x4afc; else bv = 0x4e71; - pw((uae_u8 *)test_regs.branchtarget, bv); + pw((uae_u8 *)cur_regs.branchtarget, bv); } } -- 2.47.3