From 55cb355a5b2484b3d580d3f0606c8f8c1b999c37 Mon Sep 17 00:00:00 2001 From: Klaus Treichel Date: Sat, 26 Jul 2008 15:13:18 +0000 Subject: [PATCH] Add rules for one immediate value for float32 and float64 branch and setcc opcodes. --- ChangeLog | 12 +++- jit/jit-rules-x86-64.c | 94 ++++++++++++++++++++++++++++-- jit/jit-rules-x86-64.ins | 120 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 219 insertions(+), 7 deletions(-) diff --git a/ChangeLog b/ChangeLog index 6f2ff13..f731667 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,6 +1,16 @@ +2008-07-26 Klaus Treichel + + * jit/jit-rules-x86-64.c (xmm_cmp_reg_imm, xmm_cmp_setcc_reg_imm, + xmm_cmp_brcc_reg_imm): Add functions to handle compares with an + immediate value. + + * jit/jit-rules-x86-64.ins: Add rules for an immediate value for + JIT_OP_FEQ, ..., JIT_OP_DEQ, ... and the float32 and float64 + conditional branch opcodes. + 2008-07-19 Klaus Treichel - * dpas/spas-parser.y (handle_boolean_binary): Add macro for binary + * dpas/dpas-parser.y (handle_boolean_binary): Add macro for binary operators returning a boolean value. (handle_compare_binary): Use handle_boolean_binary instead of handle_binary for non pointer compares. Set the result type to diff --git a/jit/jit-rules-x86-64.c b/jit/jit-rules-x86-64.c index b2191d2..487c2e2 100644 --- a/jit/jit-rules-x86-64.c +++ b/jit/jit-rules-x86-64.c @@ -288,8 +288,8 @@ _jit_setup_indirect_pointer(jit_function_t func, jit_value_t value) */ static int _jit_xmm1_reg_imm_size_float32(jit_gencode_t gen, unsigned char **inst_ptr, - X86_64_XMM1_OP opc, int reg, - jit_float32 *float32_value) + X86_64_XMM1_OP opc, int reg, + jit_float32 *float32_value) { void *ptr; jit_nint offset; @@ -319,7 +319,7 @@ _jit_xmm1_reg_imm_size_float32(jit_gencode_t gen, unsigned char **inst_ptr, else { /* We have to use an extra general register */ - /* TODO */ + TODO(); return 0; } *inst_ptr = inst; @@ -331,8 +331,8 @@ _jit_xmm1_reg_imm_size_float32(jit_gencode_t gen, unsigned char **inst_ptr, */ static int _jit_xmm1_reg_imm_size_float64(jit_gencode_t gen, unsigned char **inst_ptr, - X86_64_XMM1_OP opc, int reg, - jit_float64 *float64_value) + X86_64_XMM1_OP opc, int reg, + jit_float64 *float64_value) { void *ptr; jit_nint offset; @@ -362,7 +362,7 @@ _jit_xmm1_reg_imm_size_float64(jit_gencode_t gen, unsigned char **inst_ptr, else { /* We have to use an extra general register */ - /* TODO */ + TODO(); return 0; } *inst_ptr = inst; @@ -1334,6 +1334,70 @@ jump_to_epilog(jit_gencode_t gen, unsigned char *inst, jit_block_t block) return inst; } +/* + * Compare a xmm register with an immediate value. + */ +static unsigned char * +xmm_cmp_reg_imm(jit_gencode_t gen, unsigned char *inst, int xreg, void *imm, + int is_double) +{ + int inst_len = 7 + (is_double ? 1 : 0) + (xreg > 7 ? 1 : 0); + void *ptr; + jit_nint offset; + + if(is_double) + { + ptr = _jit_cache_alloc(&(gen->posn), sizeof(jit_float64)); + if(!ptr) + { + return 0; + } + jit_memcpy(ptr, imm, sizeof(jit_float64)); + } + else + { + ptr = _jit_cache_alloc(&(gen->posn), sizeof(jit_float32)); + if(!ptr) + { + return 0; + } + jit_memcpy(ptr, imm, sizeof(jit_float32)); + } + offset = (jit_nint)ptr - ((jit_nint)inst + inst_len); + if((offset >= jit_min_int) && (offset <= jit_max_int)) + { + /* We can use RIP relative addressing here */ + if(is_double) + { + x86_64_ucomisd_reg_membase(inst, xreg, X86_64_RIP, offset); + } + else + { + x86_64_ucomiss_reg_membase(inst, xreg, X86_64_RIP, offset); + } + } + else if(((jit_nint)ptr >= jit_min_int) && + ((jit_nint)ptr <= jit_max_int)) + { + /* We can use absolute addressing */ + if(is_double) + { + x86_64_ucomisd_reg_mem(inst, xreg, (jit_nint)ptr); + } + else + { + x86_64_ucomiss_reg_mem(inst, xreg, (jit_nint)ptr); + } + } + else + { + /* We have to use an extra general register */ + TODO(); + return 0; + } + return inst; +} + /* * Compare two scalar float or double values and set dreg depending on the * flags set. @@ -1377,6 +1441,15 @@ xmm_setcc(unsigned char *inst, int dreg, int cond, int sreg, int nan_result) return inst; } +static unsigned char * +xmm_cmp_setcc_reg_imm(jit_gencode_t gen, unsigned char *inst, int dreg, + int cond, int xreg, void *imm, int sreg, int is_double, + int nan_result) +{ + inst = xmm_cmp_reg_imm(gen, inst, xreg, imm, is_double); + return xmm_setcc(inst, dreg, cond, sreg, nan_result); +} + static unsigned char * xmm_cmp_setcc_reg_reg(unsigned char *inst, int dreg, int cond, int xreg1, int xreg2, int sreg, int is_double, int nan_result) @@ -1441,6 +1514,15 @@ xmm_brcc(jit_function_t func, unsigned char *inst, int cond, int nan_result, return inst; } +static unsigned char * +xmm_cmp_brcc_reg_imm(jit_gencode_t gen, jit_function_t func, + unsigned char *inst, int cond, int xreg, void *imm, + int is_double, int nan_result, jit_insn_t insn) +{ + inst = xmm_cmp_reg_imm(gen, inst, xreg, imm, is_double); + return xmm_brcc(func, inst, cond, nan_result, insn); +} + static unsigned char * xmm_cmp_brcc_reg_reg(jit_function_t func, unsigned char *inst, int cond, int xreg1, int xreg2, int is_double, int nan_result, diff --git a/jit/jit-rules-x86-64.ins b/jit/jit-rules-x86-64.ins index be459f2..6ab132e 100644 --- a/jit/jit-rules-x86-64.ins +++ b/jit/jit-rules-x86-64.ins @@ -2047,6 +2047,9 @@ JIT_OP_BR_LGE_UN: branch } JIT_OP_BR_FEQ, JIT_OP_BR_FEQ_INV: branch, commutative + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_Z, $1, (void *)$2, 0, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_Z, $1, X86_64_RBP, $2, 0, 0, insn); } @@ -2055,6 +2058,9 @@ JIT_OP_BR_FEQ, JIT_OP_BR_FEQ_INV: branch, commutative } JIT_OP_BR_FNE, JIT_OP_BR_FNE_INV: branch, commutative + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NZ, $1, (void *)$2, 0, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NZ, $1, X86_64_RBP, $2, 0, 1, insn); } @@ -2063,6 +2069,9 @@ JIT_OP_BR_FNE, JIT_OP_BR_FNE_INV: branch, commutative } JIT_OP_BR_FLT: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, $1, (void *)$2, 0, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, $1, X86_64_RBP, $2, 0, 0, insn); } @@ -2071,6 +2080,9 @@ JIT_OP_BR_FLT: branch } JIT_OP_BR_FLT_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, $1, (void *)$2, 0, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, $1, X86_64_RBP, $2, 0, 1, insn); } @@ -2079,6 +2091,9 @@ JIT_OP_BR_FLT_INV: branch } JIT_OP_BR_FLE: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, $1, (void *)$2, 0, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, $1, X86_64_RBP, $2, 0, 0, insn); } @@ -2087,6 +2102,9 @@ JIT_OP_BR_FLE: branch } JIT_OP_BR_FLE_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, $1, (void *)$2, 0, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, $1, X86_64_RBP, $2, 0, 1, insn); } @@ -2095,6 +2113,9 @@ JIT_OP_BR_FLE_INV: branch } JIT_OP_BR_FGT: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, $1, (void *)$2, 0, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, $1, X86_64_RBP, $2, 0, 0, insn); } @@ -2103,6 +2124,9 @@ JIT_OP_BR_FGT: branch } JIT_OP_BR_FGT_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, $1, (void *)$2, 0, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, $1, X86_64_RBP, $2, 0, 1, insn); } @@ -2111,6 +2135,9 @@ JIT_OP_BR_FGT_INV: branch } JIT_OP_BR_FGE: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, $1, (void *)$2, 0, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, $1, X86_64_RBP, $2, 0, 0, insn); } @@ -2119,6 +2146,9 @@ JIT_OP_BR_FGE: branch } JIT_OP_BR_FGE_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, $1, (void *)$2, 0, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, $1, X86_64_RBP, $2, 0, 1, insn); } @@ -2127,6 +2157,9 @@ JIT_OP_BR_FGE_INV: branch } JIT_OP_BR_DEQ, JIT_OP_BR_DEQ_INV: branch, commutative + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_Z, $1, (void *)$2, 1, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_Z, $1, X86_64_RBP, $2, 1, 0, insn); } @@ -2135,6 +2168,9 @@ JIT_OP_BR_DEQ, JIT_OP_BR_DEQ_INV: branch, commutative } JIT_OP_BR_DNE, JIT_OP_BR_DNE_INV: branch, commutative + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NZ, $1, (void *)$2, 1, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NZ, $1, X86_64_RBP, $2, 1, 1, insn); } @@ -2143,6 +2179,9 @@ JIT_OP_BR_DNE, JIT_OP_BR_DNE_INV: branch, commutative } JIT_OP_BR_DLT: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, $1, (void *)$2, 1, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, $1, X86_64_RBP, $2, 1, 0, insn); } @@ -2151,6 +2190,9 @@ JIT_OP_BR_DLT: branch } JIT_OP_BR_DLT_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_C, $1, (void *)$2, 1, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_C, $1, X86_64_RBP, $2, 1, 1, insn); } @@ -2159,6 +2201,9 @@ JIT_OP_BR_DLT_INV: branch } JIT_OP_BR_DLE: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, $1, (void *)$2, 1, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, $1, X86_64_RBP, $2, 1, 0, insn); } @@ -2167,6 +2212,9 @@ JIT_OP_BR_DLE: branch } JIT_OP_BR_DLE_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_BE, $1, (void *)$2, 1, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_BE, $1, X86_64_RBP, $2, 1, 1, insn); } @@ -2175,6 +2223,9 @@ JIT_OP_BR_DLE_INV: branch } JIT_OP_BR_DGT: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, $1, (void *)$2, 1, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, $1, X86_64_RBP, $2, 1, 0, insn); } @@ -2183,6 +2234,9 @@ JIT_OP_BR_DGT: branch } JIT_OP_BR_DGT_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NBE, $1, (void *)$2, 1, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NBE, $1, X86_64_RBP, $2, 1, 1, insn); } @@ -2191,6 +2245,9 @@ JIT_OP_BR_DGT_INV: branch } JIT_OP_BR_DGE: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, $1, (void *)$2, 1, 0, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, $1, X86_64_RBP, $2, 1, 0, insn); } @@ -2199,6 +2256,9 @@ JIT_OP_BR_DGE: branch } JIT_OP_BR_DGE_INV: branch + [xreg, imm] -> { + inst = xmm_cmp_brcc_reg_imm(gen, func, inst, X86_CC_NC, $1, (void *)$2, 1, 1, insn); + } [xreg, local] -> { inst = xmm_cmp_brcc_reg_membase(func, inst, X86_CC_NC, $1, X86_64_RBP, $2, 1, 1, insn); } @@ -2507,101 +2567,161 @@ JIT_OP_LGE_UN: } JIT_OP_FEQ, JIT_OP_FEQ_INV: commutative + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_Z, $2, (void *)$3, $4, 0, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_Z, $2, $3, $4, 0, 0); } JIT_OP_FNE, JIT_OP_FNE_INV: commutative + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NZ, $2, (void *)$3, $4, 0, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NZ, $2, $3, $4, 0, 1); } JIT_OP_FLT: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_C, $2, (void *)$3, $4, 0, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_C, $2, $3, $4, 0, 0); } JIT_OP_FLT_INV: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_C, $2, (void *)$3, $4, 0, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_C, $2, $3, $4, 0, 1); } JIT_OP_FLE: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_BE, $2, (void *)$3, $4, 0, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_BE, $2, $3, $4, 0, 0); } JIT_OP_FLE_INV: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_BE, $2, (void *)$3, $4, 0, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_BE, $2, $3, $4, 0, 1); } JIT_OP_FGT: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NBE, $2, (void *)$3, $4, 0, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NBE, $2, $3, $4, 0, 0); } JIT_OP_FGT_INV: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NBE, $2, (void *)$3, $4, 0, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NBE, $2, $3, $4, 0, 1); } JIT_OP_FGE: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NC, $2, (void *)$3, $4, 0, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NC, $2, $3, $4, 0, 0); } JIT_OP_FGE_INV: + [=+reg, xreg, imm, scratch reg, space("23")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NC, $2, (void *)$3, $4, 0, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NC, $2, $3, $4, 0, 1); } JIT_OP_DEQ, JIT_OP_DEQ_INV: commutative + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_Z, $2, (void *)$3, $4, 1, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_Z, $2, $3, $4, 1, 0); } JIT_OP_DNE, JIT_OP_DNE_INV: commutative + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NZ, $2, (void *)$3, $4, 1, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NZ, $2, $3, $4, 1, 1); } JIT_OP_DLT: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_C, $2, (void *)$3, $4, 1, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_C, $2, $3, $4, 1, 0); } JIT_OP_DLT_INV: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_C, $2, (void *)$3, $4, 1, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_C, $2, $3, $4, 1, 1); } JIT_OP_DLE: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_BE, $2, (void *)$3, $4, 1, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_BE, $2, $3, $4, 1, 0); } JIT_OP_DLE_INV: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_BE, $2, (void *)$3, $4, 1, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_BE, $2, $3, $4, 1, 1); } JIT_OP_DGT: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NBE, $2, (void *)$3, $4, 1, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NBE, $2, $3, $4, 1, 0); } JIT_OP_DGT_INV: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NBE, $2, (void *)$3, $4, 1, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NBE, $2, $3, $4, 1, 1); } JIT_OP_DGE: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NC, $2, (void *)$3, $4, 1, 0); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NC, $2, $3, $4, 1, 0); } JIT_OP_DGE_INV: + [=+reg, xreg, imm, scratch reg, space("24")] -> { + inst = xmm_cmp_setcc_reg_imm(gen, inst, $1, X86_CC_NC, $2, (void *)$3, $4, 1, 1); + } [=+reg, xreg, xreg, scratch reg, space("20")] -> { inst = xmm_cmp_setcc_reg_reg(inst, $1, X86_CC_NC, $2, $3, $4, 1, 1); } -- 2.47.3