From 67f81143d24fb8fc2986d6ad0936b9121040e1d7 Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Thu, 29 Nov 2018 21:47:18 +0200 Subject: [PATCH] 68030 MMU update part 2, real cause for problem was side-effect of unaligned VBR in NeXTstep 1.0a. --- cpummu30.cpp | 6 +++--- newcpu.cpp | 5 ++--- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/cpummu30.cpp b/cpummu30.cpp index 88375bf6..99393b97 100644 --- a/cpummu30.cpp +++ b/cpummu30.cpp @@ -1759,6 +1759,8 @@ void mmu030_page_fault(uaecptr addr, bool read, int flags, uae_u32 fc) regs.mmu_ssw |= read ? MMU030_SSW_RW : 0; regs.mmu_ssw |= flags; regs.mmu_ssw |= fc; + // store in wb3_data because stack frame creation may modify data buffer. + regs.wb3_data = mmu030_data_buffer_out; bBusErrorReadWrite = read; mm030_stageb_address = addr; @@ -2830,7 +2832,7 @@ void m68k_do_rte_mmu030 (uaecptr a7) } #endif -#if 0 +#if MMU030_DEBUG write_log(_T("%08x %08x %08x %08x %08x %d %d %d %08x %08x\n"), mmu030_state[1], mmu030_state[2], mmu030_disp_store[0], mmu030_disp_store[1], addr, read, size, fc, mmu030_data_buffer_out, mmu030_ad[idxsize].val); @@ -2860,8 +2862,6 @@ void m68k_do_rte_mmu030 (uaecptr a7) mmu030_ad[idxsize].done = true; } } else { - // NeXTstep 1.0a modifies DOB and it must be ignored. - mmu030_data_buffer_out = mmu030_ad[mmu030_idx].val; if (mmu030_state[1] & MMU030_STATEFLAG1_SUBACCESS0) { mmu030_unaligned_write_continue(addr, fc, mmu030_put_generic); } else { diff --git a/newcpu.cpp b/newcpu.cpp index eaf53d85..82246f94 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -3204,8 +3204,7 @@ static void Exception_build_stack_frame (uae_u32 oldpc, uae_u32 currpc, uae_u32 } #endif if (!(ssw & MMU030_SSW_RW)) { - // NeXTstep 1.0a modifies DOB so store value in storage too. - mmu030_ad[mmu030_idx].val = mmu030_data_buffer_out; + mmu030_ad[mmu030_idx].val = regs.wb3_data; } for (i = 0; i < mmu030_idx + 1; i++) { m68k_areg (regs, 7) -= 4; @@ -3266,7 +3265,7 @@ static void Exception_build_stack_frame (uae_u32 oldpc, uae_u32 currpc, uae_u32 x_put_long (m68k_areg (regs, 7), mmu030_disp_store[0]); m68k_areg (regs, 7) -= 4; // Data output buffer = value that was going to be written - x_put_long (m68k_areg (regs, 7), mmu030_data_buffer_out); + x_put_long (m68k_areg (regs, 7), regs.wb3_data); m68k_areg (regs, 7) -= 4; x_put_long (m68k_areg (regs, 7), (mmu030_opcode & 0xffff) | (regs.prefetch020[0] << 16)); // Internal register (opcode storage) m68k_areg (regs, 7) -= 4; -- 2.47.3