From 785e913e4747c40dff09c65083ab97c1279f1f4e Mon Sep 17 00:00:00 2001
From: Toni Wilen <twilen@winuae.net>
Date: Fri, 10 Feb 2017 20:12:57 +0200
Subject: [PATCH] FPU update and on the fly mode change support.

---
 fpp.cpp       | 37 ++++++++++++++++++++++++++++++++++---
 include/fpp.h |  1 +
 2 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/fpp.cpp b/fpp.cpp
index c4b5c39b..39f11077 100644
--- a/fpp.cpp
+++ b/fpp.cpp
@@ -109,6 +109,7 @@ FPP_AB fpp_move;
 
 #define DEBUG_FPP 0
 #define EXCEPTION_FPP 1
+#define ARITHMETIC_EXCEPTIONS 0
 
 STATIC_INLINE int isinrom (void)
 {
@@ -349,7 +350,12 @@ static uae_u32 fpsr_make_status(void)
 	exception = regs.fpsr & regs.fpcr & (FPSR_SNAN | FPSR_OPERR | FPSR_DZ);
 	if (currprefs.cpu_model >= 68040 && currprefs.fpu_model)
 		exception |= regs.fpsr & (FPSR_OVFL | FPSR_UNFL);
+
+#if ARITHMETIC_EXCEPTIONS
 	return exception;
+#else
+	return 0;
+#endif
 }
 
 static int fpsr_set_bsun(void)
@@ -360,8 +366,10 @@ static int fpsr_set_bsun(void)
     if (regs.fpcr & FPSR_BSUN) {
         // logging only so far
         write_log (_T("FPU exception: BSUN! (FPSR: %08x, FPCR: %04x)\n"), regs.fpsr, regs.fpcr);
-        return 0; // return 1, once BSUN exception works
-    }
+#if ARITHMETIC_EXCEPTIONS
+		return 1;
+#endif
+	}
     return 0;
 }
 
@@ -1154,7 +1162,9 @@ static bool fault_if_68040_integer_nonmaskable(uae_u16 opcode, uae_u16 extra, ua
 		fpsr_make_status();
 		if (regs.fpsr & (FPSR_SNAN | FPSR_OPERR)) {
 			fpsr_check_exception(FPSR_SNAN | FPSR_OPERR);
-			//return true; FIXME: enable this once exception works
+#if ARITHMETIC_EXCEPTIONS
+			return true;
+#endif
 		}
 	}
 	return false;
@@ -2725,6 +2735,27 @@ void fpuop_arithmetic (uae_u32 opcode, uae_u16 extra)
 	}
 }
 
+void fpu_modechange(void)
+{
+	uae_u32 temp_ext[8][3];
+
+	if (currprefs.fpu_softfloat == changed_prefs.fpu_softfloat)
+		return;
+	currprefs.fpu_softfloat = changed_prefs.fpu_softfloat;
+
+	for (int i = 0; i < 8; i++) {
+		fpp_from_exten_fmovem(&regs.fp[i], &temp_ext[i][0], &temp_ext[i][1], &temp_ext[i][2]);
+	}
+	if (currprefs.fpu_softfloat && !changed_prefs.fpu_softfloat) {
+		fp_init_native();
+	} else if (!currprefs.fpu_softfloat && changed_prefs.fpu_softfloat) {
+		fp_init_softfloat();
+	}
+	for (int i = 0; i < 8; i++) {
+		fpp_to_exten_fmovem(&regs.fp[i], temp_ext[i][0], temp_ext[i][1], temp_ext[i][2]);
+	}
+}
+
 void fpu_reset (void)
 {
 	if (currprefs.fpu_softfloat) {
diff --git a/include/fpp.h b/include/fpp.h
index b410c281..1a714ec9 100644
--- a/include/fpp.h
+++ b/include/fpp.h
@@ -2,6 +2,7 @@
 extern void fp_init_native(void);
 extern void fp_init_softfloat(void);
 extern void fpsr_set_exception(uae_u32 exception);
+extern void fpu_modechange(void);
 
 #define FPSR_BSUN       0x00008000
 #define FPSR_SNAN       0x00004000
-- 
2.47.3