From 8fc31cff50d83d23f6325e2bfded65ecc192095b Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Fri, 5 Apr 2024 20:31:29 +0300 Subject: [PATCH] 5300b3 --- idecontrollers.cpp | 121 +++++++++++++++++++++++++---------- od-win32/win32.h | 4 +- od-win32/winuaechangelog.txt | 25 +++++++- 3 files changed, 113 insertions(+), 37 deletions(-) diff --git a/idecontrollers.cpp b/idecontrollers.cpp index 3a58bd02..d82695a8 100644 --- a/idecontrollers.cpp +++ b/idecontrollers.cpp @@ -134,6 +134,7 @@ static struct ide_thread_state idecontroller_its; static struct ide_board *ide_boards[MAX_IDE_UNITS + 1]; +static int dev_hd_mode; static int dev_hd_io_base, dev_hd_io_total; static int dev_hd_io_size; static int dev_hd_data_base; @@ -1035,30 +1036,43 @@ static uae_u32 ide_read_byte2(struct ide_board *board, uaecptr addr) } else if (board->type == DEV_IDE) { - if (addr == 0x88) { - v = 0xff; - } else if (addr == 0x86 || addr == 0x90 || addr == 0x92 || addr == 0x94 || addr == 0x96) { - if (addr == 0x86) { - board->dma_ptr = 0x80; - board->dma_cnt = 1; - } - v = board->rom[board->dma_ptr * 2 + 0x8000]; - board->dma_ptr++; - if (board->dma_cnt == 1) { - uae_u8 v2 = board->rom[board->dma_ptr * 2 + 0x8000]; - board->dma_ptr++; - if (v != (v2 ^ 0xff)) { - write_log("error!\n"); - } - board->dma_cnt = 0; + if (dev_hd_mode == 1) { + + struct ide_hdf *ide = board->ide[0]; + int reg = (addr & 7); + if (reg == 2) { + v = ide->secbuf[board->dma_cnt & (ide->blocksize - 1)]; + board->dma_cnt++; } + } else { - int reg = get_dev_hd_reg(addr, board); - if (reg >= 0) { - v = get_ide_reg(board, reg); + + if (addr == 0x88) { + v = 0xff; + } else if (addr == 0x86 || addr == 0x90 || addr == 0x92 || addr == 0x94 || addr == 0x96) { + if (addr == 0x86) { + board->dma_ptr = 0x80; + board->dma_cnt = 1; + } + v = board->rom[board->dma_ptr * 2 + 0x8000]; + board->dma_ptr++; + if (board->dma_cnt == 1) { + uae_u8 v2 = board->rom[board->dma_ptr * 2 + 0x8000]; + board->dma_ptr++; + if (v != (v2 ^ 0xff)) { + write_log("error!\n"); + } + board->dma_cnt = 0; + } } else { - v = board->rom[addr]; + int reg = get_dev_hd_reg(addr, board); + if (reg >= 0) { + v = get_ide_reg(board, reg); + } else { + v = board->rom[addr]; + } } + } } @@ -1376,9 +1390,14 @@ static uae_u32 ide_read_word(struct ide_board *board, uaecptr addr) } else if (board->type == DEV_IDE) { - int reg = get_dev_hd_reg(addr, board); - if (reg == IDE_DATA) { - v = get_ide_reg(board, reg); + if (dev_hd_mode == 1) { + + } else { + + int reg = get_dev_hd_reg(addr, board); + if (reg == IDE_DATA) { + v = get_ide_reg(board, reg); + } } } @@ -1736,18 +1755,53 @@ static void ide_write_byte(struct ide_board *board, uaecptr addr, uae_u8 v) } else if (board->type == DEV_IDE) { - if (addr == 0x86) { - board->dma_ptr = 0; - board->dma_cnt = 0; - } else if (addr == 0x90 || addr == 0x92 || addr == 0x94 || addr == 0x96) { - board->dma_ptr <<= 8; - board->dma_ptr |= v; - board->dma_ptr &= 0xffffff; + if (dev_hd_mode == 1) { + + struct ide_hdf *ide = board->ide[0]; + int reg = (addr & 7); + if (reg == 0 || reg == 4) { + board->dma_cnt = 0; + } else if (reg == 1) { + board->dma_ptr >>= 8; + board->dma_ptr |= v << 24; + board->dma_cnt++; + if (board->dma_cnt == 4) { + uae_u32 error = 0; + hdf_read(&ide->hdhfd.hfd, ide->secbuf, board->dma_ptr * ide->blocksize, ide->blocksize, &error); + board->dma_cnt = 0; + } + } else if (reg == 4 + 1) { + board->dma_ptr >>= 8; + board->dma_ptr |= v << 24; + board->dma_cnt++; + if (board->dma_cnt == 4) { + board->dma_cnt = 0; + } + } else if (reg == 4 + 2) { + ide->secbuf[board->dma_cnt & (ide->blocksize - 1)] = v; + board->dma_cnt++; + if (board->dma_cnt == ide->blocksize) { + uae_u32 error = 0; + hdf_write(&ide->hdhfd.hfd, ide->secbuf, board->dma_ptr *ide->blocksize, ide->blocksize, &error); + } + } + } else { - int reg = get_dev_hd_reg(addr, board); - if (reg >= 0) { - put_ide_reg(board, reg, v); + + if (addr == 0x86) { + board->dma_ptr = 0; + board->dma_cnt = 0; + } else if (addr == 0x90 || addr == 0x92 || addr == 0x94 || addr == 0x96) { + board->dma_ptr <<= 8; + board->dma_ptr |= v; + board->dma_ptr &= 0xffffff; + } else { + int reg = get_dev_hd_reg(addr, board); + if (reg >= 0) { + put_ide_reg(board, reg, v); + } } + } } @@ -3118,6 +3172,7 @@ bool dev_hd_init(struct autoconfig_info *aci) aci->start = 0xe90000; aci->size = 0x10000; } + dev_hd_mode = 1; dev_hd_io_base = 0x4000; dev_hd_io_size = 4; dev_hd_data_base = 0x4800; diff --git a/od-win32/win32.h b/od-win32/win32.h index 16778eaf..51d3aa59 100644 --- a/od-win32/win32.h +++ b/od-win32/win32.h @@ -20,12 +20,12 @@ #define LANG_DLL_FULL_VERSION_MATCH 0 #if WINUAEPUBLICBETA -#define WINUAEBETA _T("2") +#define WINUAEBETA _T("3") #else #define WINUAEBETA _T("") #endif -#define WINUAEDATE MAKEBD(2024, 3, 27) +#define WINUAEDATE MAKEBD(2024, 4, 5) //#define WINUAEEXTRA _T("AmiKit Preview") //#define WINUAEEXTRA _T("Amiga Forever Edition") diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt index 3850da23..e913c9e6 100644 --- a/od-win32/winuaechangelog.txt +++ b/od-win32/winuaechangelog.txt @@ -1,11 +1,32 @@ +Beta 3: + +- Merlin RTG board blitter fixed. 86box ET4000 blitter/MMU was incomplete (No linear blitter/MMU apertures, missing blit start mode check, pattern/source alignment restrictions are ET4000w32p only). Added vblank interrupt and monitor switcher support. Fixed horizontal panning in 24-bit modes. Overlay/PIP not yet implemented. It is quite useless because overlay and main bitmap depth must match. +- Added oMniBus RTG board (Zorro II to ISA adapter). ET4000AX (no blitter, no HW cursor) or ET4000W32 (blitter and HW cursor. Note: Current Picasso96 drivers have a bug that makes ET4000W32 blitter unusable, bug that apparently has always been in this driver. Fix will be in next Picasso96 release.) +- Added Graffity Z2/Z3 RTG board. Cirrus Logic GD5428 based. Has monitor switcher. +- Added Rainbow II "RTG" card. Not really proper RTG card, has only hardwired PAL and NTSC resolutions (768x576 and 768x476). 24-bit depth only. Note that emulation always refreshes whole screen every frame (not just modified parts but whole screen) which is not very optimal but it really isn't worth the trouble because I am sure now one cares about this old board. +- Some hardware emulated RTG boards had flickering colors during horizontal panning (>8 bit modes only) + +- Small PCI emulation changes (For example G-REX + Permedia 2 + some other PCI card: same card appeared 8 times) +- Added Apollo 630 emulation and boot ROM 5.61. Nothing special, ROM is only used to detect the RAM: "32Bit Power-Burstmode-FastRAM", apparently cool sounding name can make RAM even faster! (oddly ROM contains at least parts of IDE and SCSI drivers from other Apollo accelerators). + +- In a rare situation it was possible to get false positive "CPU Trace" error when loading statefile. +- Debugger breakpoint "f 123 " didn't work, "" was incorrectly detected as PC end address even when it wasn't a number. +- Programmed mode with only VARVBEN enabled (Programmed vblank but hardwired syncs) didn't check if programmed VB ended earlier than hardwired PAL/NTSC vblank, resulting in vblank ending too late, hiding part of display at the top. (ross test(tm)) +- If strobe conflicts start after STREQU strobes but before first STRHOR strobes: Denise vblank state stays stuck active until next valid STRHOR strobe is seen by Denise. (SOS / Triangle + ECS Agnus). Interesting detail: If OCS Denise, STRVBL strobe DOES NOT enable vblank (fixed in ECS Denise). Only STREQU strobes enable vblank. STRHOR disables vblank. +- OCS Denise "buggy" vblank start/end (visible only in Overscan+ and higher) start/end position was 2.5 CCKs too early. +- Left and right A1000 Denise/OCS Denise/ECS Denise hardwired hblank position slight adjustments (1 hires pixel) to match new test results. +- Both "SaveImage" (automatically created ext adf when write-enabling non-writable image like ipf) file extension variants are now detected automatically when checking if file exists. Paths panel option now only affects name when new saveimage is created. + +All Picasso96 supported RTG boards are now emulated. All CGX4 supported boards except Inferno. Inferno can't work, only known Wildfire boot ROM fails to configure it properly. PCI config logic seems to get confused if PCI BAR size is too large (GD5446 is 16M or 32M depending on revision). It seems Inferno support needs newer boot ROM which may not have been officially released. Apparently Inferno was also never officially released. EGS not tested, reports accepted if someone really wants to check EGS drivers. + Beta 2: - Release raw input devices when GUI is open (except during input Test/Remap) or when debugger window is active. Allows Windows shortcut keys like Win+E now work without need to unfocus the window. - Added Misc panel option to disable default on screen keyboard gamepad button 4 mapping. - Added Domino RTG board emulation. (ET4000, basic SVGA chip, no HW cursor, no blitter. Has linear frame buffer support. Emulator code from 86box.) -- Added Merlin Z2 and Z3 RTG board emulation. (ET4000/W32, ET4000+ HW cursor and blitter. Emulator code from 86box.). Blitter does is yet hooked up properly. (If you try it, make sure NOBLITTER=YES) +- Added Merlin Z2 and Z3 RTG board emulation. (ET4000/W32, ET4000+ HW cursor and blitter. Emulator code from 86box.). Blitter is not yet hooked up properly. (If you try it, make sure NOBLITTER=YES) - uae-configuration AKS_ events (on/off/toggle type only) now work again as designed. ("AKS_xxx -1" = toggle, "AKS_xxx 0" always off, "AKS_xxx 1" always on) - Some uae-configuration (and other similar) debugging logging messages automatically opened the console window. Now only entering debugger will open it. @@ -33,7 +54,7 @@ Beta 1: - EGS 110/24 RTG board emulation (INMOS G364 chip. Same as G360 functionally). Goes to GVP accelerator local slot, it is not autoconfig device. Can be configured without GVP accelerator card but at least Picasso96 driver needs to find GVP autoconfig device before detecting EGS. - If PCI device was non-UAE built-in (It was PCem SVGA card) and PCI was configured by single write to PCI BAR (Base Address Register), without first doing PCI bar size/alignment detection, device ignored all BAR writes. Fixes pre-44.71 CSMK3/PPC/BPPC boot ROM CyberVision/BlizzardVision PPC PCI configuration (Pre-44.71 support CV/BV PPC but not G-REX PCI). This was not a problem with PCI bridgeboards because bridgeboard drivers always first autodetect each PCI device's BAR size and required alignment. - Added Prometheus FireStorm PCI bridge emulation (Prometheus with different autoconfig ID, different PCI space mapping, few config bits and some fixes that don't affect emulation). Prmscan works and detects and configures boards, no other tests done. Please report if it works or not. -- When PCI bridge interrupts were enabled, possible alreadying pending interrupts were not checked immediately. (Probably makes no difference) +- When PCI bridge interrupts were enabled, possible already pending interrupts were not checked immediately. (Probably makes no difference) - Delay ALG LDP seek complete status reply slightly. Fixes Platoon (Nova) few second hangs. - Added partial Sony LDP-1450 OSD font emulation. Platoon (Nova) "YOU'RE HIT!!" messages are now visible.. (Yes, game uses LDP-1450 internal font generator to show this message. Amiga does not generate it.). If you want some other font than selected OSD font: config file genlock_font= can be used to override it. - Lightpen/gun cursor in any edge of screen: lightpen/gun not pointing at the screen (position can't be read by the program) -- 2.47.3