From 937e692eb3e3282dcc6a75e70b2852dc4d62bfd9 Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Sun, 25 Mar 2018 13:00:59 +0300 Subject: [PATCH] Hardital TQM, MacroSystem Falcon 040, GVP A1230 Turbo+ Series II --- a2091.cpp | 92 +++++++++++++++++++++++++++++++++++----------- cpuboard.cpp | 92 ++++++++++++++++++++++++++++++++++++++++++---- expansion.cpp | 61 ++++++++++++++++++++++++++++-- include/a2091.h | 4 +- include/cpuboard.h | 11 ++++-- include/rommgr.h | 3 ++ rommgr.cpp | 14 ++++--- 7 files changed, 235 insertions(+), 42 deletions(-) diff --git a/a2091.cpp b/a2091.cpp index 6c8cba72..2938fa69 100644 --- a/a2091.cpp +++ b/a2091.cpp @@ -83,7 +83,8 @@ /* GVP models */ #define GVP_GFORCE_040 0x20 #define GVP_GFORCE_040_SCSI 0x30 -#define GVP_A1291_SCSI 0x40 +#define GVP_A1291 0x46 +#define GVP_A1291_SCSI 0x47 #define GVP_GFORCE_030 0xa0 #define GVP_GFORCE_030_SCSI 0xb0 #define GVP_COMBO_R4 0x60 @@ -178,6 +179,7 @@ /* service required interrupts */ #define CSR_RESEL 0x80 #define CSR_RESEL_AM 0x81 +#define CSR_ATN_ASSERT 0x84 #define CSR_DISC 0x85 #define CSR_SRV_REQ 0x88 /* SCSI Bus Phases */ @@ -277,6 +279,7 @@ static struct wd_state *wd_gvps2accel; static struct wd_state *wd_comspec[MAX_DUPLICATE_EXPANSION_BOARDS]; struct wd_state *wd_cdtv; static bool configured; +static uae_u8 gvp_accelerator_bank; static struct wd_state *scsi_units[MAX_SCSI_UNITS + 1]; @@ -836,11 +839,19 @@ static bool do_dma_gvp_s1(struct wd_state *wd, struct scsi_data *scsi) return false; } +static uae_u32 get_gvp_s2_addr(struct gvp_dmac *g) +{ + uae_u32 v = g->addr & g->addr_mask; + if (g->bank_ptr) { + v |= g->bank_ptr[0] << 24; + } + return v; +} static bool do_dma_gvp_s2(struct wd_state *wd, struct scsi_data *scsi) { #if WD33C93_DEBUG > 0 - uae_u32 dmaptr = wd->gdmac.addr; + uae_u32 dmaptr = get_gvp_s2_addr(&wd->gdmac); #endif if (!is_dma_enabled(wd)) return false; @@ -853,10 +864,11 @@ static bool do_dma_gvp_s2(struct wd_state *wd, struct scsi_data *scsi) for (;;) { uae_u8 v; int status = scsi_receive_data(scsi, &v, true); - put_byte(wd->gdmac.addr, v); + put_byte(get_gvp_s2_addr(&wd->gdmac), v); if (wd->wc.wd_dataoffset < sizeof wd->wc.wd_data) wd->wc.wd_data[wd->wc.wd_dataoffset++] = v; wd->gdmac.addr++; + wd->gdmac.addr &= wd->gdmac.addr_mask; if (decreasetc (&wd->wc)) break; if (status) @@ -873,11 +885,12 @@ static bool do_dma_gvp_s2(struct wd_state *wd, struct scsi_data *scsi) } for (;;) { int status; - uae_u8 v = get_byte(wd->gdmac.addr); + uae_u8 v = get_byte(get_gvp_s2_addr(&wd->gdmac)); if (wd->wc.wd_dataoffset < sizeof wd->wc.wd_data) wd->wc.wd_data[wd->wc.wd_dataoffset++] = v; status = scsi_send_data (scsi, v); wd->gdmac.addr++; + wd->gdmac.addr &= wd->gdmac.addr_mask; if (decreasetc (&wd->wc)) break; if (status) @@ -989,7 +1002,7 @@ static bool wd_do_transfer_out (struct wd_chip_state *wd, struct wd_state *wds, return true; } set_status (wd, wd->wd_phase, scsi->direction <= 0 ? 0 : 1); - wd->wd_busy = 0; + wd->wd_busy = false; return true; } @@ -1362,12 +1375,12 @@ static void wd_cmd_sel (struct wd_chip_state *wd, struct wd_state *wds, bool atn } } -static void wd_cmd_reset (struct wd_chip_state *wd, bool irq) +static void wd_cmd_reset (struct wd_chip_state *wd, bool irq, bool fast) { #if WD33C93_DEBUG > 0 write_log (_T("%s reset %d\n"), WD33C93, irq); #endif - for (int i = 1; i < 0x16; i++) + for (int i = 1; i <= 0x16; i++) wd->wdregs[i] = 0; wd->wdregs[0x18] = 0; wd->sasr = 0; @@ -1379,9 +1392,19 @@ static void wd_cmd_reset (struct wd_chip_state *wd, bool irq) wd->queue_index = 0; wd->auxstatus = 0; wd->wd_data_avail = 0; + wd->resetnodelay_active = false; if (irq) { uae_u8 status = (wd->wdregs[0] & 0x08) ? 1 : 0; - set_status (wd, status, 50); + if (fast) { + wd->wdregs[WD_SCSI_STATUS] = status; + wd->auxstatus |= ASR_INT; + set_status(wd, status); + wd->wd_busy = false; + wd->resetnodelay_active = true; + rethink_a2091(); + } else { + set_status(wd, status, 50); + } } else { wd->wd_busy = false; } @@ -1390,12 +1413,14 @@ static void wd_cmd_reset (struct wd_chip_state *wd, bool irq) static void wd_master_reset(struct wd_state *wd, bool irq) { memset(wd->wc.wdregs, 0, sizeof wd->wc.wdregs); - wd_cmd_reset(&wd->wc, false); + wd_cmd_reset(&wd->wc, false, false); if (irq) { // this needs to be fast but must not call INTREQ() directly. wd->wc.wdregs[WD_SCSI_STATUS] = 0; wd->wc.auxstatus |= ASR_INT; set_status(&wd->wc, 0); + wd->wc.resetnodelay_active = true; + rethink_a2091(); } } @@ -1422,7 +1447,7 @@ static void wd_check_interrupt(struct wd_state *wds, bool checkonly) if (wd->status[0].irq == 1) { wd->status[0].irq = 0; doscsistatus(wds, wd->status[0].status); - wd->wd_busy = 0; + wd->wd_busy = false; if (wd->queue_index == 2) { wd->status[0].irq = 1; memcpy(&wd->status[0], &wd->status[1], sizeof status_data); @@ -1591,7 +1616,7 @@ void wdscsi_put (struct wd_chip_state *wd, struct wd_state *wds, uae_u8 d) wd->wd_busy = true; if (wd->resetnodelay && d == WD_CMD_RESET) { // stupid cpu loops that fail if CPU is too fast.. - wd_master_reset(wds, true); + wd_cmd_reset(wd, true, true); } else { wd_execute(wds, wds->scsis[wd->wdregs[WD_DESTINATION_ID] & 7], 0, d); } @@ -1647,7 +1672,13 @@ uae_u8 wdscsi_get (struct wd_chip_state *wd, struct wd_state *wds) } set_pio_data_irq(wd, wds); } else if (wd->sasr == WD_SCSI_STATUS) { - wd->auxstatus &= ~0x80; + if (wd->auxstatus & ASR_INT) { + wd->auxstatus &= ~ASR_INT; + if (wd->resetnodelay_active) { + wd->queue_index = 0; + } + wd->resetnodelay_active = false; + } if (wds->cdtv) cdtv_scsi_clear_int (); wds->cdmac.dmac_istr &= ~ISTR_INTS; @@ -3282,6 +3313,11 @@ static void dmac_gvp_write_byte(struct wd_state *wd, uaecptr addr, uae_u32 b) } +void gvp_accelerator_set_dma_bank(uae_u8 v) +{ + gvp_accelerator_bank = v; +} + static void dmac_gvp_write_word(struct wd_state *wd, uaecptr addr, uae_u32 b) { addr &= wd->board_mask; @@ -3316,8 +3352,8 @@ static void dmac_gvp_write_word(struct wd_state *wd, uaecptr addr, uae_u32 b) wd->gdmac.cntr = b; break; case 0x68: // bank - if (b != 0) - write_log(_T("bank %02x\n"), b); + wd->gdmac.bank_ptr = &wd->gdmac.bank; + wd->gdmac.bank = b >> 6; break; case 0x70: // ACR wd->gdmac.addr &= 0x0000ffff; @@ -3338,7 +3374,9 @@ static void dmac_gvp_write_word(struct wd_state *wd, uaecptr addr, uae_u32 b) case 0x74: // "secret1" case 0x7a: // "secret2" case 0x7c: // "secret3" +#if GVP_S2_DEBUG_IO > 0 write_log(_T("gvp_s2_wput_config %04X=%04X PC=%08X\n"), addr, b & 65535, M68K_GETPC); +#endif break; default: write_log(_T("gvp_s2_wput_unk %04X=%04X PC=%08X\n"), addr, b & 65535, M68K_GETPC); @@ -3774,11 +3812,15 @@ static void wd_execute_cmd(struct wd_state *wds, int cmd, int msg, int unit) switch (cmd & 0x7f) { case WD_CMD_RESET: - wd_cmd_reset(wd, true); + wd_cmd_reset(wd, true, false); break; case WD_CMD_ABORT: wd_cmd_abort (wd); break; + case WD_CMD_ASSERT_ATN: + // gvpscsi v5 + wd->wdregs[WD_COMMAND_PHASE] = 0x10; + break; case WD_CMD_SEL: wd_cmd_sel (wd, wds, false); break; @@ -3879,7 +3921,7 @@ bool a3000scsi_init(struct autoconfig_info *aci) wd->baseaddress = 0xdd0000; wd->dmac_type = COMMODORE_SDMAC; map_banks(&mbdmac_a3000_bank, wd->baseaddress >> 16, 1, 0); - wd_cmd_reset (&wd->wc, false); + wd_cmd_reset (&wd->wc, false, false); reset_dmac(wd); return true; } @@ -3969,7 +4011,7 @@ static void a2091_reset_device(struct wd_state *wd) wd->cdmac.old_dmac = 0; if (currprefs.scsi == 2) scsi_addnative(wd->scsis); - wd_cmd_reset (&wd->wc, false); + wd_cmd_reset (&wd->wc, false, false); reset_dmac(wd); xt_reset(wd); } @@ -3983,7 +4025,7 @@ static void a2090_reset_device(struct wd_state *wd) wd->wc.wd33c93_ver = 1; wd->dmac_type = COMMODORE_8727; wd->cdmac.old_dmac = 0; - wd_cmd_reset (&wd->wc, false); + wd_cmd_reset (&wd->wc, false, false); reset_dmac(wd); } @@ -4199,7 +4241,7 @@ static void gvp_reset_device(struct wd_state *wd) wd->dmac_type = wd->gdmac.series2 ? GVP_DMAC_S2 : GVP_DMAC_S1; if (currprefs.scsi == 2) scsi_addnative(wd->scsis); - wd_cmd_reset (&wd->wc, false); + wd_cmd_reset (&wd->wc, false, false); reset_dmac(wd); } @@ -4225,6 +4267,7 @@ static bool is_gvp_accelerator(void) static bool gvp_init(struct autoconfig_info *aci, bool series2, bool accel) { int romtype; + bool autoboot_disabled = false; const uae_u8 *ac = gvp_scsi_ii_autoconfig; if (!series2) { ac = gvp_scsi_i_autoconfig_1; @@ -4234,12 +4277,15 @@ static bool gvp_init(struct autoconfig_info *aci, bool series2, bool accel) ac = gvp_scsi_i_autoconfig_3; } } + autoboot_disabled = aci->rc->autoboot_disabled; if (!accel) { romtype = series2 ? ROMTYPE_GVPS2 : ROMTYPE_GVPS1; aci->label = series2 ? _T("GVP SCSI S2") : _T("GVP SCSI S1"); } else { romtype = ROMTYPE_CPUBOARD; aci->label = _T("GVP Acclerator SCSI"); + gvp_accelerator_bank = 0; + autoboot_disabled = currprefs.cpuboard_settings & 1; } if (!aci->doinit) { @@ -4287,7 +4333,7 @@ static bool gvp_init(struct autoconfig_info *aci, bool series2, bool accel) } xfree(wd->gdmac.buffer); wd->gdmac.buffer = xcalloc(uae_u8, 16384); - if (!aci->rc->autoboot_disabled) { + if (!autoboot_disabled) { struct zfile *z = read_device_from_romconfig(aci->rc, ROMTYPE_GVPS2); if (z) { int size = zfile_size(z); @@ -4347,10 +4393,12 @@ static bool gvp_init(struct autoconfig_info *aci, bool series2, bool accel) wd->gdmac.addr_mask = 0x00ffffff; if (ISCPUBOARD(BOARD_GVP, BOARD_GVP_SUB_A530)) { wd->gdmac.version = isscsi ? GVP_A530_SCSI : GVP_A530; - wd->gdmac.addr_mask = 0x01ffffff; } else if (ISCPUBOARD(BOARD_GVP, BOARD_GVP_SUB_GFORCE030)) { wd->gdmac.version = isscsi ? GVP_GFORCE_030_SCSI : GVP_GFORCE_030; - wd->gdmac.addr_mask = 0x01ffffff; + } else if (ISCPUBOARD(BOARD_GVP, BOARD_GVP_SUB_A1230SII)) { + wd->gdmac.version = (currprefs.cpuboard_settings & 2) ? GVP_A1291 : GVP_A1291_SCSI; + wd->wc.resetnodelay = true; + wd->gdmac.bank_ptr = &gvp_accelerator_bank; } } else { wd->gdmac.version = 0x00; diff --git a/cpuboard.cpp b/cpuboard.cpp index a54fe433..69bf8734 100644 --- a/cpuboard.cpp +++ b/cpuboard.cpp @@ -327,12 +327,25 @@ static bool is_sx32pro(struct uae_prefs *p) } static bool is_ivsvector(struct uae_prefs *p) { - return ISCPUBOARDP(p, BOARD_IVS, BOARD_IVS_VECTOR); + return ISCPUBOARDP(p, BOARD_IVS, BOARD_IVS_SUB_VECTOR); } static bool is_magnum40(struct uae_prefs *p) { - return ISCPUBOARDP(p, BOARD_CSA, BOARD_CSA_MAGNUM40); + return ISCPUBOARDP(p, BOARD_CSA, BOARD_CSA_SUB_MAGNUM40); } +static bool is_falcon40(struct uae_prefs *p) +{ + return ISCPUBOARDP(p, BOARD_MACROSYSTEM, BOARD_MACROSYSTEM_SUB_FALCON040); +} +static bool is_tqm(struct uae_prefs *p) +{ + return ISCPUBOARDP(p, BOARD_HARDITAL, BOARD_HARDITAL_SUB_TQM); +} +static bool is_a1230s2(struct uae_prefs *p) +{ + return ISCPUBOARDP(p, BOARD_GVP, BOARD_GVP_SUB_A1230SII); +} + static bool is_aca500(struct uae_prefs *p) { return false; //return ISCPUBOARDP(p, BOARD_IC, BOARD_IC_ACA500); @@ -1467,11 +1480,15 @@ static void REGPARAM2 blizzardio_wput(uaecptr addr, uae_u32 v) write_log(_T("CSMK2/2060: fallback CPU!\n")); cpu_fallback(0); } + } else if (is_a1230s2(&currprefs)) { + extern void gvp_accelerator_set_dma_bank(uae_u8); + io_reg[0] = v & 0xff; + gvp_accelerator_set_dma_bank((v >> 4) & 3); } } static void REGPARAM2 blizzardio_lput(uaecptr addr, uae_u32 v) { - write_log(_T("CS IO LPUT %08x %08x\n"), addr, v); + write_log(_T("CPU IO LPUT %08x %08x\n"), addr, v); if (is_csmk1(&currprefs)) { if (addr == 0x80f80000) { maprom_state = 1; @@ -1626,6 +1643,14 @@ void cpuboard_map(void) map_banks(&cpuboardmem2_bank, cpuboardmem2_bank.start >> 16, cpuboardmem2_bank.allocated_size >> 16, 0); } } + + if (is_falcon40(&currprefs)) { + map_banks(&blizzardram_bank, blizzardram_bank.start >> 16, cpuboard_size >> 16, 0); + } + + if (is_a1230s2(&currprefs)) { + map_banks(&blizzardio_bank, 0x03000000 >> 16, 1, 0); + } } void cpuboard_reset(void) @@ -1800,6 +1825,25 @@ static void cpuboard_init_2(void) blizzardram_bank.label = _T("dkb"); mapped_malloc(&blizzardram_bank); + } else if (is_tqm(&currprefs)) { + + blizzardea_bank.reserved_size = 65536; + blizzardea_bank.mask = blizzardea_bank.reserved_size - 1; + mapped_malloc(&blizzardea_bank); + + } else if (is_falcon40(&currprefs)) { + + blizzardea_bank.reserved_size = 262144; + blizzardea_bank.mask = blizzardea_bank.reserved_size - 1; + mapped_malloc(&blizzardea_bank); + + blizzardram_bank.start = 0x10000000; + blizzardram_bank.reserved_size = cpuboard_size; + blizzardram_bank.mask = blizzardram_bank.reserved_size - 1; + blizzardram_bank.startmask = 0x10000000; + blizzardram_bank.label = _T("tqm"); + mapped_malloc(&blizzardram_bank); + } else if (is_dkb_wildfire(&currprefs)) { blizzardf0_bank.start = 0x00f00000; @@ -1816,7 +1860,6 @@ static void cpuboard_init_2(void) cpuboard_custom_memory(0x03000000, 32, false, true); - } else if (is_fusionforty(&currprefs)) { blizzardf0_bank.start = 0x00f40000; @@ -2299,7 +2342,7 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) case BOARD_IVS: switch (p->cpuboard_subtype) { - case BOARD_IVS_VECTOR: + case BOARD_IVS_SUB_VECTOR: aci->addrbank = &expamem_null; return true; } @@ -2338,13 +2381,16 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) case BOARD_MACROSYSTEM_SUB_WARPENGINE_A4000: aci->addrbank = &expamem_null; return true; + case BOARD_MACROSYSTEM_SUB_FALCON040: + romtype = ROMTYPE_CB_FALCON40; + break; } break; case BOARD_PPS: switch(p->cpuboard_subtype) { - case BOARD_PPS_ZEUS040: + case BOARD_PPS_SUB_ZEUS040: aci->addrbank = &expamem_null; return true; } @@ -2353,7 +2399,7 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) case BOARD_CSA: switch(p->cpuboard_subtype) { - case BOARD_CSA_MAGNUM40: + case BOARD_CSA_SUB_MAGNUM40: aci->addrbank = &expamem_null; return true; } @@ -2384,6 +2430,7 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) switch(p->cpuboard_subtype) { case BOARD_GVP_SUB_A530: + case BOARD_GVP_SUB_A1230SII: case BOARD_GVP_SUB_GFORCE030: aci->addrbank = &expamem_null; return true; @@ -2457,6 +2504,15 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) romtype = ROMTYPE_CB_SX32PRO; break; + case BOARD_HARDITAL: + switch (p->cpuboard_subtype) + { + case BOARD_HARDITAL_SUB_TQM: + romtype = ROMTYPE_CB_TQM; + break; + } + break; + default: return false; } @@ -2522,7 +2578,7 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) uae_u8 *blizzardea_tmp = blizzardea_bank.baseaddr; uae_u8 *blizzardf0_tmp = blizzardf0_bank.baseaddr; if (!aci->doinit) { - blizzardea_bank.baseaddr = xcalloc(uae_u8, 65536 * 2); + blizzardea_bank.baseaddr = xcalloc(uae_u8, 262144); blizzardf0_bank.baseaddr = xcalloc(uae_u8, 524288); } else { protect_roms(false); @@ -2721,6 +2777,26 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci) autoconfig_rom = NULL; } } + } else if (is_falcon40(p)) { + earom_size = 262144; + for (int i = 0; i < 131072; i++) { + uae_u8 b = 0xff; + zfile_fread(&b, 1, 1, autoconfig_rom); + blizzardea_bank.baseaddr[i * 2 + 0] = b; + blizzardea_bank.baseaddr[i * 2 + 1] = 0xff; + } + zfile_fclose(autoconfig_rom); + autoconfig_rom = NULL; + } else if (is_tqm(p)) { + earom_size = 65536; + for (int i = 0; i < 32768; i++) { + uae_u8 b = 0xff; + zfile_fread(&b, 1, 1, autoconfig_rom); + blizzardea_bank.baseaddr[i * 2 + 0] = b; + blizzardea_bank.baseaddr[i * 2 + 1] = 0xff; + } + zfile_fclose(autoconfig_rom); + autoconfig_rom = NULL; } if (autoconf_stop) { diff --git a/expansion.cpp b/expansion.cpp index 2a87f6de..c96ed91d 100644 --- a/expansion.cpp +++ b/expansion.cpp @@ -4808,7 +4808,7 @@ const struct expansionromtype expansionroms[] = { false, 0, comspec_settings }, { - _T("rapidfire"), _T("RapidFire"), _T("DKB"), + _T("rapidfire"), _T("RapidFire/SpitFire"), _T("DKB"), NULL, ncr_rapidfire_init, NULL, rapidfire_add_scsi_unit, ROMTYPE_RAPIDFIRE, 0, 0, BOARD_AUTOCONFIG_Z2, false, NULL, 0, false, EXPANSIONTYPE_SCSI, @@ -5530,6 +5530,22 @@ static const struct expansionboardsettings blizzardboard_settings_mk2[] = { } }; +static const struct expansionboardsettings gvpa1230s2_settings[] = { + { + _T("Board disable (J5)"), + _T("disabled") + }, + { + _T("SCSI Disable (J6)"), + _T("scsidisabled") + }, + { + NULL + } +}; + + + static const struct cpuboardsubtype gvpboard_sub[] = { { _T("A3001 Series I"), @@ -5581,6 +5597,18 @@ static const struct cpuboardsubtype gvpboard_sub[] = { BOARD_MEMORY_HIGHMEM, 128 * 1024 * 1024 }, + { + _T("A1230 Turbo+ Series II"), + _T("A1230SII"), + ROMTYPE_CB_A1230S2, 0, + gvp_s2_add_accelerator_scsi_unit, EXPANSIONTYPE_SCSI, + BOARD_MEMORY_25BITMEM, + 128 * 1024 * 1024, + 0, + gvp_init_accelerator, NULL, BOARD_AUTOCONFIG_Z2, 1, + gvpa1230s2_settings, NULL, + 2017, 9, 0, false + }, { NULL } @@ -5690,7 +5718,7 @@ static const struct cpuboardsubtype cyberstormboard_sub[] = { NULL } }; -static const struct cpuboardsubtype warpengine_sub[] = { +static const struct cpuboardsubtype macrosystem_sub[] = { { _T("Warp Engine A4000"), _T("WarpEngineA4000"), @@ -5702,6 +5730,14 @@ static const struct cpuboardsubtype warpengine_sub[] = { ncr710_warpengine_autoconfig_init, NULL, BOARD_AUTOCONFIG_Z3, 1, warpengine_settings }, + { + _T("Falcon 040"), + _T("Falcon040"), + ROMTYPE_CB_FALCON40, 0, + NULL, 0, + 0, + 128 * 1024 * 1024, + }, { NULL } @@ -5831,6 +5867,20 @@ static const struct cpuboardsubtype dbk_sub[] = { NULL } }; +static const struct cpuboardsubtype hardital_sub[] = { + { + _T("TQM"), + _T("tqm"), + ROMTYPE_CB_TQM, 0, + NULL, 0, + BOARD_MEMORY_HIGHMEM, + 128 * 1024 * 1024, + }, + { + NULL + } +}; + static const struct cpuboardsubtype fusionforty_sub[] = { { _T("Fusion Forty"), @@ -6015,7 +6065,7 @@ const struct cpuboardtype cpuboards[] = { { BOARD_MACROSYSTEM, _T("MacroSystem"), - warpengine_sub, 0 + macrosystem_sub, 0 }, { BOARD_MTEC, @@ -6052,6 +6102,11 @@ const struct cpuboardtype cpuboards[] = { _T("Computer System Associates"), csa_sub, 0 }, + { + BOARD_HARDITAL, + _T("Hardital"), + hardital_sub, 0 + }, { NULL } diff --git a/include/a2091.h b/include/a2091.h index 74b88246..a5aa42c6 100644 --- a/include/a2091.h +++ b/include/a2091.h @@ -26,6 +26,7 @@ struct wd_chip_state { struct scsi_data *scsi; int wd33c93_ver;// 0 or 1 bool resetnodelay; + bool resetnodelay_active; }; #define COMMODORE_8727 0 @@ -64,7 +65,7 @@ struct gvp_dmac uae_u16 cntr; uae_u32 addr; uae_u16 len; - uae_u16 bank; + uae_u8 bank; int dma_on; uae_u8 version; bool use_version; @@ -75,6 +76,7 @@ struct gvp_dmac int s1_rammask; uae_u8 *buffer; int bufoffset; + uae_u8 *bank_ptr; }; struct comspec_chip diff --git a/include/cpuboard.h b/include/cpuboard.h index db408e06..f93aea2b 100644 --- a/include/cpuboard.h +++ b/include/cpuboard.h @@ -66,11 +66,13 @@ void blizzardppc_irq_setonly(int id, int level); #define BOARD_GVP_SUB_A530 2 #define BOARD_GVP_SUB_GFORCE030 3 #define BOARD_GVP_SUB_TEKMAGIC 4 +#define BOARD_GVP_SUB_A1230SII 5 #define BOARD_KUPKE 6 #define BOARD_MACROSYSTEM 7 #define BOARD_MACROSYSTEM_SUB_WARPENGINE_A4000 0 +#define BOARD_MACROSYSTEM_SUB_FALCON040 1 #define BOARD_MTEC 8 #define BOARD_MTEC_SUB_EMATRIX530 0 @@ -93,12 +95,15 @@ void blizzardppc_irq_setonly(int id, int level); #define BOARD_RCS_SUB_FUSIONFORTY 0 #define BOARD_IVS 12 -#define BOARD_IVS_VECTOR 0 +#define BOARD_IVS_SUB_VECTOR 0 #define BOARD_PPS 13 -#define BOARD_PPS_ZEUS040 0 +#define BOARD_PPS_SUB_ZEUS040 0 #define BOARD_CSA 14 -#define BOARD_CSA_MAGNUM40 0 +#define BOARD_CSA_SUB_MAGNUM40 0 + +#define BOARD_HARDITAL 15 +#define BOARD_HARDITAL_SUB_TQM 0 #endif /* UAE_CPUBOARD_H */ diff --git a/include/rommgr.h b/include/rommgr.h index e8a2861b..06c4f79e 100644 --- a/include/rommgr.h +++ b/include/rommgr.h @@ -44,6 +44,9 @@ extern int decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size); #define ROMTYPE_CB_VECTOR 0x00040017 #define ROMTYPE_CB_ZEUS040 0x00040018 #define ROMTYPE_CB_MAGNUM40 0x00040019 +#define ROMTYPE_CB_TQM 0x0004001a +#define ROMTYPE_CB_FALCON40 0x0004001b +#define ROMTYPE_CB_A1230S2 0x0004001c #define ROMTYPE_FREEZER 0x00080000 #define ROMTYPE_AR 0x00080001 diff --git a/rommgr.cpp b/rommgr.cpp index b709fa8c..f6200134 100644 --- a/rommgr.cpp +++ b/rommgr.cpp @@ -95,7 +95,7 @@ struct romdata *getromdatabypath (const TCHAR *path) return NULL; } -#define NEXT_ROM_ID 228 +#define NEXT_ROM_ID 231 #define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \ { _T("X"), 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, NULL, crc32, a, b, c, d, e }, @@ -391,6 +391,12 @@ static struct romdata roms[] = { ALTROMPN(225, 1, 2, 8192, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x7989684f, 0x9dc4d885, 0x242bf7eb, 0xe75a01b2, 0x483c9e3c, 0x8013896b) { _T("CSA Magnum 040"), 0, 0, 0, 0, _T("MAGNUM040\0"), 65536, 226, 0, 0, ROMTYPE_CB_MAGNUM40, 0, 0, NULL, 0xb94e805b, 0x4c1859ba,0x7ea2cedb,0xf5251bed,0xfbb76e6c,0x0617300e }, + { _T("Hardital TQM"), 0, 0, 0, 0, _T("TQM\0"), 32768, 228, 0, 0, ROMTYPE_CB_TQM, 0, 0, NULL, + 0x3bc9b90c, 0x24fa6ab8, 0x5ca64ae6, 0x43851a85, 0xa473ff0c, 0x5a48f272, NULL, NULL }, + { _T("MacroSystem Falcon 040 (No SCSI)"), 0, 0, 0, 0, _T("FALCON040\0"), 131072, 229, 0, 0, ROMTYPE_CB_FALCON40, 0, 0, NULL, + 0xa2ba67d1, 0x2015685f, 0xaadfbaf6, 0x8b19b07e, 0x5f4e888f, 0x738b99d7, NULL, NULL }, + { _T("GVP A1230 Turbo+ Series II"), 0, 0, 0, 0, _T("A1230SII\0"), 16384, 230, 0, 0, ROMTYPE_CB_A1230S2, 0, 0, NULL, + 0x96bd351f, 0xb7648daf, 0x52d0732d, 0x897548f3, 0x29ebf624, 0x101474d5, NULL, NULL }, { _T("A2620/A2630 -07"), 0, 0, 0, 0, _T("A2620\0A2630\0"), 65536, 105, 0, 0, ROMTYPE_CB_A26x0, 0, 0, _T("390282-07/390283-07"), 0x169d80e9, 0x41f518cb,0x41c1dc1f,0xcc636383,0x20676af5,0x4969010c, NULL, NULL }, @@ -416,14 +422,12 @@ static struct romdata roms[] = { 0x6ee2ecdd, 0x4c82e3ba, 0x2d2dd1d3, 0x82f01098, 0xc26681b8, 0xff62f36d, NULL, NULL }, ALTROMPN(164, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, _T("390282-01"), 0xdf76493b, 0x331ede0a, 0x8ca995cc, 0x1917f592, 0x18718e5b, 0x3c7fac39) ALTROMPN(164, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, _T("390283-01"), 0xd74187de, 0x681e4985, 0x4da64bf1, 0x6f2f99f7, 0x4b195f54, 0x0b8bd614) - { _T("DKB 1230/1240/Cobra"), 1, 23, 1, 23, _T("DKB\0"), 1460, 112, 0, 0, ROMTYPE_CB_DKB, 0, 0, NULL, 0x15ac5257, 0xf0431d02,0xac0f83d3,0x45db18c0,0x23f0cefb,0x33d17217, NULL, NULL }, { _T("DKB 1230/1240/Cobra + Ferret v1.23"), 1, 23, 1, 23, _T("DKB\0"), 12060, 208, 0, 0, ROMTYPE_CB_DKB, 0, 0, NULL, 0xda878913, 0xb62a68ef,0xb9378d74,0x0be17452,0x1ad07d2e,0xa461a313, NULL, NULL }, - { _T("DKB Rapidfire v1.31"), 1, 31, 1, 31, _T("RAPIDFIRE\0"), 11284, 207, 0, 0, ROMTYPE_RAPIDFIRE, 0, 0, NULL, + { _T("DKB Rapidfire/Spitfire v1.31"), 1, 31, 1, 31, _T("RAPIDFIRE\0"), 11284, 207, 0, 0, ROMTYPE_RAPIDFIRE, 0, 0, NULL, 0x68725e50, 0xa66f8ef6,0x901e0e41,0xf8b72bba,0x12165788,0xa452cf01, NULL, NULL }, - { _T("Fusion Forty"), 0, 0, 0, 0, _T("FUSIONFORTY\0"), 131072, 113, 0, 0, ROMTYPE_CB_FUSION, 0, 0, NULL, 0x48fcb5fd, 0x15674dac,0x90b6d8db,0xdda3a175,0x997184c2,0xa423d733, NULL, NULL }, ALTROMPN(113, 1, 1, 32768, ROMTYPE_QUAD | ROMTYPE_EVEN | ROMTYPE_8BIT, _T("U28"), 0x434a21a8, 0x472c1623, 0x02babd00, 0x7c1a77ff, 0x40dd12ab, 0x39c97f82) @@ -521,7 +525,7 @@ static struct romdata roms[] = { ALTROMPN(157, 1, 2, 8192, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x39b0075e, 0xf6644ea0, 0x6c3ed349, 0xfb0fb6b4, 0xa9f07655, 0x0b104179) { _T("Phoenix Board SCSI v.J"), 3, 1, 3, 1, _T("PBSCSI\0"), 32768, 159, 0, 0, ROMTYPE_PHOENIXB, 0, 0, NULL, 0x1f672e4b, 0xb20d50b8, 0x31ec9823, 0xfa732fc6, 0x522ecc6a, 0xae36ec33, NULL, NULL }, - { _T("IVS GramdSlam/Trumpcard Pro v4.9"), 4, 9, 4, 9, _T("IVSPRO\0"), 16384, 161, 0, 0, ROMTYPE_IVSTPRO, 0, 0, NULL, + { _T("IVS GrandSlam/Trumpcard Pro v4.9"), 4, 9, 4, 9, _T("IVSPRO\0"), 16384, 161, 0, 0, ROMTYPE_IVSTPRO, 0, 0, NULL, 0x4a15f224, 0x29500b47, 0x289e84ac, 0x575e3c7d, 0x82199b45, 0x605d8fc9, NULL, NULL }, { _T("Expansion Systems Dataflyer+ v1.5"), 1, 5, 1, 5, _T("DATAFLYERPLUS\0"), 32768, 170, 0, 0, ROMTYPE_DATAFLYER, 0, 0, NULL, 0x00888f19, 0x54b73354, 0xb3592691, 0x59a80909, 0x0bdb67df, 0x8ac22aa9, NULL, NULL }, -- 2.47.3