From a3608ed6eb936c68cd666c8f899df95768f5c81c Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Thu, 22 Aug 2019 22:03:06 +0300 Subject: [PATCH] 68020/030 T0 trace fixes. --- cputest.cpp | 14 ++++++++------ cputest/main.c | 21 +++++++++++++++------ gencpu.cpp | 1 + include/newcpu.h | 1 + newcpu.cpp | 10 ++++++---- newcpu_common.cpp | 2 ++ 6 files changed, 33 insertions(+), 16 deletions(-) diff --git a/cputest.cpp b/cputest.cpp index ea8e9d40..173a18c5 100644 --- a/cputest.cpp +++ b/cputest.cpp @@ -543,7 +543,8 @@ static void activate_trace(void) static void do_trace(void) { - if (regs.t0 && currprefs.cpu_model >= 68020) { + regs.trace_pc = regs.pc; + if (regs.t0 && !regs.t1 && currprefs.cpu_model >= 68020) { // this is obsolete return; } @@ -632,7 +633,7 @@ void MakeFromSR_x(int t0trace) SR-modifying instructions (including STOP). */ SPCFLAG_TRACE = 0; } - // Stop SR-modification does not generate T0 + // STOP SR-modification does not generate T0 // If this SR modification set Tx bit, no trace until next instruction. if ((oldt0 && t0trace && currprefs.cpu_model >= 68020) || oldt1) { // Always trace if Tx bits were already set, even if this SR modification cleared them. @@ -654,7 +655,7 @@ static void exception_check_trace(int nr) { SPCFLAG_TRACE = 0; SPCFLAG_DOTRACE = 0; - if (regs.t1 && !regs.t0) { + if (regs.t1) { /* trace stays pending if exception is div by zero, chk, * trapv or trap #x */ @@ -677,7 +678,7 @@ void m68k_setstopped(void) void check_t0_trace(void) { - if (regs.t0 && currprefs.cpu_model >= 68020) { + if (regs.t0 && !regs.t1 && currprefs.cpu_model >= 68020) { SPCFLAG_TRACE = 0; SPCFLAG_DOTRACE = 1; } @@ -805,7 +806,7 @@ void REGPARAM2 Exception_cpu(int n) test_exception_addr = m68k_getpci(); test_exception_opcode = -1; - bool t0 = currprefs.cpu_model >= 68020 && regs.t0; + bool t0 = currprefs.cpu_model >= 68020 && regs.t0 && !regs.t1; // check T0 trace if (t0) { activate_trace(); @@ -1701,7 +1702,8 @@ static void execute_ins(uae_u16 opc, uaecptr endpc, uaecptr targetpc, struct ins } } - if (dp->mnemo == i_TAS && low_memory_accessed) { + // Amiga Chip ram does not support TAS or MOVE16 + if ((dp->mnemo == i_TAS || dp->mnemo == i_MOVE16) && low_memory_accessed) { test_exception = -1; break; } diff --git a/cputest/main.c b/cputest/main.c index 8b2c3ff5..16c3688d 100644 --- a/cputest/main.c +++ b/cputest/main.c @@ -1623,10 +1623,7 @@ int main(int argc, char *argv[]) #endif - int lvl = cpu_lvl; - if (lvl == 3) { - lvl = 2; - } else if (lvl == 5) { + if (cpu_lvl == 5) { #ifdef M68K // Overwrite MOVEC to/from MSP // with NOPs if 68060 @@ -1651,8 +1648,6 @@ int main(int argc, char *argv[]) return 0; } - sprintf(path + strlen(path), "%lu/", 68000 + (lvl == 5 ? 6 : lvl) * 10); - strcpy(opcode, argv[1]); check_undefined_sr = 1; @@ -1670,9 +1665,23 @@ int main(int argc, char *argv[]) ccr_mask = ~getparamval(next); i++; } + } else if (!_stricmp(s, "68000")) { + cpu_lvl = 0; + } else if (!_stricmp(s, "68010")) { + cpu_lvl = 1; + } else if (!_stricmp(s, "68020")) { + cpu_lvl = 2; + } else if (!_stricmp(s, "68030")) { + cpu_lvl = 3; + } else if (!_stricmp(s, "68040")) { + cpu_lvl = 4; + } else if (!_stricmp(s, "68060")) { + cpu_lvl = 5; } } + sprintf(path + strlen(path), "%lu/", 68000 + (cpu_lvl == 5 ? 6 : cpu_lvl) * 10); + low_memory_size = -1; low_memory_temp = load_file(path, "lmem.dat", NULL, &low_memory_size, 0); high_memory_size = -1; diff --git a/gencpu.cpp b/gencpu.cpp index 810728c3..4cdb9944 100644 --- a/gencpu.cpp +++ b/gencpu.cpp @@ -4045,6 +4045,7 @@ static void gen_opcode (unsigned int opcode) printf ("\tMakeSR ();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n"); } else { // MOVE TO SR + printf("\tcheck_t0_trace();\n"); addcycles000 (4); printf ("\tregs.sr = src;\n"); } diff --git a/include/newcpu.h b/include/newcpu.h index d737f4d5..ecd331c0 100644 --- a/include/newcpu.h +++ b/include/newcpu.h @@ -173,6 +173,7 @@ struct regstruct uae_u16 opcode; uae_u32 instruction_pc; uae_u32 instruction_pc_user_exception; + uae_u32 trace_pc; uae_u16 irc, ir, db; volatile uae_atomic spcflags; diff --git a/newcpu.cpp b/newcpu.cpp index c8015cdf..4f61b88a 100644 --- a/newcpu.cpp +++ b/newcpu.cpp @@ -2314,7 +2314,7 @@ void REGPARAM2 MakeFromSR(void) static void exception_check_trace (int nr) { unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE); - if (regs.t1 && !regs.t0) { + if (regs.t1) { /* trace stays pending if exception is div by zero, chk, * trapv or trap #x */ @@ -3024,7 +3024,7 @@ static void ExceptionX (int nr, uaecptr address) void REGPARAM2 Exception_cpu(int nr) { - bool t0 = currprefs.cpu_model >= 68020 && regs.t0; + bool t0 = currprefs.cpu_model >= 68020 && regs.t0 && !regs.t1; ExceptionX (nr, -1); // check T0 trace if (t0) { @@ -3733,7 +3733,9 @@ void mmu_op (uae_u32 opcode, uae_u32 extra) static void do_trace (void) { - if (regs.t0 && currprefs.cpu_model >= 68020) { + // need to store PC because of branch instructions + regs.trace_pc = regs.pc; + if (regs.t0 && !regs.t1 && currprefs.cpu_model >= 68020) { // this is obsolete return; } @@ -8848,7 +8850,7 @@ uae_u32 get_long_cache_debug(uaecptr addr, bool *cached) void check_t0_trace(void) { - if (regs.t0 && currprefs.cpu_model >= 68020) { + if (regs.t0 && !regs.t1 && currprefs.cpu_model >= 68020) { unset_special (SPCFLAG_TRACE); set_special (SPCFLAG_DOTRACE); } diff --git a/newcpu_common.cpp b/newcpu_common.cpp index d31e68bd..7befe622 100644 --- a/newcpu_common.cpp +++ b/newcpu_common.cpp @@ -1426,6 +1426,8 @@ void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int void Exception_build_stack_frame_common(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int nr) { if (nr == 5 || nr == 6 || nr == 7 || nr == 9) { + if (nr == 9) + oldpc = regs.trace_pc; if (currprefs.cpu_model <= 68010) Exception_build_stack_frame(oldpc, currpc, regs.mmu_ssw, nr, 0x0); else -- 2.47.3