From b662b82a2120593ce9bb3c30ff09b836f783c19f Mon Sep 17 00:00:00 2001
From: Toni Wilen <twilen@winuae.net>
Date: Mon, 26 Feb 2018 20:11:54 +0200
Subject: [PATCH] PP&S Zeus 040 emulation.

---
 cpuboard.cpp          |  17 ++++-
 expansion.cpp         |  46 ++++++++----
 include/cpuboard.h    |   5 +-
 include/ncr_scsi.h    |   2 +
 include/rommgr.h      |   1 +
 ncr_scsi.cpp          | 169 ++++++++++++++++++++++++++++++------------
 qemuvga/lsi53c710.cpp |  19 +++++
 rommgr.cpp            |   6 +-
 8 files changed, 196 insertions(+), 69 deletions(-)

diff --git a/cpuboard.cpp b/cpuboard.cpp
index b38b398e..84cb5a05 100644
--- a/cpuboard.cpp
+++ b/cpuboard.cpp
@@ -331,7 +331,7 @@ static bool is_ivsvector(struct uae_prefs *p)
 }
 static bool is_aca500(struct uae_prefs *p)
 {
-	return ISCPUBOARDP(p, BOARD_IC, BOARD_IC_ACA500);
+	return false; //return ISCPUBOARDP(p, BOARD_IC, BOARD_IC_ACA500);
 }
 
 extern addrbank cpuboardmem1_bank;
@@ -2250,8 +2250,8 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci)
 	int boardid = cpuboards[p->cpuboard_type].id;
 	switch (boardid)
 	{
-		case BOARD_IC:
-		break;
+//		case BOARD_IC:
+//		break;
 
 		case BOARD_IVS:
 		switch (p->cpuboard_subtype)
@@ -2290,9 +2290,18 @@ bool cpuboard_autoconfig_init(struct autoconfig_info *aci)
 		break;
 
 		case BOARD_MACROSYSTEM:
+		switch (p->cpuboard_subtype)
+		{
+		case BOARD_MACROSYSTEM_SUB_WARPENGINE_A4000:
+			aci->addrbank = &expamem_null;
+			return true;
+		}
+		break;
+
+		case BOARD_PPS:
 		switch(p->cpuboard_subtype)
 		{
-			case BOARD_MACROSYSTEM_SUB_WARPENGINE_A4000:
+		case BOARD_PPS_ZEUS040:
 			aci->addrbank = &expamem_null;
 			return true;
 		}
diff --git a/expansion.cpp b/expansion.cpp
index 7d844b8c..cd2ad886 100644
--- a/expansion.cpp
+++ b/expansion.cpp
@@ -5853,6 +5853,33 @@ static const struct cpuboardsubtype ivs_sub[] = {
 	}
 };
 
+static const struct expansionboardsettings zeus040_settings[] = {
+	{
+		_T("Autoboot disable (A3)"),
+		_T("autoboot")
+	},
+	{
+		NULL
+	}
+};
+static const struct cpuboardsubtype pps_sub[] = {
+	{
+		_T("Zeus 040"),
+		_T("Zeus"),
+		ROMTYPE_CB_ZEUS040, 0,
+		zeus040_add_scsi_unit, EXPANSIONTYPE_SCSI,
+		BOARD_MEMORY_HIGHMEM,
+		64 * 1024 * 1024,
+		0,
+		ncr710_zeus040_autoconfig_init, NULL, BOARD_AUTOCONFIG_Z2, 1,
+		zeus040_settings, NULL,
+		2016, 150, 0, false
+	},
+	{
+		NULL
+	}
+};
+
 static const struct expansionboardsettings apollo_settings[] = {
 	{
 		_T("SCSI module installed"),
@@ -5896,17 +5923,6 @@ static const struct cpuboardsubtype kupkeboard_sub[] = {
 		NULL
 	}
 };
-static const struct cpuboardsubtype icboard_sub[] = {
-	{
-		_T("ACA 500"),
-		_T("aca500"),
-		ROMTYPE_CB_ACA500, 0,
-		NULL, EXPANSIONTYPE_24BIT
-	},
-	{
-		NULL
-	}
-};
 static const struct cpuboardsubtype dceboard_sub[] = {
 	{
 		_T("SX32 Pro"),
@@ -5991,13 +6007,11 @@ const struct cpuboardtype cpuboards[] = {
 		_T("Interactive Video Systems"),
 		ivs_sub, 0
 	},
-#if 0
 	{
-		BOARD_IC,
-		_T("Individual Computers"),
-		icboard_sub, 0
+		BOARD_PPS,
+		_T("Progressive Peripherals & Software"),
+		pps_sub, 0
 	},
-#endif
 	{
 		NULL
 	}
diff --git a/include/cpuboard.h b/include/cpuboard.h
index 41730551..4cebf174 100644
--- a/include/cpuboard.h
+++ b/include/cpuboard.h
@@ -95,7 +95,8 @@ void blizzardppc_irq_setonly(int id, int level);
 #define BOARD_IVS 12
 #define BOARD_IVS_VECTOR 0
 
-#define BOARD_IC 13
-#define BOARD_IC_ACA500 0
+#define BOARD_PPS 13
+#define BOARD_PPS_ZEUS040 0
+
 
 #endif /* UAE_CPUBOARD_H */
diff --git a/include/ncr_scsi.h b/include/ncr_scsi.h
index 88a81794..bc4a095d 100644
--- a/include/ncr_scsi.h
+++ b/include/ncr_scsi.h
@@ -20,6 +20,7 @@ extern void ncr_rethink(void);
 
 extern bool ncr710_a4091_autoconfig_init(struct autoconfig_info *aci);
 extern bool ncr710_warpengine_autoconfig_init(struct autoconfig_info *aci);
+extern bool ncr710_zeus040_autoconfig_init(struct autoconfig_info *aci);
 
 void cpuboard_ncr710_io_bput(uaecptr addr, uae_u32 v);
 uae_u32 cpuboard_ncr710_io_bget(uaecptr addr);
@@ -34,5 +35,6 @@ extern void cyberstorm_add_scsi_unit(int ch, struct uaedev_config_info *ci, stru
 extern void blizzardppc_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
 extern void a4091_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
 extern void wildfire_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+extern void zeus040_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
 
 #endif /* UAE_NCR_SCSI_H */
diff --git a/include/rommgr.h b/include/rommgr.h
index ae320a41..1df9f1db 100644
--- a/include/rommgr.h
+++ b/include/rommgr.h
@@ -42,6 +42,7 @@ extern int decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size);
 #define ROMTYPE_CB_B1230MK2	0x00040015
 #define ROMTYPE_CB_B1230MK3	0x00040016
 #define ROMTYPE_CB_VECTOR	0x00040017
+#define ROMTYPE_CB_ZEUS040	0x00040018
 
 #define ROMTYPE_FREEZER		0x00080000
 #define ROMTYPE_AR			0x00080001
diff --git a/ncr_scsi.cpp b/ncr_scsi.cpp
index c29575f7..72b25b9c 100644
--- a/ncr_scsi.cpp
+++ b/ncr_scsi.cpp
@@ -11,7 +11,7 @@
 
 #ifdef NCR
 
-#define NCR_DEBUG 2
+#define NCR_DEBUG 1
 
 #include "options.h"
 #include "uae.h"
@@ -33,7 +33,7 @@
 #include "devices.h"
 
 #define BOARD_SIZE 16777216
-#define IO_MASK 0xff
+#define IO_MASK 0x7f
 
 #define A4091_ROM_VECTOR 0x0200
 #define A4091_ROM_OFFSET 0x0000
@@ -73,6 +73,8 @@ struct ncr_state
 	int io_start, io_end;
 	addrbank *bank;
 	bool irq;
+	bool irqlevel;
+	bool z2;
 	void (*irq_func)(int, int);
 	struct romconfig *rc;
 	struct ncr_state **self_ptr;
@@ -163,18 +165,24 @@ static struct ncr_state *ncr_we;
 static struct ncr_state *ncr_a4000t;
 static struct ncr_state *ncra4091[MAX_DUPLICATE_EXPANSION_BOARDS];
 static struct ncr_state *ncr_wildfire;
+static struct ncr_state *ncr_zeus040;
 
 static void set_irq2(int id, int level)
 {
 	if (level)
 		safe_interrupt_set(IRQ_SOURCE_NCR, 0, false);
 }
+static void set_irq6(int id, int level)
+{
+	if (level)
+		safe_interrupt_set(IRQ_SOURCE_NCR, 0, true);
+}
 
 void ncr_rethink(void)
 {
 	for (int i = 0; ncr_units[i]; i++) {
 		if (ncr_units[i] != ncr_cs && ncr_units[i]->irq)
-			safe_interrupt_set(IRQ_SOURCE_NCR, i + 1, false);
+			safe_interrupt_set(IRQ_SOURCE_NCR, i + 1, ncr_units[i]->irqlevel);
 	}
 	if (ncr_cs && ncr_cs->irq)
 		cyberstorm_mk3_ppc_irq_setonly(0, 1);
@@ -405,8 +413,15 @@ static void ncr_bput2 (struct ncr_state *ncr, uaecptr addr, uae_u32 val)
 {
 	uae_u32 v = val;
 	addr &= ncr->board_mask;
-	if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end))
+	if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end)) {
+#if NCR_DEBUG > 1
+		write_log(_T("ncr_bput none %08x %02x %08x\n"), addr, v & 0xff, M68K_GETPC);
+#endif
 		return;
+	}
+#if NCR_DEBUG > 1
+	write_log(_T("ncr_bput %08x %02x %08x\n"), addr, v & 0xff, M68K_GETPC);
+#endif
 	if (ncr->newncr)
 		ncr_io_bput(ncr, addr, val);
 	else
@@ -446,12 +461,20 @@ static uae_u32 ncr_bget2 (struct ncr_state *ncr, uaecptr addr)
 		v ^= 0xff & ~7;
 		return v;
 	}
-	if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end))
+	if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end)) {
+#if NCR_DEBUG > 1
+		write_log(_T("ncr_bget none %08x %02x %08x\n"), addr, v, M68K_GETPC);
+#endif
 		return v;
+	}
 	if (ncr->newncr)
-		return ncr_io_bget(ncr, addr);
+		v = ncr_io_bget(ncr, addr);
 	else
-		return ncr710_io_bget(ncr, addr);
+		v = ncr710_io_bget(ncr, addr);
+#if NCR_DEBUG > 1
+	write_log(_T("ncr_bget %08x %02x %08x\n"), addr, v, M68K_GETPC);
+#endif
+	return v;
 }
 
 static uae_u32 REGPARAM2 ncr_lget (struct ncr_state *ncr, uaecptr addr)
@@ -459,18 +482,12 @@ static uae_u32 REGPARAM2 ncr_lget (struct ncr_state *ncr, uaecptr addr)
 	uae_u32 v = 0;
 	if (ncr) {
 		addr &= ncr->board_mask;
-		if (ncr == ncr_we) {
-			addr &= ~0x80;
-			v = (ncr_bget2(ncr, addr + 3) << 0) | (ncr_bget2(ncr, addr + 2) << 8) |
-				(ncr_bget2(ncr, addr + 1) << 16) | (ncr_bget2(ncr, addr + 0) << 24);
+		if (addr >= A4091_IO_ALT) {
+			v = (ncr_bget2 (ncr, addr + 3) << 0) | (ncr_bget2 (ncr, addr + 2) << 8) |
+				(ncr_bget2 (ncr, addr + 1) << 16) | (ncr_bget2 (ncr, addr + 0) << 24);
 		} else {
-			if (addr >= A4091_IO_ALT) {
-				v = (ncr_bget2 (ncr, addr + 3) << 0) | (ncr_bget2 (ncr, addr + 2) << 8) |
-					(ncr_bget2 (ncr, addr + 1) << 16) | (ncr_bget2 (ncr, addr + 0) << 24);
-			} else {
-				v = (ncr_bget2 (ncr, addr + 3) << 0) | (ncr_bget2 (ncr, addr + 2) << 8) |
-					(ncr_bget2 (ncr, addr + 1) << 16) | (ncr_bget2 (ncr, addr + 0) << 24);
-			}
+			v = (ncr_bget2 (ncr, addr + 3) << 0) | (ncr_bget2 (ncr, addr + 2) << 8) |
+				(ncr_bget2 (ncr, addr + 1) << 16) | (ncr_bget2 (ncr, addr + 0) << 24);
 		}
 	}
 	return v;
@@ -506,24 +523,16 @@ static void REGPARAM2 ncr_lput (struct ncr_state *ncr, uaecptr addr, uae_u32 l)
 	if (!ncr)
 		return;
 	addr &= ncr->board_mask;
-	if (ncr == ncr_we) {
-		addr &= ~0x80;
-		ncr_bput2(ncr, addr + 3, l >> 0);
-		ncr_bput2(ncr, addr + 2, l >> 8);
-		ncr_bput2(ncr, addr + 1, l >> 16);
-		ncr_bput2(ncr, addr + 0, l >> 24);
+	if (addr >= A4091_IO_ALT) {
+		ncr_bput2 (ncr, addr + 3, l >> 0);
+		ncr_bput2 (ncr, addr + 2, l >> 8);
+		ncr_bput2 (ncr, addr + 1, l >> 16);
+		ncr_bput2 (ncr, addr + 0, l >> 24);
 	} else {
-		if (addr >= A4091_IO_ALT) {
-			ncr_bput2 (ncr, addr + 3, l >> 0);
-			ncr_bput2 (ncr, addr + 2, l >> 8);
-			ncr_bput2 (ncr, addr + 1, l >> 16);
-			ncr_bput2 (ncr, addr + 0, l >> 24);
-		} else {
-			ncr_bput2 (ncr, addr + 3, l >> 0);
-			ncr_bput2 (ncr, addr + 2, l >> 8);
-			ncr_bput2 (ncr, addr + 1, l >> 16);
-			ncr_bput2 (ncr, addr + 0, l >> 24);
-		}
+		ncr_bput2 (ncr, addr + 3, l >> 0);
+		ncr_bput2 (ncr, addr + 2, l >> 8);
+		ncr_bput2 (ncr, addr + 1, l >> 16);
+		ncr_bput2 (ncr, addr + 0, l >> 24);
 	}
 }
 
@@ -559,15 +568,35 @@ static void REGPARAM2 ncr_bput (struct ncr_state *ncr, uaecptr addr, uae_u32 b)
 	addr &= ncr->board_mask;
 	if (!ncr->configured) {
 		addr &= 65535;
-		switch (addr)
-		{
-			case 0x4c:
-			ncr->configured = 1;
-			expamem_shutup(ncr->bank);
-			break;
-			case 0x48:
-			ncr->expamem_lo = b & 0xff;
-			break;
+		if (ncr->z2) {
+			switch (addr)
+			{
+				case 0x48:
+				ncr->expamem_hi = b & 0xff;
+				map_banks_z2(ncr->bank, expamem_board_pointer >> 16, expamem_board_size >> 16);
+				ncr->baseaddress = expamem_board_pointer;
+				ncr->configured = 1;
+				expamem_next(ncr->bank, NULL);
+				break;
+				case 0x4c:
+				ncr->configured = 1;
+				expamem_shutup(ncr->bank);
+				break;
+				case 0x4a:
+				ncr->expamem_lo = b & 0xff;
+				break;
+			}
+		} else {
+			switch (addr)
+			{
+				case 0x4c:
+				ncr->configured = 1;
+				expamem_shutup(ncr->bank);
+				break;
+				case 0x48:
+				ncr->expamem_lo = b & 0xff;
+				break;
+			}
 		}
 		return;
 	}
@@ -698,7 +727,7 @@ addrbank ncr_bank_generic = {
 	ncr_generic_lput, ncr_generic_wput, ncr_generic_bput,
 	default_xlate, default_check, NULL, NULL, _T("NCR53C700/800"),
 	dummy_lgeti, dummy_wgeti,
-	ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE
+	ABFLAG_IO | ABFLAG_THREADSAFE | ABFLAG_SAFE, S_READ, S_WRITE
 };
 
 static void ew (struct ncr_state *ncr, int addr, uae_u8 value)
@@ -759,7 +788,6 @@ bool ncr710_warpengine_autoconfig_init(struct autoconfig_info *aci)
 	if (!ncr)
 		return false;
 
-	ncr_we = ncr;
 	xfree(ncr->rom);
 	ncr->rom = NULL;
 
@@ -848,6 +876,47 @@ bool ncr710_a4091_autoconfig_init (struct autoconfig_info *aci)
 	return true;
 }
 
+static const uae_u8 zeus040_autoconfig[16] = {
+	0xd1, 0x96, 0x40, 0x00, 0x07, 0xea, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+
+bool ncr710_zeus040_autoconfig_init(struct autoconfig_info *aci)
+{
+	aci->autoconfigp = zeus040_autoconfig;
+	if (!aci->doinit)
+		return true;
+
+	struct ncr_state *ncr = getscsi(aci->rc);
+	if (!ncr)
+		return false;
+
+	xfree(ncr->rom);
+	ncr->rom = NULL;
+
+	ncr->enabled = true;
+	memset(ncr->acmemory, 0xff, sizeof ncr->acmemory);
+	ncr->rom_start = 0x8000;
+	ncr->rom_offset = 0x8000;
+	ncr->rom_end = 0x10000;
+	ncr->io_start = 0x4000;
+	ncr->io_end = 0x8000;
+
+	for (int i = 0; i < 16; i++) {
+		uae_u8 b = zeus040_autoconfig[i];
+		if (i == 0 && (currprefs.cpuboard_settings & 1))
+			b &= ~0x10;
+		ew(ncr, i * 4, b);
+	}
+	ncr->rom = xcalloc(uae_u8, 32768);
+	load_rom_rc(aci->rc, ROMTYPE_CB_ZEUS040, 16384, 0, ncr->rom, 32768, 0);
+
+	ncr_reset_board(ncr);
+
+	aci->addrbank = &ncr_bank_generic;
+	return true;
+}
+
+
 void ncr_free(void)
 {
 	for (int i = 0; i < MAX_NCR_UNITS; i++) {
@@ -992,4 +1061,12 @@ void wildfire_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romcon
 	ncr_wildfire->bank = &ncr_bank_generic;
 }
 
+void zeus040_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+	ncr_add_scsi_unit(&ncr_zeus040, ch, ci, rc, false);
+	ncr_zeus040->irq_func = set_irq6;
+	ncr_zeus040->irqlevel = true;
+	ncr_zeus040->z2 = true;
+}
+
 #endif
diff --git a/qemuvga/lsi53c710.cpp b/qemuvga/lsi53c710.cpp
index b69ff917..0690e938 100644
--- a/qemuvga/lsi53c710.cpp
+++ b/qemuvga/lsi53c710.cpp
@@ -1747,6 +1747,25 @@ static uint8_t lsi_reg_readb(LSIState710 *s, int offset)
 
 static void lsi_reg_writeb(LSIState710 *s, int offset, uint8_t val)
 {
+#if 0
+	switch (offset)
+	{
+		case 0x00:
+		case 0x01:
+		case 0x04:
+		case 0x05:
+		case 0x14:
+		case 0x18:
+		case 0x19:
+		case 0x1a:
+		case 0x1b:
+		case 0x22:
+		case 0x38:
+		write_log("710 config reg %02x = %02x\n", offset, val);
+		break;
+	}
+#endif
+
 #define CASE_SET_REG24(name, addr) \
     case addr    : s->name &= 0xffffff00; s->name |= val;       break; \
     case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8;  break; \
diff --git a/rommgr.cpp b/rommgr.cpp
index 32c0405b..35bf0b40 100644
--- a/rommgr.cpp
+++ b/rommgr.cpp
@@ -95,7 +95,7 @@ struct romdata *getromdatabypath (const TCHAR *path)
 	return NULL;
 }
 
-#define NEXT_ROM_ID 225
+#define NEXT_ROM_ID 226
 
 #define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \
 { _T("X"), 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, NULL, crc32, a, b, c, d, e },
@@ -385,6 +385,10 @@ static struct romdata roms[] = {
 	0x9e9781d5, 0xf65b60d1,0x4300c50f,0x2ed17cf4,0x4dcfdef9,0x16697bc9, NULL,  _T("tekmagic2060.rom") },
 	ALTROMPN(104, 1, 1, 32768, ROMTYPE_ODD  | ROMTYPE_8BIT, NULL, 0x888da4cf, 0x6ae85f3a, 0x65331ba4, 0xaaba67ae, 0x34763d70, 0x2bde0495)
 	ALTROMPN(104, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0xaf1f47db, 0x28d5bed0, 0xbc517d46, 0x500e8159, 0x723e0b64, 0x4733c26a)
+	{ _T("Zeus 040"), 2, 98, 2, 98, _T("ZEUS040\0"), 16384, 225, 0, 0, ROMTYPE_CB_ZEUS040, 0, 0, NULL,
+	0x2c609194, 0x9a91cf45,0x6816067a,0x943c18f1,0xbd30effe,0x482d4aaf, NULL, NULL },
+	ALTROMPN(225, 1, 1, 8192, ROMTYPE_ODD  | ROMTYPE_8BIT, NULL, 0xc0bea5dd, 0x1540a755, 0x36066da4, 0x8bcb3dd4, 0xf13f179b, 0x9439f379)
+	ALTROMPN(225, 1, 2, 8192, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x7989684f, 0x9dc4d885, 0x242bf7eb, 0xe75a01b2, 0x483c9e3c, 0x8013896b)
 
 	{ _T("A2620/A2630 -07"), 0, 0, 0, 0, _T("A2620\0A2630\0"), 65536, 105, 0, 0, ROMTYPE_CB_A26x0, 0, 0, _T("390282-07/390283-07"),
 	0x169d80e9, 0x41f518cb,0x41c1dc1f,0xcc636383,0x20676af5,0x4969010c, NULL, NULL },
-- 
2.47.3