From b7cd0dbe30a1483a152946cf401f042ef4d8b705 Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Sat, 18 Dec 2021 19:51:40 +0200 Subject: [PATCH] Enable Cirrus Logic planar modes, support planar mode horizontal doubling. --- pcem/vid_cl5429.cpp | 2 +- pcem/vid_svga.cpp | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/pcem/vid_cl5429.cpp b/pcem/vid_cl5429.cpp index bce75e85..acc145d5 100644 --- a/pcem/vid_cl5429.cpp +++ b/pcem/vid_cl5429.cpp @@ -2788,7 +2788,7 @@ static void *cl_init(int type, char *fn, int pci_card, uint32_t force_vram_size) gd5429->pci_regs[0x33] = 0x00; } - gd5429->svga.fb_only = -1; + gd5429->svga.fb_only = 0; return gd5429; } diff --git a/pcem/vid_svga.cpp b/pcem/vid_svga.cpp index 1b322192..c2a55226 100644 --- a/pcem/vid_svga.cpp +++ b/pcem/vid_svga.cpp @@ -466,6 +466,10 @@ void svga_recalctimings(svga_t *svga) if (!text) { if (!svga->lowres) { + if (svga->render == svga_render_2bpp_lowres) + svga->render = svga_render_2bpp_highres; + if (svga->render == svga_render_4bpp_lowres) + svga->render = svga_render_4bpp_highres; if (svga->render == svga_render_8bpp_lowres) svga->render = svga_render_8bpp_highres; if (svga->render == svga_render_15bpp_lowres) @@ -479,6 +483,10 @@ void svga_recalctimings(svga_t *svga) } if (svga->horizontal_linedbl) { + if (svga->render == svga_render_2bpp_highres) + svga->render = svga_render_2bpp_lowres; + if (svga->render == svga_render_4bpp_highres) + svga->render = svga_render_4bpp_lowres; if (svga->render == svga_render_8bpp_highres) svga->render = svga_render_8bpp_lowres; if (svga->render == svga_render_15bpp_highres) -- 2.47.3