From c67026bc6f1b5a59231c0d172e5c6050239dd186 Mon Sep 17 00:00:00 2001 From: Frode Solheim Date: Sun, 6 Sep 2015 22:39:05 +0200 Subject: [PATCH] JIT: harmless changes in codegen_x86.cpp --- jit/codegen_x86.cpp | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/jit/codegen_x86.cpp b/jit/codegen_x86.cpp index 3d7eb455..1ef399c2 100644 --- a/jit/codegen_x86.cpp +++ b/jit/codegen_x86.cpp @@ -32,6 +32,8 @@ /* This should eventually end up in machdep/, but for now, x86 is the only target, and it's easier this way... */ +#include "flags_x86.h" + /************************************************************************* * Some basic information about the the target CPU * *************************************************************************/ @@ -80,16 +82,15 @@ only target, and it's easier this way... */ #define REG_PAR2 EDX_INDEX #endif -#if defined(_WIN32) #define REG_PC_PRE EAX_INDEX /* The register we use for preloading regs.pc_p */ +#if defined(_WIN32) #define REG_PC_TMP ECX_INDEX -#define SHIFTCOUNT_NREG ECX_INDEX /* Register that can be used for shiftcount. -1 if any reg will do */ #else -#define REG_PC_PRE EAX_INDEX /* The register we use for preloading regs.pc_p */ #define REG_PC_TMP ECX_INDEX /* Another register that is not the above */ -#define SHIFTCOUNT_NREG ECX_INDEX /* Register that can be used for shiftcount. -1 if any reg will do */ #endif +#define SHIFTCOUNT_NREG ECX_INDEX /* Register that can be used for shiftcount. + -1 if any reg will do */ #define MUL_NREG1 EAX_INDEX /* %eax will hold the low 32 bits after a 32x32 mul */ #define MUL_NREG2 EDX_INDEX /* %edx will hold the high 32 bits */ @@ -3257,10 +3258,20 @@ static void cpuid(uae_u32 op, uae_u32 *eax, uae_u32 *ebx, uae_u32 *ecx, uae_u32 *edx) { const int CPUID_SPACE = 4096; +#ifdef UAE uae_u8* cpuid_space = (uae_u8 *)cache_alloc(CPUID_SPACE); if (cpuid_space == 0) { +#else + uae_u8* cpuid_space = (uae_u8 *)vm_acquire(CPUID_SPACE); + if (cpuid_space == VM_MAP_FAILED) +#endif jit_abort("Could not allocate cpuid_space"); +#ifdef UAE } +#else + vm_protect(cpuid_space, CPUID_SPACE, VM_PAGE_READ | VM_PAGE_WRITE | VM_PAGE_EXECUTE); +#endif + static uae_u32 s_op, s_eax, s_ebx, s_ecx, s_edx; uae_u8* tmp=get_target(); @@ -3289,7 +3300,11 @@ cpuid(uae_u32 op, uae_u32 *eax, uae_u32 *ebx, uae_u32 *ecx, uae_u32 *edx) if (ecx != NULL) *ecx = s_ecx; if (edx != NULL) *edx = s_edx; +#ifdef UAE cache_free (cpuid_space); +#else + vm_release(cpuid_space, CPUID_SPACE); +#endif } static void -- 2.47.3