From dc808a39c42fcb11b24ffe56190e0994f8f635e9 Mon Sep 17 00:00:00 2001
From: Frode Solheim <frode@fs-uae.net>
Date: Mon, 12 Oct 2015 23:25:32 +0200
Subject: [PATCH] JIT: Better fldcw_m_indexed fix (can use all x86-64
 registers)

---
 jit/codegen_x86.cpp | 33 ++++++++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/jit/codegen_x86.cpp b/jit/codegen_x86.cpp
index bb964634..effdb08c 100644
--- a/jit/codegen_x86.cpp
+++ b/jit/codegen_x86.cpp
@@ -212,6 +212,36 @@ static const uae_u8 need_to_preserve[]={0,0,0,1,0,1,1,1};
 #define x86_get_target()		get_target()
 #define x86_emit_failure(MSG)	jit_fail(MSG, __FILE__, __LINE__, __FUNCTION__)
 
+static inline void x86_64_addr32(void)
+{
+#ifdef CPU_x86_64
+	emit_byte(0x67);
+#endif
+}
+
+static inline void x86_64_rex(bool w, uae_u32 *r, uae_u32 *x, uae_u32 *b)
+{
+#ifdef CPU_x86_64
+	int rex_byte = 0x40;
+	if (*b >= R8_INDEX) {
+		*b -= R8_INDEX;
+		rex_byte |= 1;
+	}
+	if (rex_byte != 0x40) {
+		emit_byte(rex_byte);
+	}
+#endif
+}
+
+static inline void x86_64_prefix(
+	bool addr32, bool w, uae_u32 *r, uae_u32 *x, uae_u32 *b)
+{
+	if (addr32) {
+		x86_64_addr32();
+	}
+	x86_64_rex(w, r, x, b);
+}
+
 // Some mappings to mark compemu_support calls as only used by compemu
 // These are still mainly x86 minded. Should be more CPU independent in the future
 #define compemu_raw_add_l_mi(a,b)		raw_add_l_mi(a,b)
@@ -4230,8 +4260,9 @@ LENDFUNC(NONE,NONE,2,raw_fmov_rr,(FW d, FR s))
 
 LOWFUNC(NONE,READ,2,raw_fldcw_m_indexed,(R4 index, IMM base))
 {
+	x86_64_prefix(true, false, NULL, NULL, &index);
 	emit_byte(0xd9);
-	emit_byte(0xa8+index);
+	emit_byte(0xa8 + index);
 	emit_long(base);
 }
 LENDFUNC(NONE,READ,2,raw_fldcw_m_indexed,(R4 index, IMM base))
-- 
2.47.3