From e16c1d8cec8baaac67d05849c19eb8847e36c12b Mon Sep 17 00:00:00 2001
From: Toni Wilen <twilen@winuae.net>
Date: Sat, 11 Feb 2023 11:00:47 +0200
Subject: [PATCH] Separate Agnus and Denise pre-OCS model selection.

---
 cfgfile.cpp                   | 70 +++++++++++++++++++++++------------
 custom.cpp                    | 24 +++++++-----
 drawing.cpp                   | 13 ++++---
 include/custom.h              |  4 +-
 include/options.h             | 26 +++++++++++--
 memory.cpp                    | 10 ++++-
 od-win32/resources/resource.h |  5 ++-
 od-win32/resources/winuae.rc  | 33 +++++++++--------
 od-win32/win32gui.cpp         | 39 +++++++++++++++----
 9 files changed, 156 insertions(+), 68 deletions(-)

diff --git a/cfgfile.cpp b/cfgfile.cpp
index 696a6db1..97f77ae9 100644
--- a/cfgfile.cpp
+++ b/cfgfile.cpp
@@ -249,7 +249,10 @@ static const TCHAR *unmapped[] = { _T("floating"), _T("zero"), _T("one"), 0 };
 static const TCHAR *ciatype[] = { _T("default"), _T("391078-01"), 0 };
 static const TCHAR *debugfeatures[] = { _T("segtracker"), _T("fsdebug"), 0 };
 static const TCHAR *hvcsync[] = { _T("hvcsync"), _T("csync"), _T("hvsync"), 0 };
-static const TCHAR* eclocksync[] = { _T("default"), _T("68000"), _T("Gayle"), _T("68000_opt"), 0 };
+static const TCHAR *eclocksync[] = { _T("default"), _T("68000"), _T("Gayle"), _T("68000_opt"), 0 };
+static const TCHAR *agnusmodel[] = { _T("default"), _T("velvet"), _T("a1000"), _T("ocs"), _T("ecs"), _T("aga"), 0 };
+static const TCHAR *agnussize[] = { _T("default"), _T("512k"), _T("1m"), _T("2m"), 0 };
+static const TCHAR *denisemodel[] = { _T("default"), _T("velvet"), _T("a1000_noehb"), _T("a1000"), _T("ocs"), _T("ecs"), _T("aga"), 0 };
 
 struct hdcontrollerconfig
 {
@@ -2675,10 +2678,10 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 	cfgfile_dwrite(f, _T("ramsey"), _T("%d"), p->cs_ramseyrev);
 	cfgfile_dwrite_bool(f, _T("pcmcia"), p->cs_pcmcia);
 	cfgfile_dwrite_bool(f, _T("resetwarning"), p->cs_resetwarning);
-	cfgfile_dwrite_bool(f, _T("denise_noehb"), p->cs_denisenoehb);
-	cfgfile_dwrite_bool(f, _T("agnus_bltbusybug"), p->cs_agnusbltbusybug);
+	cfgfile_dwrite_bool(f, _T("denise_noehb"), p->cs_denisemodel == DENISEMODEL_VELVET || p->cs_denisemodel == DENISEMODEL_A1000NOEHB);
+	cfgfile_dwrite_bool(f, _T("agnus_bltbusybug"), p->cs_agnusmodel == AGNUSMODEL_A1000);
 	cfgfile_dwrite_bool(f, _T("bkpt_halt"), p->cs_bkpthang);
-	cfgfile_dwrite_bool(f, _T("ics_agnus"), p->cs_dipagnus);
+	cfgfile_dwrite_bool(f, _T("ics_agnus"), p->cs_agnusmodel == AGNUSMODEL_A1000);
 	cfgfile_dwrite_bool(f, _T("cia_todbug"), p->cs_ciatodbug);
 	cfgfile_dwrite_bool(f, _T("z3_autoconfig"), p->cs_z3autoconfig);
 	cfgfile_dwrite_bool(f, _T("1mchipjumper"), p->cs_1mchipjumper);
@@ -2694,6 +2697,9 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
 	cfgfile_dwrite(f, _T("chipset_hacks"), _T("0x%x"), p->cs_hacks);
 	cfgfile_dwrite(f, _T("eclockphase"), _T("%d"), p->cs_eclockphase);
 	cfgfile_dwrite_strarr(f, _T("eclocksync"), eclocksync, p->cs_eclocksync);
+	cfgfile_dwrite_strarr(f, _T("agnusmodel"), agnusmodel, p->cs_agnusmodel);
+	cfgfile_dwrite_strarr(f, _T("agnussize"), agnussize, p->cs_agnussize);
+	cfgfile_dwrite_strarr(f, _T("denisemodel"), denisemodel, p->cs_denisemodel);
 
 	if (is_board_enabled(p, ROMTYPE_CD32CART, 0)) {
 		cfgfile_dwrite_bool(f, _T("cd32fmv"), true);
@@ -5731,6 +5737,25 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 	if (cfgfile_string(option, value, _T("jit_blacklist"), p->jitblacklist, sizeof p->jitblacklist / sizeof(TCHAR)))
 		return 1;
 
+	if (cfgfile_yesno(option, value, _T("denise_noehb"), &dummybool)) {
+		if (dummybool) {
+			p->cs_denisemodel = DENISEMODEL_A1000NOEHB;
+		}
+		return 1;
+	}
+	if (cfgfile_yesno(option, value, _T("ics_agnus"), &dummybool)) {
+		if (dummybool) {
+			p->cs_agnusmodel = AGNUSMODEL_A1000;
+		}
+		return 1;
+	}
+	if (cfgfile_yesno(option, value, _T("agnus_bltbusybug"), &dummybool)) {
+		if (dummybool) {
+			p->cs_agnusmodel = AGNUSMODEL_A1000;
+		}
+		return 1;
+	}
+
 	if (cfgfile_yesno(option, value, _T("immediate_blits"), &p->immediate_blits)
 		|| cfgfile_yesno(option, value, _T("fpu_no_unimplemented"), &p->fpu_no_unimplemented)
 		|| cfgfile_yesno(option, value, _T("cpu_no_unimplemented"), &p->int_no_unimplemented)
@@ -5746,14 +5771,11 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 		|| cfgfile_yesno(option, value, _T("ksmirror_a8"), &p->cs_ksmirror_a8)
 		|| cfgfile_yesno(option, value, _T("resetwarning"), &p->cs_resetwarning)
 		|| cfgfile_yesno(option, value, _T("cia_todbug"), &p->cs_ciatodbug)
-		|| cfgfile_yesno(option, value, _T("denise_noehb"), &p->cs_denisenoehb)
-		|| cfgfile_yesno(option, value, _T("ics_agnus"), &p->cs_dipagnus)
 		|| cfgfile_yesno(option, value, _T("z3_autoconfig"), &p->cs_z3autoconfig)
 		|| cfgfile_yesno(option, value, _T("color_burst"), &p->cs_color_burst)
 		|| cfgfile_yesno(option, value, _T("toshiba_gary"), &p->cs_toshibagary)
 		|| cfgfile_yesno(option, value, _T("rom_is_slow"), &p->cs_romisslow)
 		|| cfgfile_yesno(option, value, _T("1mchipjumper"), &p->cs_1mchipjumper)
-		|| cfgfile_yesno(option, value, _T("agnus_bltbusybug"), &p->cs_agnusbltbusybug)
 		|| cfgfile_yesno(option, value, _T("bkpt_halt"), &p->cs_bkpthang)
 		|| cfgfile_yesno(option, value, _T("gfxcard_hardware_vblank"), &p->rtg_hardwareinterrupt)
 		|| cfgfile_yesno(option, value, _T("gfxcard_hardware_sprite"), &p->rtg_hardwaresprite)
@@ -5871,6 +5893,9 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
 		|| cfgfile_strval(option, value, _T("ciaa_type"), &p->cs_ciatype[0], ciatype, 0)
 		|| cfgfile_strval(option, value, _T("ciab_type"), &p->cs_ciatype[1], ciatype, 0)
 		|| cfgfile_strboolval(option, value, _T("comp_flushmode"), &p->comp_hardflush, flushmode, 0)
+		|| cfgfile_strval(option, value, _T("agnusmodel"), &p->cs_agnusmodel, agnusmodel, 0)
+		|| cfgfile_strval(option, value, _T("agnussize"), &p->cs_agnussize, agnussize, 0)
+		|| cfgfile_strval(option, value, _T("denisemodel"), &p->cs_denisemodel, denisemodel, 0)
 		|| cfgfile_strval(option, value, _T("eclocksync"), &p->cs_eclocksync, eclocksync, 0))
 		return 1;
 
@@ -8837,12 +8862,11 @@ static void bip_velvet(struct uae_prefs *p, int config, int compa, int romcheck)
 	p->floppyslots[1].dfxtype = DRV_NONE;
 	p->cs_compatible = CP_VELVET;
 	p->bogomem.chipramtiming = false;
-	p->cs_dipagnus = 1;
-	p->cs_agnusbltbusybug = 1;
+	p->chipmem.size = 0x40000;
 	built_in_chipset_prefs (p);
-	p->cs_denisenoehb = 1;
+	p->cs_agnusmodel = AGNUSMODEL_VELVET;
+	p->cs_denisemodel = DENISEMODEL_VELVET;
 	p->cs_cia6526 = 1;
-	p->chipmem.size = 0x40000;
 }
 
 static int bip_a1000 (struct uae_prefs *p, int config, int compa, int romcheck)
@@ -8858,11 +8882,12 @@ static int bip_a1000 (struct uae_prefs *p, int config, int compa, int romcheck)
 	p->floppyslots[1].dfxtype = DRV_NONE;
 	p->cs_compatible = CP_A1000;
 	p->bogomem.chipramtiming = false;
-	p->cs_dipagnus = 1;
-	p->cs_agnusbltbusybug = 1;
+	p->cs_agnusmodel = AGNUSMODEL_A1000;
+	p->cs_denisemodel = DENISEMODEL_A1000;
 	built_in_chipset_prefs (p);
-	if (config > 0)
-		p->cs_denisenoehb = 1;
+	if (config > 0) {
+		p->cs_denisemodel = DENISEMODEL_A1000NOEHB;
+	}
 	if (config > 1)
 		p->chipmem.size = 0x40000;
 	if (config > 2) {
@@ -9388,9 +9413,9 @@ int built_in_chipset_prefs (struct uae_prefs *p)
 	p->cs_ramseyrev = -1;
 	p->cs_deniserev = -1;
 	p->cs_agnusrev = -1;
-	p->cs_denisenoehb = 0;
-	p->cs_dipagnus = 0;
-	p->cs_agnusbltbusybug = 0;
+	p->cs_agnusmodel = 0;
+	p->cs_agnussize = 0;
+	p->cs_denisemodel = 0;
 	p->cs_bkpthang = 0;
 	p->cs_mbdmac = 0;
 	p->cs_pcmcia = 0;
@@ -9495,8 +9520,8 @@ int built_in_chipset_prefs (struct uae_prefs *p)
 		p->cs_a1000ram = 1;
 		p->cs_ciaatod = p->ntscmode ? 2 : 1;
 		p->cs_ksmirror_e0 = 0;
-		p->cs_agnusbltbusybug = 1;
-		p->cs_dipagnus = 1;
+		p->cs_agnusmodel = AGNUSMODEL_A1000;
+		p->cs_denisemodel = DENISEMODEL_A1000;
 		p->cs_ciatodbug = true;
 		if (has_expansion_with_rtc(p, 0x80000))
 			p->cs_rtc = 1;
@@ -9504,9 +9529,8 @@ int built_in_chipset_prefs (struct uae_prefs *p)
 	case CP_VELVET: // A1000 Prototype
 		p->cs_ciaatod = p->ntscmode ? 2 : 1;
 		p->cs_ksmirror_e0 = 0;
-		p->cs_agnusbltbusybug = 1;
-		p->cs_dipagnus = 1;
-		p->cs_denisenoehb = 1;
+		p->cs_agnusmodel = AGNUSMODEL_A1000;
+		p->cs_denisemodel = DENISEMODEL_A1000NOEHB;
 		break;
 	case CP_A1200: // A1200
 		p->cs_ide = IDE_A600A1200;
diff --git a/custom.cpp b/custom.cpp
index d877436a..ef661999 100644
--- a/custom.cpp
+++ b/custom.cpp
@@ -1999,6 +1999,9 @@ static void update_mirrors(void)
 	aga_mode = (currprefs.chipset_mask & CSMASK_AGA) != 0;
 	ecs_agnus = (currprefs.chipset_mask & CSMASK_ECS_AGNUS) != 0;
 	ecs_denise = (currprefs.chipset_mask & CSMASK_ECS_DENISE) != 0;
+	agnusa1000 = currprefs.cs_agnusmodel == AGNUSMODEL_A1000 || currprefs.cs_agnusmodel == AGNUSMODEL_VELVET;
+	denisea1000_noehb = currprefs.cs_denisemodel == DENISEMODEL_VELVET || currprefs.cs_denisemodel == DENISEMODEL_A1000NOEHB;
+	denisea1000 = currprefs.cs_denisemodel == DENISEMODEL_VELVET || currprefs.cs_denisemodel == DENISEMODEL_A1000NOEHB || currprefs.cs_denisemodel == DENISEMODEL_A1000;
 	direct_rgb = aga_mode;
 	if (aga_mode) {
 		sprite_sprctlmask = 0x01 | 0x08 | 0x10;
@@ -2035,7 +2038,7 @@ static bool isehb(uae_u16 bplcon0, uae_u16 bplcon2)
 	} else if (ecs_denise) {
 		bplehb = ((bplcon0 & 0xFC00) == 0x6000 || (bplcon0 & 0xFC00) == 0x7000);
 	} else {
-		bplehb = ((bplcon0 & 0xFC00) == 0x6000 || (bplcon0 & 0xFC00) == 0x7000) && !currprefs.cs_denisenoehb;
+		bplehb = ((bplcon0 & 0xFC00) == 0x6000 || (bplcon0 & 0xFC00) == 0x7000) && !denisea1000_noehb;
 	}
 	return bplehb;
 }
@@ -5600,8 +5603,8 @@ static void reset_decisions_scanline_start(void)
 		}
 	}
 
-	if (!ecs_denise && currprefs.gfx_overscanmode < OVERSCANMODE_ULTRA) {
-		if (currprefs.cs_dipagnus || !ecs_agnus) {
+	if (!ecs_denise) {
+		if (agnusa1000 || !ecs_agnus) {
 			if (vb_start_line == 2 + vblank_extraline) {
 				record_color_change2(0, 0, COLOR_CHANGE_BLANK | 1);
 			}
@@ -6588,7 +6591,7 @@ static void init_hz(bool checkvposw)
 	maxvpos_display = maxvpos;
 	maxvpos_display_vsync = 1;
 	// A1000 Agnus VBSTRT=first line, OCS and later: VBSTRT=last line
-	if (currprefs.cs_dipagnus) {
+	if (agnusa1000) {
 		maxvpos_display_vsync++;
 	}
 
@@ -6729,7 +6732,7 @@ static void init_hz(bool checkvposw)
 		minfirstline = 0;
 	}
 
-	vblank_extraline = !currprefs.cs_dipagnus && !ecs_denise ? 1 : 0;
+	vblank_extraline = !agnusa1000 && !ecs_denise ? 1 : 0;
 
 	int minfirstline_hw = minfirstline;
 	if (currprefs.gfx_overscanmode >= OVERSCANMODE_ULTRA) {
@@ -7077,7 +7080,7 @@ static bool blit_busy(int hpos, bool dmaconr)
 		return false;
 	}
 	// AGA apparently fixes both bugs.
-	if (currprefs.cs_agnusbltbusybug) {
+	if (agnusa1000) {
 		// Blitter busy bug: A1000 Agnus only sets busy-bit when blitter gets first DMA slot.
 		if (!blt_info.got_cycle) {
 			return false;
@@ -7171,7 +7174,7 @@ static void vb_check(void)
 	check_line_enabled();
 
 	// A1000 Agnus VBSTRT=first line, OCS and later: VBSTRT=last line
-	if (currprefs.cs_dipagnus) {
+	if (agnusa1000) {
 		if (vpos == 0) {
 			vb_start_line = 1;
 			vb_state = true;
@@ -7256,6 +7259,7 @@ static uae_u16 VPOSR(void)
 static void VPOSW(uae_u16 v)
 {
 	int oldvpos = vpos;
+
 #if 0
 	if (M68K_GETPC < 0xf00000 || 1)
 		write_log (_T("VPOSW %04X PC=%08x\n"), v, M68K_GETPC);
@@ -12155,7 +12159,7 @@ static void hsync_handler_pre(bool onvsync)
 			if (!ecs_denise && vpos == get_equ_vblank_endline() - 1) {
 				hdiw_counter++;
 			}
-			if (ecs_denise || vpos > get_equ_vblank_endline() || (currprefs.cs_dipagnus && vpos == 0)) {
+			if (ecs_denise || vpos > get_equ_vblank_endline() || (agnusa1000 && vpos == 0)) {
 				hdiw_counter = maxhpos * 2;
 			}
 		}
@@ -13483,7 +13487,7 @@ void custom_reset(bool hardreset, bool keyboardreset)
 	nr_armed = 0;
 	next_lineno = 0;
 	vb_start_line = 1;
-	if (currprefs.cs_dipagnus) {
+	if (agnusa1000) {
 		vb_start_line = 0;
 	}
 	vb_state = true;
@@ -13547,7 +13551,7 @@ void custom_reset(bool hardreset, bool keyboardreset)
 			for (int i = 0; i < 32; i++) {
 				uae_u16 c;
 				if (i == 0) {
-					c = ((ecs_denise && !aga_mode) || currprefs.cs_denisenoehb) ? 0xfff : 0x000;
+					c = ((ecs_denise && !aga_mode) || denisea1000) ? 0xfff : 0x000;
 				} else {
 					c |= uaerand();
 					c |= uaerand();
diff --git a/drawing.cpp b/drawing.cpp
index f2ba63a9..c96363c6 100644
--- a/drawing.cpp
+++ b/drawing.cpp
@@ -112,6 +112,9 @@ static void lores_reset (void)
 bool ecs_agnus;
 bool ecs_denise;
 bool aga_mode;
+bool agnusa1000;
+bool denisea1000_noehb;
+bool denisea1000;
 
 bool direct_rgb;
 
@@ -1232,8 +1235,8 @@ static void pfield_init_linetoscr (int lineno, bool border)
 			if (playfield_end < linetoscr_diw_end && hblank_right_stop > playfield_end) {
 				playfield_end = linetoscr_diw_end;
 			}
-			// A1000 shows extra sprite pixel after hdiw end TODO: Denise feature, not Agnus.
-			if (currprefs.cs_dipagnus) {
+			// A1000 shows extra sprite pixel after hdiw end
+			if (denisea1000) {
 				sprite_end += 1 << lores_shift;
 			}
 			int plfleft = dp_for_drawing->plfleft - DDF_OFFSET;
@@ -2383,7 +2386,7 @@ static void pfield_set_linetoscr (void)
 	}
 #endif
 	// A1000 Denise right border "bordersprite" bug
-	if (currprefs.cs_dipagnus) {
+	if (denisea1000) {
 		if (res_shift == 0) {
 			switch (vidinfo->drawbuffer.pixbytes) {
 				case 2:
@@ -3362,7 +3365,7 @@ static void pfield_expand_dp_bplcon(void)
 			if (!aga_mode)
 				bplehb = -1;
 		}
-	} else if ((currprefs.cs_denisenoehb)) {
+	} else if (denisea1000_noehb) {
 		bplehb = -1;
 	}
 	bplcolorburst = (dp_for_drawing->bplcon0 & 0x200) != 0;
@@ -3943,7 +3946,7 @@ static void pfield_draw_line(struct vidbuffer *vb, int lineno, int gfx_ypos, int
 		if (dip_for_drawing->nr_sprites) {
 			if (ce_is_bordersprite(colors_for_drawing.extra) && !ce_is_borderblank(colors_for_drawing.extra) && dp_for_drawing->bordersprite_seen) {
 				do_color_changes(pfield_do_linetoscr_bordersprite_aga, pfield_do_linetoscr_spr, lineno);
-			} else if (currprefs.cs_dipagnus) {
+			} else if (agnusa1000) {
 				do_color_changes(pfield_do_linetoscr_bordersprite_a1000, pfield_do_linetoscr_spr, lineno);
 			} else {
 				do_color_changes(pfield_do_fill_line, dip_for_drawing->nr_sprites ? pfield_do_linetoscr_spr : pfield_do_linetoscr, lineno);
diff --git a/include/custom.h b/include/custom.h
index eec7b140..845471c9 100644
--- a/include/custom.h
+++ b/include/custom.h
@@ -28,7 +28,9 @@
 #define BEAMCON0_VSYTRUE	0x0002
 #define BEAMCON0_HSYTRUE	0x0001
 
-extern bool aga_mode, ecs_agnus, ecs_denise, direct_rgb;
+extern bool aga_mode, ecs_agnus, ecs_denise;
+extern bool agnusa1000, denisea1000_noehb, denisea1000;
+extern bool direct_rgb;
 
 /* These are the masks that are ORed together in the chipset_mask option.
 * If CSMASK_AGA is set, the ECS bits are guaranteed to be set as well.  */
diff --git a/include/options.h b/include/options.h
index 102b4e49..69b1521b 100644
--- a/include/options.h
+++ b/include/options.h
@@ -300,6 +300,26 @@ enum { CP_GENERIC = 1, CP_CDTV, CP_CDTVCR, CP_CD32, CP_A500, CP_A500P, CP_A600,
 #define OVERSCANMODE_EXTREME 5
 #define OVERSCANMODE_ULTRA 6
 
+#define AGNUSMODEL_AUTO 0
+#define AGNUSMODEL_VELVET 1
+#define AGNUSMODEL_A1000 2
+#define AGNUSMODEL_OCS 3
+#define AGNUSMODEL_ECS 4
+#define AGNUSMODEL_AGA 5
+
+#define AGNUSSIZE_AUTO 0
+#define AGNUSSIZE_512 1
+#define AGNUSSIZE_1M 2
+#define AGNUSSIZE_1024 3
+
+#define DENISEMODEL_AUTO 0
+#define DENISEMODEL_VELVET 1
+#define DENISEMODEL_A1000NOEHB 2
+#define DENISEMODEL_A1000 3
+#define DENISEMODEL_OCS 4
+#define DENISEMODEL_ECS 5
+#define DENISEMODEL_AGA 6
+
 #define MAX_FILTERSHADERS 4
 
 #define MAX_CHIPSET_REFRESH 10
@@ -689,9 +709,6 @@ struct uae_prefs {
 	bool cs_cdtvcr;
 	bool cs_df0idhw;
 	bool cs_resetwarning;
-	bool cs_denisenoehb;
-	bool cs_dipagnus;
-	bool cs_agnusbltbusybug;
 	bool cs_ciatodbug;
 	bool cs_z3autoconfig;
 	bool cs_1mchipjumper;
@@ -708,6 +725,9 @@ struct uae_prefs {
 	int cs_hvcsync;
 	int cs_eclockphase;
 	int cs_eclocksync;
+	int cs_agnusmodel;
+	int cs_agnussize;
+	int cs_denisemodel;
 	bool cs_memorypatternfill;
 
 	struct boardromconfig expansionboard[MAX_EXPANSION_BOARDS];
diff --git a/memory.cpp b/memory.cpp
index b0532998..5f4455b6 100644
--- a/memory.cpp
+++ b/memory.cpp
@@ -2319,6 +2319,14 @@ static void allocate_memory (void)
 		}
 	}
 
+	if (currprefs.cs_agnusmodel > 0) {
+		if (currprefs.cs_agnussize <= AGNUSSIZE_512) {
+			chipmem_full_mask = 0x80000 - 1;
+		} else if (currprefs.cs_agnussize == AGNUSSIZE_1M && chipmem_full_mask > 0x100000) {
+			chipmem_full_mask = 0x100000 - 1;
+		}
+	}
+
 	if (bogomem_bank.reserved_size != currprefs.bogomem.size || bogoreset) {
 		if (!(bogomem_bank.reserved_size == 0x200000 && currprefs.bogomem.size == 0x180000)) {
 			mapped_free (&bogomem_bank);
@@ -2626,7 +2634,7 @@ static void fillpattern(addrbank *ab)
 				}
 			}
 		}
-	} else if (currprefs.cs_memorypatternfill && !currprefs.cs_dipagnus) {
+	} else if (currprefs.cs_memorypatternfill && !agnusa1000) {
 		// OCS Agnus has swapped row and column compared to ECS and AGA.
 		uae_u16 fillval = 0;
 		for (int fillbank = 0; fillbank < ab->allocated_size / 256; fillbank++) {
diff --git a/od-win32/resources/resource.h b/od-win32/resources/resource.h
index d4740013..dd191529 100644
--- a/od-win32/resources/resource.h
+++ b/od-win32/resources/resource.h
@@ -1121,6 +1121,7 @@
 #define IDC_DBG_OUTPUT1                 1739
 #define IDC_CS_PCMCIA                   1739
 #define IDC_DBG_HELP                    1740
+#define IDC_CS_AGNUSMODEL               1740
 #define IDC_DBG_INPUT                   1741
 #define IDC_CS_KSMIRROR_A8              1741
 #define IDC_DBG_DREG                    1742
@@ -1128,12 +1129,12 @@
 #define IDC_DBG_AREG                    1743
 #define IDC_CS_RESETWARNING             1743
 #define IDC_DBG_CCR                     1744
-#define IDC_CS_NOEHB                    1744
+#define IDC_CS_AGNUSSIZE                1744
 #define IDC_DBG_AMEM                    1745
-#define IDC_CS_DIPAGNUS                 1745
 #define IDC_DBG_SP_VBR                  1746
 #define IDC_CS_CDTVCR                   1746
 #define IDC_DBG_MMISC                   1747
+#define IDC_CS_DENISEMODEL              1747
 #define IDC_DBG_PC                      1748
 #define IDC_DBG_PREFETCH                1749
 #define IDC_DBG_FPREG                   1750
diff --git a/od-win32/resources/winuae.rc b/od-win32/resources/winuae.rc
index 94db7f82..f4fd8ce3 100644
--- a/od-win32/resources/winuae.rc
+++ b/od-win32/resources/winuae.rc
@@ -826,36 +826,37 @@ BEGIN
     CONTROL         "CDTV SRAM",IDC_CS_CDTVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,119,121,11
     CONTROL         "A4000/A4000T IDE",IDC_CS_IDE2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,132,121,11
     CONTROL         "ROM Mirror (A8)",IDC_CS_KSMIRROR_A8,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,145,121,11
-    CONTROL         "No-EHB Denise",IDC_CS_NOEHB,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,158,121,11
-    CONTROL         "Z3 Autoconfig",IDC_CS_Z3AUTOCONFIG,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,171,104,11
+    CONTROL         "Z3 Autoconfig",IDC_CS_Z3AUTOCONFIG,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,159,104,11
     CONTROL         "Custom register byte write bug",IDC_CS_BYTECUSTOMWRITEBUG,
-                    "Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,184,130,11
-    CONTROL         "KS ROM has Chip RAM speed",IDC_CS_ROMISSLOW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,197,125,12
+                    "Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,172,130,11
+    CONTROL         "KS ROM has Chip RAM speed",IDC_CS_ROMISSLOW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,127,185,125,12
     CONTROL         "DF0: ID Hardware",IDC_CS_DF0IDHW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,93,125,11
     CONTROL         "CD32 NVRAM",IDC_CS_CD32NVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,106,125,11
     CONTROL         "CDTV-CR",IDC_CS_CDTVCR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,119,123,11
     CONTROL         "PCMCIA",IDC_CS_PCMCIA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,132,125,11
-    CONTROL         "A1000 Agnus (8361/8367)",IDC_CS_DIPAGNUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,145,125,11
-    CONTROL         "Composite color burst",IDC_CS_COMPOSITECOLOR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,158,125,12
+    CONTROL         "Composite color burst",IDC_CS_COMPOSITECOLOR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,145,125,12
     CONTROL         "CIA 391078-01 [] CIA revision that can't read IO pin status in output mode",IDC_CS_CIA,
-                    "Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,171,125,12
+                    "Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,159,125,12
     RTEXT           "Unmapped address space:",IDC_STATIC,15,215,101,9
     COMBOBOX        IDC_CS_UNMAPPED,125,212,71,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
     GROUPBOX        "Internal SCSI Hardware",IDC_STATIC,0,232,395,30
     CONTROL         "A3000 WD33C93 SCSI",IDC_CS_DMAC,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,84,247,108,11
     CONTROL         "A4000T NCR53C710 SCSI",IDC_CS_DMAC2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,200,247,125,11
     GROUPBOX        "Chipset Revision",IDC_STATIC,1,264,393,52
-    CONTROL         "Ramsey revision:",IDC_CS_RAMSEY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,34,285,97,11
-    CONTROL         "Fat Gary revision:",IDC_CS_FATGARY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,34,299,97,11
-    EDITTEXT        IDC_CS_RAMSEYREV,136,284,45,13,ES_AUTOHSCROLL
-    EDITTEXT        IDC_CS_FATGARYREV,136,298,45,13,ES_AUTOHSCROLL
-    CONTROL         "Agnus/Alice revision:",IDC_CS_AGNUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,200,285,107,11
-    CONTROL         "Denise/Lisa revision:",IDC_CS_DENISE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,200,299,107,11
-    EDITTEXT        IDC_CS_AGNUSREV,311,284,45,13,ES_AUTOHSCROLL
-    EDITTEXT        IDC_CS_DENISEREV,311,298,45,13,ES_AUTOHSCROLL
+    CONTROL         "Ramsey revision:",IDC_CS_RAMSEY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,11,281,69,11
+    CONTROL         "Fat Gary revision:",IDC_CS_FATGARY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,11,299,70,11
+    EDITTEXT        IDC_CS_RAMSEYREV,87,280,45,13,ES_AUTOHSCROLL
+    EDITTEXT        IDC_CS_FATGARYREV,87,298,45,13,ES_AUTOHSCROLL
+    CONTROL         "Agnus/Alice revision:",IDC_CS_AGNUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,139,281,82,11
+    CONTROL         "Denise/Lisa revision:",IDC_CS_DENISE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,139,299,82,11
+    EDITTEXT        IDC_CS_DENISEREV,230,298,45,13,ES_AUTOHSCROLL
     COMBOBOX        IDC_CS_CIASYNC,313,212,71,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
     RTEXT           "CIA E-Clock Sync",IDC_STATIC,206,215,101,9
-    CONTROL         "Power up memory pattern",IDC_CS_MEMORYPATTERN,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,184,125,12
+    CONTROL         "Power up memory pattern",IDC_CS_MEMORYPATTERN,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,172,125,12
+    EDITTEXT        IDC_CS_AGNUSREV,230,280,45,13,ES_AUTOHSCROLL
+    COMBOBOX        IDC_CS_AGNUSMODEL,282,280,51,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
+    COMBOBOX        IDC_CS_DENISEMODEL,282,298,51,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
+    COMBOBOX        IDC_CS_AGNUSSIZE,338,280,51,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
 END
 
 IDD_AVIOUTPUT DIALOGEX 0, 0, 396, 316
diff --git a/od-win32/win32gui.cpp b/od-win32/win32gui.cpp
index d66b43ec..4d262be5 100644
--- a/od-win32/win32gui.cpp
+++ b/od-win32/win32gui.cpp
@@ -9315,8 +9315,6 @@ static void values_to_chipsetdlg2 (HWND hDlg)
 	}
 	CheckDlgButton(hDlg, IDC_CS_COMPATIBLE, workprefs.cs_compatible != 0);
 	CheckDlgButton(hDlg, IDC_CS_RESETWARNING, workprefs.cs_resetwarning);
-	CheckDlgButton(hDlg, IDC_CS_NOEHB, workprefs.cs_denisenoehb);
-	CheckDlgButton(hDlg, IDC_CS_DIPAGNUS, workprefs.cs_dipagnus);
 	CheckDlgButton(hDlg, IDC_CS_KSMIRROR_E0, workprefs.cs_ksmirror_e0);
 	CheckDlgButton(hDlg, IDC_CS_KSMIRROR_A8, workprefs.cs_ksmirror_a8);
 	CheckDlgButton(hDlg, IDC_CS_CIAOVERLAY, workprefs.cs_ciaoverlay);
@@ -9348,6 +9346,9 @@ static void values_to_chipsetdlg2 (HWND hDlg)
 	CheckDlgButton(hDlg, IDC_CS_MEMORYPATTERN, workprefs.cs_memorypatternfill);
 	xSendDlgItemMessage(hDlg, IDC_CS_UNMAPPED, CB_SETCURSEL, workprefs.cs_unmapped_space, 0);
 	xSendDlgItemMessage(hDlg, IDC_CS_CIASYNC, CB_SETCURSEL, workprefs.cs_eclocksync, 0);
+	xSendDlgItemMessage(hDlg, IDC_CS_AGNUSMODEL, CB_SETCURSEL, workprefs.cs_agnusmodel, 0);
+	xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_SETCURSEL, workprefs.cs_agnussize, 0);
+	xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_SETCURSEL, workprefs.cs_denisemodel, 0);
 	txt[0] = 0;
 	_stprintf (txt, _T("%d"), workprefs.cs_rtc_adjust);
 	SetDlgItemText(hDlg, IDC_CS_RTCADJUST, txt);
@@ -9407,9 +9408,6 @@ static void values_from_chipsetdlg2 (HWND hDlg, UINT msg, WPARAM wParam, LPARAM
 	}
 	workprefs.cs_resetwarning = ischecked (hDlg, IDC_CS_RESETWARNING);
 	workprefs.cs_ciatodbug = ischecked (hDlg, IDC_CS_CIATODBUG);
-	workprefs.cs_denisenoehb = ischecked (hDlg, IDC_CS_NOEHB);
-	workprefs.cs_dipagnus = ischecked (hDlg, IDC_CS_DIPAGNUS);
-	workprefs.cs_agnusbltbusybug = workprefs.cs_dipagnus;
 	workprefs.cs_ksmirror_e0 = ischecked (hDlg, IDC_CS_KSMIRROR_E0);
 	workprefs.cs_ksmirror_a8 = ischecked (hDlg, IDC_CS_KSMIRROR_A8);
 	workprefs.cs_ciaoverlay = ischecked (hDlg, IDC_CS_CIAOVERLAY);
@@ -9448,6 +9446,18 @@ static void values_from_chipsetdlg2 (HWND hDlg, UINT msg, WPARAM wParam, LPARAM
 	if (val != CB_ERR)
 		workprefs.cs_eclocksync = val;
 
+	val = xSendDlgItemMessage(hDlg, IDC_CS_AGNUSMODEL, CB_GETCURSEL, 0, 0L);
+	if (val != CB_ERR)
+		workprefs.cs_agnusmodel = val;
+
+	val = xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_GETCURSEL, 0, 0L);
+	if (val != CB_ERR)
+		workprefs.cs_agnussize = val;
+
+	val = xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_GETCURSEL, 0, 0L);
+	if (val != CB_ERR)
+		workprefs.cs_denisemodel = val;
+
 	cfgfile_compatibility_romtype(&workprefs);
 
 	if (workprefs.cs_rtc) {
@@ -9511,8 +9521,6 @@ static void enable_for_chipsetdlg2 (HWND hDlg)
 	ew(hDlg, IDC_CS_CDTVRAM, e);
 	ew(hDlg, IDC_CS_RESETWARNING, e);
 	ew(hDlg, IDC_CS_CIATODBUG, e);
-	ew(hDlg, IDC_CS_NOEHB, e);
-	ew(hDlg, IDC_CS_DIPAGNUS, e);
 	ew(hDlg, IDC_CS_Z3AUTOCONFIG, e);
 	ew(hDlg, IDC_CS_KSMIRROR_E0, e);
 	ew(hDlg, IDC_CS_KSMIRROR_A8, e);
@@ -9536,6 +9544,9 @@ static void enable_for_chipsetdlg2 (HWND hDlg)
 	ew(hDlg, IDC_CS_CIASYNC, e);
 	ew(hDlg, IDC_CS_CIA, e);
 	ew(hDlg, IDC_CS_MEMORYPATTERN, e);
+	ew(hDlg, IDC_CS_AGNUSMODEL, e);
+	ew(hDlg, IDC_CS_AGNUSSIZE, e);
+	ew(hDlg, IDC_CS_DENISEMODEL, e);
 }
 
 static INT_PTR CALLBACK ChipsetDlgProc2 (HWND hDlg, UINT msg, WPARAM wParam, LPARAM lParam)
@@ -9557,6 +9568,20 @@ static INT_PTR CALLBACK ChipsetDlgProc2 (HWND hDlg, UINT msg, WPARAM wParam, LPA
 		xSendDlgItemMessage(hDlg, IDC_CS_CIASYNC, CB_ADDSTRING, 0, (LPARAM)_T("68000"));
 		xSendDlgItemMessage(hDlg, IDC_CS_CIASYNC, CB_ADDSTRING, 0, (LPARAM)_T("Gayle"));
 		xSendDlgItemMessage(hDlg, IDC_CS_CIASYNC, CB_ADDSTRING, 0, (LPARAM)_T("68000 Alternate"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSMODEL, CB_RESETCONTENT, 0, 0L);
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSMODEL, CB_ADDSTRING, 0, (LPARAM)_T("Auto"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSMODEL, CB_ADDSTRING, 0, (LPARAM)_T("Velvet"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSMODEL, CB_ADDSTRING, 0, (LPARAM)_T("A1000"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_RESETCONTENT, 0, 0L);
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_ADDSTRING, 0, (LPARAM)_T("Auto"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_ADDSTRING, 0, (LPARAM)_T("512k"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_ADDSTRING, 0, (LPARAM)_T("1M"));
+		xSendDlgItemMessage(hDlg, IDC_CS_AGNUSSIZE, CB_ADDSTRING, 0, (LPARAM)_T("2M"));
+		xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_RESETCONTENT, 0, 0L);
+		xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_ADDSTRING, 0, (LPARAM)_T("Auto"));
+		xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_ADDSTRING, 0, (LPARAM)_T("Velvet"));
+		xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_ADDSTRING, 0, (LPARAM)_T("A1000 No-EHB"));
+		xSendDlgItemMessage(hDlg, IDC_CS_DENISEMODEL, CB_ADDSTRING, 0, (LPARAM)_T("A1000"));
 		xSendDlgItemMessage(hDlg, IDC_CS_UNMAPPED, CB_RESETCONTENT, 0, 0L);
 		WIN32GUI_LoadUIString(IDS_UNMAPPED_ADDRESS, tmp, sizeof tmp / sizeof(TCHAR));
 		TCHAR *p1 = tmp;
-- 
2.47.3