From ee9fac1136abbed270b8acea1debb5b36dd6f1d3 Mon Sep 17 00:00:00 2001 From: Toni Wilen Date: Sun, 14 May 2023 20:30:55 +0300 Subject: [PATCH] Fix RTC address bank memwatch point support. --- cia.cpp | 2 +- memory.cpp | 12 +++++++++--- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/cia.cpp b/cia.cpp index 8bcec386..49c01624 100644 --- a/cia.cpp +++ b/cia.cpp @@ -2662,7 +2662,7 @@ addrbank clock_bank = { clock_lput, clock_wput, clock_bput, default_xlate, default_check, NULL, NULL, _T("Battery backed up clock (none)"), dummy_lgeti, dummy_wgeti, - ABFLAG_IO, S_READ, S_WRITE, NULL, 0x3f, 0xd80000 + ABFLAG_IO, S_READ, S_WRITE, NULL, 0x3f, 0xdc0000 }; static uae_u8 getclockreg(int addr, struct tm *ct) diff --git a/memory.cpp b/memory.cpp index 081074ca..a266f4c2 100644 --- a/memory.cpp +++ b/memory.cpp @@ -3014,12 +3014,18 @@ void memory_reset (void) if (currprefs.cs_ide < 0) map_banks (&gayle_bank, 0xDD, 1, 0); } - if (currprefs.cs_rtc == 3) // A2000 clock + if (currprefs.cs_rtc == 3) { // A2000 clock map_banks (&clock_bank, 0xD8, 4, 0); - if (currprefs.cs_rtc == 1 || currprefs.cs_rtc == 2 || currprefs.cs_cdtvram) + clock_bank.startmask = 0xd80000; + } + if (currprefs.cs_rtc == 1 || currprefs.cs_rtc == 2 || currprefs.cs_cdtvram) { map_banks (&clock_bank, 0xDC, 1, 0); - else if (currprefs.cs_ksmirror_a8 || currprefs.cs_ide > 0 || currprefs.cs_pcmcia) + clock_bank.startmask = 0xdc0000; + } + else if (currprefs.cs_ksmirror_a8 || currprefs.cs_ide > 0 || currprefs.cs_pcmcia) { map_banks (&clock_bank, 0xDC, 1, 0); /* none clock */ + clock_bank.startmask = 0xdc0000; + } if (currprefs.cs_fatgaryrev >= 0 || currprefs.cs_ramseyrev >= 0) map_banks (&mbres_bank, 0xDE, 1, 0); #ifdef CD32 -- 2.47.3